Sony CMT-SE7 / HCD-SE7 Service Manual ▷ View online
101
HCD-SE7
– MAIN Board –
IC220 BA6956AN
1
2
3
4
5
6
7
8
9
CONTROL LOGIC
TSD
VREF
O
UT2
O
UT1
RNF
VM
VCC
FIN
GND
RIN
IC300 LC75342
CONTROL
CIRCUIT
LOGIC
CIRCUIT
CONTROL
CIRCUIT
CCB
INTERF
ACE
1
2
3
4
5
6
7
8
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
15
14
13
12
11
10
9
DI
CE
VSS
TEST
LOUT
LBASS2
LBASS1
LTRE
LIN
LSELO
L4
L3
L2
L1
NC
CL
VDD
VREF
RVREF
LVREF
NC
ROUT
RBASS2
RBASS1
RTRE
RIN
RSELO
R4
R3
R2
R1
NC
102
HCD-SE7
– I/O Board –
IC600 MM1568AJBE
4dB
4dB
VCC2
75
Ω
DRIVER
LPF
LPF
LPF
75
Ω
DRIVER
2dB
4dB
2dB
75
Ω
DRIVER
2dB
75
Ω
DRIVER
2dB
4dB
75
Ω
DRIVER
2dB
4dB
75
Ω
DRIVER
4dB
2dB
CIN
2
VIN
4
MUTE1
3
YC MIX
5
YIN
6
BIAS
7
GND1
8
NC
9
GND1 10
NC 11
CYIN 12
CLP 13
CbIN 14
CrIN 16
GND2 17
MUTE2 15
VCC1
1
34
CrSAG
18
CrOUT
19
CbSAG
21
GND2
20
CbOUT
22
CYSAG
24
GND2
23
GND2
26
CYOUT
25
YSAG
27
YOUT
28
VSAG
30
GND2
29
GND2
32
VOUT
31
COUT
33
+
BIAS
BIAS
BIAS
BIAS
BIAS
CLAMP
CLAMP
CLAMP
LPF
LPF
LPF
– REG Board –
IC910 SI-8120JF
OVER
CURRENT
PROTECTOR
LATCH
&
DRIVER
OVER HEAT
PROTECTOR
REGULATOR
ON/OFF
SOFT
START
+
–
–
+
–
–
RESET
VREF
COMPARATOR
ERROR AMP
OSC
1
VIN
2
SW OUT
3
GND
4
VOS
5
ON/OFF
IC915 SI-8050JF
OVER
CURRENT
PROTECTOR
LATCH
&
DRIVER
OVER HEAT
PROTECTOR
REGULATOR
+
–
–
+
–
–
RESET
VREF
COMPARATOR
ERROR AMP
OSC
1
VIN
2
SW OUT
3
GND
4
VOS
5
S.S
103
HCD-SE7
IC920 SI-8033S
OVER
CURRENT
PROTECTOR
LATCH
&
DRIVER
OVER HEAT
PROTECTOR
REGULATOR
ON/OFF
SOFT
START
+
–
–
+
–
–
RESET
VREF
COMPARATOR
ERROR AMP
OSC
1
VIN
2
SW OUT
3
GND
4
VOS
5
ON/OFF
104
HCD-SE7
• IC Pin Function Description
• DMB03 BOARD IC207 ZIVA5X-C2F (MD MASTER CONTROLLER)
• DMB03 BOARD IC207 ZIVA5X-C2F (MD MASTER CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
VDDP
—
Power supply terminal (+3.3V) (I/O signal)
2
HA1
I/O
Address bus
3
HD15
I/O
Data bus (address signal multiplexed)
4
HD14
I/O
Data bus (address signal multiplexed)
5
HD13
I/O
Data bus (address signal multiplexed)
6
HD12
I/O
Data bus (address signal multiplexed)
7
HD11
I/O
Data bus (address signal multiplexed)
8
HD10
I/O
Data bus (address signal multiplexed)
9
HD9
I/O
Data bus (address signal multiplexed)
10
HD8
I/O
Data bus (address signal multiplexed)
11
HD7
I/O
Data bus (address signal multiplexed)
12
VDDP
—
Power supply terminal (+3.3V) (I/O signal)
13
GNDP
—
Ground terminal (I/O signal)
14
HD6
I/O
Data bus (address signal multiplexed)
15
HD5
I/O
Data bus (address signal multiplexed)
16
HD4
I/O
Data bus (address signal multiplexed)
17
HD3
I/O
Data bus (address signal multiplexed)
18
HD2
I/O
Data bus (address signal multiplexed)
19
HD1
I/O
Data bus (address signal multiplexed)
20
VDDP
—
Power supply terminal (+3.3V) (I/O signal)
21
GNDP
—
Ground terminal (I/O signal)
22
HD0
I/O
Data bus (address signal multiplexed)
23
HDTACK
I/O
Acknowledge signal input/output for host data transfer (not used)
24
HIRQ0
I
Interrupt signal input for Medusa (not used)
25
WEH.UDS
I/O
Host upper data strobe signal output
26
WEL.LDS
I/O
Host lower data strobe signal output (not used)
27
HREAD
I/O
Read/write strobe signal output
28
GPIO0
I/O
Jig detection port (pull-up)
29
GND
—
Ground terminal (inside core)
30
VDD
—
Power supply terminal (+1.8V) (inside core)
31
GND25
—
Ground terminal (SDRAM I/O signal)
32
VDD25
—
Power supply terminal (+3.3V) (SDRAM I/O signal)
33
MA9
O
SDRAM address bus
34
MA8
O
SDRAM address bus
35
MA7
O
SDRAM address bus
36
MA6
O
SDRAM address bus
37
MA5
O
SDRAM address bus
38
MA4
O
SDRAM address bus
39
MA3
O
SDRAM address bus
40
MA2
O
SDRAM address bus
41
MA1
O
SDRAM address bus
42
MA0
O
SDRAM address bus
43
GND25
—
Ground terminal (SDRAM I/O signal)
44
VDD25
—
Power supply terminal (+3.3V) (SDRAM I/O signal)
45
MA10
O
SDRAM address bus
46
MA11
O
SDRAM address bus
47
BA1
O
SDRAM bank select 1 signal output
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