Sony CMT-NEZ50 (serv.man2) Service Manual ▷ View online
29
29
HCD-NEZ50
HCD-NEZ50
C901
C902
CN900
CN903
R911
R912
C918
C923
D926
D927
D928
D919
D920
C919
D918
D322
C336
C350
R914
R915
Q338
IC903
C920
C925
D907
D909
D910
D908
D922
D923
R908
R904
R905
R909
C922
C930
D916
R919
D917
CN901
R906
C914
R913
JW915
JW916
JW914
T902
T901
JW909
LF901
Q333
R916
RY901
IC901
JW921
JW920
Q315
D906
C921
IC900
D
930
D929
R921
R922
CN902
R901
R902
D911
D913
D914
D912
JW908
JW901
C931
JW905
JW911
S901
0.1
0.1
9P
4P
47k
47k
470
6.3V
0.1
1N4002B
1N4002B
1N4002B
1N5401M
MC2838
2200
25V
1N5401M
MC2836
22
50V
10
50V
4.7k
22k
RT1N141C-TP-1
TA7804LS
100
16V
16V
0.01
1N4002B
1N4002B
1N4002B
1N4002B
1SS355WTE-17
MC2838
1k
4.7k
4.7k
1k
220
10V
10V
0.1
1N5401M
47k
1N5401M
2P
10k
10
50V
47k
RT1N141C-TP-1 47k
TA78033LS
2SC2001TP-LK
1SS355TE-17
1000
16V
KIA7810API
1SS
355W
TE-17
1SS355WTE-17
47k
220k
7P
22k
22k
1N5401M
1N5401M
1N5401M
1N5401M
4700p
250V
+B
GND
-B
ACDET
D+4V(SUB)
DGND
POWERON
I-P MONITOR
MGND
M+10V
GND(CT)
DGND
MGND
+UNREG
DGND
PROTECT
M+10V
+4V REGULATOR
O
G
I
O
G
I
Q333,338
AC DETECT
RELAY DRIVE
MAIN POWER
G
O
I
+10V REGULATOR
MAIN POWER
TRANSFORMER
TRANSFORMER
SUB POWER
(AC IN)
ACDET
+UNREG(SUB)
GND
GND(CT)
RELAY
D+3.3V(MAIN)
D+3.3V
+3.3V REGULATOR
I-P.MONITOR
VOLTAGE
SELECTOR
127V
0V
220V
7-12. DIAGRAMA ESQUEMÁTICO – Seção FONTE DE ALIMENTAÇÃO –
(Page
22)
(Page
26)
(Page
22)
30
HCD-NEZ50
•
DESCRIÇÃO DO FUNÇÕES DOS PINOS DO IC
PLACA CD IC201 CXD3014A-201R (CD DSP)
Pin No.
Pin Name
I/O
Description
1
LRCK
O
L/R sampling clock signal output terminal
2
LRCKI
I
L/R sampling clock signal input terminal
3
PCMD
O
Serial data output terminal
4
PCMDI
I
Serial data input terminal
5
BCK
O
Bit clock signal output terminal
6
BCKI
I
Bit clock signal input terminal
7
XTACN
I
Oscillation circuit on/off switch control signal input from the system controller
"L": oscillation stop, "H": self-oscillation
"L": oscillation stop, "H": self-oscillation
8
XRST
I
System reset signal input from the system controller "L": reset
9
VSS
-
Ground terminal
10
IREQ-MP3
O
MP3 data request signal output to the system controller
11
CLOK
I
CD serial data transfer clock signal input from the system controller
12
DATA2
I
MP3 serial data input from the system controller
13
XLAT-MP3
I
MP3 serial data latch pulse signal input from the system controller
14
REQ-MP3
I
MP3 data request signal input from the system controller
15
ACK-MP3
O
MP3 acknowledge signal output to the system controller
16
XLAT
I
CD serial data latch pulse signal input from the system controller
17
VDD
-
Power supply terminal (+1.8V)
18
SVSS
-
Ground terminal
19
SVDD
-
Power supply terminal (+1.8V)
20
SENS
O
Internal status (SENSE) signal output to the system controller
21
WFCK
-
Not used
22
XUGF
-
Not used
23
XPCK
-
Not used
24
GFS
-
Not used
25
C2PO
-
Not used
26
SCOR
O
Subcode sync (S0+S1) detection signal output to the system controller
27
VDD
-
Power supply terminal (+1.8V)
28
COUT
-
Not used
29
SVSS
-
Ground terminal
30
SVDD
-
Power supply terminal (+1.8V)
31
MIRR
-
Not used
32
DFCT
-
Not used
33
FOK
-
Not used
34
VSS
-
Ground terminal
35
VDD
-
Power supply terminal (+1.8V)
36
VSS
-
Ground terminal
37
MIRR
-
Not used
38
MDP
O
Spindle motor servo control signal output terminal
39
SSTP
I
Disc inner position detection signal input terminal
40
IOVSS1
-
Ground terminal
41
SFDR
O
Sled servo drive signal (+) output to the coil/motor driver
42
SRDR
O
Sled servo drive signal (-) output to the coil/motor driver
43
TFDR
O
Tracking servo drive signal (+) output to the coil/motor driver
44
TRDR
O
Tracking servo drive signal (-) output to the coil/motor driver
45
FFDR
O
Focus servo drive signal (+) output to the coil/motor driver
46
FRDR
O
Focus servo drive signal (-) output to the coil/motor driver
47
IOVDD1
-
Power supply terminal (+3.3V)
31
HCD-NEZ50
Pin No.
Pin Name
I/O
Description
48
AVDD0
-
Power supply terminal (+3.3V)
49
AVSS0
-
Ground terminal
50
E
I
E signal input from the optical pick-up block
51
F
I
F signal input from the optical pick-up block
52
TEI
I
Tracking error signal input terminal
53
TEO
O
Tracking error signal output terminal
54
FEI
I
Focus error signal input terminal
55
FEO
O
Focus error signal output terminal
56
VC
O
Middle point voltage output terminal
57
A
I
A signal input from the optical pick-up block
58
B
I
B signal input from the optical pick-up block
59
C
I
C signal input from the optical pick-up block
60
D
I
D signal input from the optical pick-up block
61
AVDD4
-
Power supply terminal (+3.3V)
62
RFDCO
O
Not used
63
PDSENS
I
Not used
64
AC_SUM
O
RFAC summing amplifier signal output terminal
65
EQ_IN
I
RF equalizer circuit input terminal
66
LD
O
Laser diode on/off control signal output to the automatic power control circuit
"L": laser off, "H": laser on
"L": laser off, "H": laser on
67
PD
I
Light amount monitor input from the optical pick-up block laser diode
68
RFC
I
Equalizer cut off frequency adjustment terminal
69
AVSS4
-
Ground terminal
70
RFACO
O
EFM signal output terminal
71
RFACI
I
EFM signal input terminal
72
AVDD3
-
Power supply terminal (+3.3V)
73
BIAS
I
Asymmetry circuit constant current input terminal
74
ASYI
I
Playback EFM asymmetry comparator voltage input terminal
75
ASYO
O
Playback EFM full-swing output terminal
76
VPCO
O
Charge pump output terminal for broad-band EFM PLL
77
VCTL
I
VCO2 control voltage input terminal for broad-band EFM PLL
78
AVSS3
-
Ground terminal
79
CLTV
I
VCO1 control voltage input terminal for multiplier
80
FILO
O
Filter output terminal for master PLL
81
FILI
I
Filter input terminal for master PLL
82
PCO
O
Charge pump output terminal for master PLL
83
SVSS
-
Ground terminal
84
SVDD
-
Power supply terminal (+1.8V)
85
SSTB-MP3
I
MP3 standby on/off control signal input terminal "L": standby Not used
86
VDD
-
Power supply terminal (+1.8V)
87
VSS
-
Ground terminal
88
TEST1
I
Test terminal Normally: fixed at "L"
89
DATA
I
CD serial data input from the system controller
90
CLK2
I
MP3 serial data transfer clock signal input from the system controller
91
SVSS
-
Ground terminal
92
SVDD
-
Power supply terminal (+2.5V)
93
JTAGTCK
-
Not used
94
JTAGTDI
-
Not used
95
JTAGTDO
-
Not used
96
JTAGTMS
-
Not used
32
HCD-NEZ50
Pin No.
Pin Name
I/O
Description
97
TRST
-
Not used
98
VSS
-
Ground terminal
99
VDD
-
Power supply terminal (+1.8V)
100
IOVDD2
-
Power supply terminal (+3.3V)
101
DOUT
O
Digital audio signal output terminal Not used
102
TEST
I
Test terminal Normally: fixed at "L"
103
TES1
I
Test terminal Normally: fixed at "L"
104
IOVSS2
-
Ground terminal
105
PLLVDD
-
Power supply terminal (+1.8V)
106
PLLVSS
-
Ground terminal
107
XVSS
-
Ground terminal
108
XTAO
O
System clock output terminal (16.9344 MHz)
109
XTAI
I
System clock input terminal (16.9344 MHz)
110
XVDD
-
Power supply terminal (+1.8V)
111
AVDD1
-
Power supply terminal (+3.3V)
112
AOUT1
O
L-ch analog audio signal output terminal
113
VREFL
O
L-ch reference voltage output terminal
114
AVSS1
-
Ground terminal
115
AVSS2
-
Ground terminal
116
VREFR
O
R-ch reference voltage output terminal
117
AOUT2
O
R-ch analog audio signal output terminal
118
AVDD1
-
Power supply terminal (+3.3V)
119
IOVDD0
-
Power supply terminal (+3.3V)
120
IOVSS0
-
Ground terminal
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