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Model
CMT-L7HD HCD-L7HD
Pages
94
Size
10.52 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
cmt-l7hd-hcd-l7hd.pdf
Date

Sony CMT-L7HD / HCD-L7HD Service Manual ▷ View online

29
HCD-L7HD
Note :
If any of the following test modes is executed, data is written in the
HD.
Never execute any of these test modes on the customer's HD, because
customer's data is erased during test mode.
1.
FORMAT
4.
WRITE TEST
5.
R/W TEST
HD Aging Test
Note (When HD is replaced) :
When HD is replaced, perform the following steps.
(a) When HD is replaced, leave the set with the power on for
approximately thirty minutes . (Warming up the HD)
(b) Enter the HD test mode and format the HD.
(c) Turn off the power once and back on again.
(d) Record the music in the HD using CD-HDD Synchro-
Recording function for testing the HD. (about thirty minutes)
(e) Confirm that music is correctly recorded. After it is confirmed,
erase all recordings on the HD.
1. FORMAT
* This mode performs logical formatting HD. (about three minutes)
If formatting is performed, all data on the HD is erased.
* When HD is replaced, be sure to format the new HD. If the new
HD is not formatted, the error message "Format Error " will be
displayed.
* The 500 albums and 10 play lists are created at the same time of
logical formatting FAT32 on the HD.
Procedure:
(1) Enter the HD test mode, then rotate the  ALBUM
  
dial to display
“Format?”, and press the  >  button to display “Format OK?”.
(2) When the  >  button is pressed, The message “Format Now”
is displayed and it takes about three minutes.
(3) When format is complete, “Format End” is displayed.
(4) To exit from this mode, press the  x  (HD) button.
2. FLASH INITIALIZATION
* The last memory (which is stored before power-off) is initialized
to the default value of the factory setting.
Procedure:
(1) Enter the HD test mode, then rotate the  ALBUM
  
dial to display
“Flash Init?”, and press the  >  button.
(2) Initialization is performed and “OK” is displayed.
(3) To exit from this mode, press the  x  (HD) button.
Contents of the Last memory
Item
Contents
Default value
L.Sync Setup
Level Syncro ON/OFF
ON
L.Sync Th IDX
Level-Sync THRESH value
50dB
S.Space Setup
Smart Space ON/OFF
ON
Text Save Setup
TEXT SAVE ON/OFF
ON
1/ALL
Play mode of ALBUM
ALL
PLAY MODE
Play mode
CONTINUE
REP MODE
Repeat mode
OFF
Display Mode
Time Display mode
Total playing time
Current Album No. The present Album Number
1
Album Favorite
ALBUM No. of Album Favorites
No Assign
A to E
History
Playback history of Album
None
3. READ TEST
* This mode needs not be performed in normal operation.
* Perform this mode only for the newly formatted HD.
Procedure:
(1) Enter the HD test mode, then rotate the  ALBUM
  
dial to display
“Read Test?”, and press the  >    button to display “IN”.
“MID”, “OUT” or “THRU” is also selectable by rotating the
ALBUM
  
dial.
(2) Press the  >  button and “Testing  xx %” is displayed during
the read test.
(3) When the read test is good, “OK” will be displayed.
(4) To exit from this mode, press the  x  (HD) button.
* “THRU” test takes very long time.
4. WRITE TEST
* This mode needs not be performed in normal operation.
* Perform this mode only for the newly formatted HD.
Procedure:
(1) Enter the HD test mode, then rotate the  ALBUM
  
dial to display
“Write Test?”, and press the  >    button to display “IN”.
“MID”, “OUT” or “THRU” is also selectable by rotating the
ALBUM
  
dial.
(2) Press the  >  button and “Testing  xx %” is displayed during
the write test.
(3) When the write test is good, “OK” will be displayed.
(4) To exit from this mode, press the  x  (HD) button.
* “THRU” test takes very long time.
5. R/W TEST
* Perform the R/W TEST when checking the formatted HD.
* Confirmation is normally satisfied by each performing IN, MID
and OUT sector test.
Procedure:
(1) Enter the HD test mode, then rotate the  ALBUM
  
dial to display
“R/W Test?”, and press the  >    button to display “IN”.
“MID”, “OUT” or “THRU” is also selectable by rotating the
ALBUM
  
dial.
(2) Press the  >  button and “Testing  xx %” is displayed during
the R/W test.
(3) When the R/W test is good, “OK” will be displayed.
(4) To exit from this mode, press the  x  (HD) button.
* “THRU” test takes very long time.
6. SMART TEST
* This mode displayed status of S.M.A.R.T. functions of the HD.
* If "NG" appears in this mode, the HD may be damaged in the
near future. Replacement of the HD is recommended.
Procedure:
(1) Enter the HD test mode, then rotate the  ALBUM
  
dial to display
“Smart?”, and press the  >  button.
(2) When the test is complete, “OK” or “NG” is displayed.
(3) To exit from this mode, press the  x  (HD) button.
30
HCD-L7HD
SECTION 5
ELECTRICAL ADJUSTMENTS
CD SECTION
Note :
1. CD Block is basically designed to operate without adjustment.
Therefore, check each item in order given.
2. Use YEDS-18 disc (3-702-101-01) unless otherwise indicated.
3. Use an oscilloscope with more than 10M
 impedance.
4. Clean the object lens by an applicator with neutral detergent
when the signal level is low than specified value with the
following checks.
RF Level Check
Procedure :
1. Connect oscilloscope to TP (RFAC).
2. Turned Power switch on.
3. Load a disc (YEDS-18) and playback the number five track.
4. Confirm that oscilloscope waveform is clear and check RF signal
level is correct or not.
Note:
Clear RF signal waveform means that the shape “
” can be
clearly distinguished at the center of the waveform.
RF signal waveform
E-F Balance (1 Track jump) Check
Procedure:
1.
Connect oscilloscope to TP (TE) and TP (DVC) board.
2.
Turned Power switch on.
3.
Load a disc (YEDS-18) and playback the number five track.
4.
Press the  u  (CD) button. (Becomes the 1track jump mode.)
5.
Confirm that the level B and A (DC voltage) on the oscilloscope
waveform.
1 track jump waveform
TP(RFAC)
TP(DVC)
BD board
oscilloscope
oscilloscope
BD board
TP (TE)
TP (DVC)
+
VOLT/DIV : 200mV
TIME/DIV : 500ns
level : 1.1 
±
 0.3Vp-p 
A
B
0V
Center of
waveform
B
Symmetry
A (DC voltage)
level=1.3 
±
0.6Vp-p
Adjustment Location :
[ BD BOARD ] – SIDE A –
IC103
TP
(RFAC)
TP(TE)
TP(DVC)
IC101
Specification level:      
x
 100=less than 
±
22%
31
31
HCD-L7HD
SECTION 6
DIAGRAMS
6-1. Block Diagrams
– CD Section –
• Signal Path
: CD/
DIGITAL IN
• R-CH is omitted due to same as L-CH.
: DIGITAL OUT
OPTICAL PICK-UP
BLOCK
(BU-31)
PD1
5
PD2
I5-10
I1-6
LD+
VC
VCC
BD+5V
GND
PD
VR
SW
LD
DRIVE
Q101
IC103
RF AMP
VC
27
VFC
25
A
6
B
7
C
8
D
9
E
10
F
11
LD
1
PD
2
IC102
MOTOR/COIL DRIVER
VO1+
47
VO1-
52
55
56
M
5
10
2
1
M
F-
FOCUS
COIL
TRACKING
COIL
F+
T-
T+
35
IN1+
34
IN1-
32
31
27
26
MDP
25
SRDR
30
SFDR
29
TRDR
32
TFDR
31
FRDR
34
FFDR
33
IC101
DIGITAL SERVO,
DIGITAL SIGNAL PROCESSOR
D OUT
RFAC
50
28
RFDCO
15
RFAC
16
FE
17
FEI
18
TE
12
SW
29
RFDCI
RFDC
43
FE
39
TE
41
SE
BD+5V
RV101
40
4
DATA
6
CLOK
5
XLAT
76
SQSO
7
SENS
26 SSTP
19 TE_BAL
2
XRST
69
XTSL
CD CONTROL
IC600
DATA
8
SCLK
77
SQCK
15
SCOR
CLK
XLT
SUBQ
SENSE
SQCLK
SCOR
CTRL1
24
BDPWR
31
7
8
13
15
18
17
91
32
LDON
14
BDRST
PWM1
12
PWM2
19
PWM3
20
ENC1 43
ENC2 44
ENC3 45
ENC4 46
SW(L.MTR) 49
SW(C.MTR) 48
L.SENS 77
3
D.SENS 78
VO2+
VO2-
VO3+
VO3-
VO4-
VO4+
IN2+
IN2-
IN3+
IN3-
IN4R
8
24
STBY
8
4
10
8
6
11
7
2
M102
SLED
MOTOR
M101
SPINDLE
MOTOR
64
LIMIT IN
SWITCH
39 X1
38 X2
X600
20MHz
3
IICDATA
5
IICCLK
89
IICHELP
90
IICHELP
93
AC-CUT
34
RESET
RESET
GEN
Q600
51
D.SENS.OUT
SW
Q651
+5V(SW)
I2C-DATA, I2C-CLK, I2C-HELP, ACCUT
I2C-DATA
I2C-CLK
I2C-HELP
 ACCUT
B
MAIN
SECTION
D+5V
+3.3V
REG
Q103,D101
SWITCH
Q601,602
BD+3.3V
BD+5V
XTAI 71
3
IC791
OPT OUT
D OUT
D IN
IC711
LO MOTOR DRIVER
IC721
L SENSOR
3
2
IC731
D SENSOR
M711
(LOADING)
M
7
9
4
2
IC701
CK MOTOR DRIVER
RIN
FIN
OUT1
OUT2
S741
M
7
9
4
2
RIN
FIN
OUT1
OUT2
M701
(CHUCKING)
LO-MTR(POS)
LO-MTR(NEG)
54
55
52
53
CK-MTR(POS)
CK-MTR(NEG)
ROTARY
ENCODER
S731
L MOTOR
C MOTOR
9
1
12 13
6
IC781
OPT SELECT
Q726
OMUTE 28
1
2
4
IC782
OPT MUTE
1
IC792
OPT IN
D IN
OPT SEL
PLLPWR
A
HD
SECTION
DMUTE
(DACMUTE)
30
DMUTE
36 XT2
35 XT1
X601
26
RFC
SWITCH
Q102
72
XTAO
X201
33.8MHz
32
32
HCD-L7HD
– HD Section –
256FS
IC101
MASTER CONTROL
Q1004,
D1003,1004
MUTE LOGIC
IC1000 
HDD MASTER CONTROL
IC1101 
USB-IIC
IC1100
USB-HUB
VINL
SCLK
ADIN-L
D IN
PLLPWR
1
DATAO 13
WS 12
BCK 11
8
PWON
7
IC1002
CLOCK DIVIDER
IC1009
ADC
SDI
35
DAIN
37
LRCK
32
BCLK
31
FS2560
16
RST
13
UDM
30
UDP
28
IC401
SP/PS
DAOUT 36
WS 12
BCK 11
DIO 23
SCLK 21
BS 20
INS 26
SPDIF1
VOUTL
DAOUT-L
16
SPDIF0
VDDAPLL
DMUTE
15
18
32
LRCK
32
BCLK
31
RESET
1
SLICER SEL
13
LOCK
21
MUTE
12
IC1010
DAC
IDE RST
OPTSEL
LEVEL-R
LEVEL-L
CTS
16
E
D
A
C
RESETP
29 IIC-CLK
P DOWN
12
38
RESET
RTS
39
CTS
20 P DOWN
7
11
X1001
45.16MHz
I2C-CLK
RESET
PC POWER ON
I2C-DATA
I2C-DATA, I2C-CLK,
 I2C-HELP, ACCUT
MAIN
SECTION
I2C-HELP
ACCUT
Q1001
SWITCH
RESET
SW
Q1006
VPP
SW
Q171
Q1005
D+3.3V
SWITCH
30 IIC-DATA
IIC-DATA
23 IIC-HELP
TXD1
Q1002
SWITCH
193
XRD
78
XWEU
80
WE1
90
XWRL
81
WE0
89
XCS
82
CS4
100
XIRQ
85
IRQ0(CXD1859)
8
XDREQ0
86
DREQ0
191
XDACK0
88
DACK0
114
XDREQ1
89
DREQ1
192
XDACK1
90
DACK1
115
PT
A0(USB)
32
PT
A1(USB POWER)
31
IRQ5
176
PT
A2(WP)
30
CS0
96
RD
88
RD/WR
93
CKIO
162
PTJ2
108
PET7
94
MAIN
SECTION
A
CD
SECTION
C
MAIN
SECTION
CD
SECTION
MAIN
SECTION
35
TXD
RXD1
172
36
RXD
TXD1
166
81
HD DEV REC
STT IN
MCS7(CS ADDA)
177
15
13
X1000
10MHz
X-IN
X-OUT
156
155
X102
EXTAL
XTAL
23
22
X1101
12.5MHz
XI
XO
23
22
X1100
6MHz
XI
56
D2VN
31
USO VBUS
55
D2VP
RST
XO
31
RXD1
32
CLK1
33
RTS1
34
CNVSS
TXD1
RESET
RXD1
CLK1
RTS1
CNVSS
9
CN1003
CN1100
TO
FLASH
WRITER
RPVP
51
PULL UP SW
32
RPVN
52
VBUS DET
D+IN
D-IN
VBUS
44
PC POWER ON
16
P DOWN
12
TO
PC
D1108
CTS 15
CD/XOPT 14
ADDA MUTE 22
PTA7(MS LOAD IN) 23
PTA6(CAM IN) 24
PTA3(MS POWER) 28
PTK4 87
IDE CS
PTK0 98
IDE P
IRQ1(IDE PRIMARY) 9
LOCK 20
SLICER SEL 17
LED3
LED2
LED1
CAS2L 116
PTE1 119
CAS2H 117
UD PB
UD SSPND
AN6 206
AN7 207
61
15
IIC-CLK
62
1
UCK
TX
RX
SLEEP
REQ
BUSY
2 3 4 13 15
51
CLK
RX
TX
SLEEP
REQ
BUSY
53 52 17 14 16
DB0-15
A1-15
A0-21
A0-11
A0-18
D0-15
DQ0-15
WE
CE
VPP
OE
DQ0-15
WE
CLK
CAS
RAS
CKE
CS
UDQM
LDQM
IC1004,1005
BUS TRANCEIVER
IC1006
BUS BUFFER
CN1002
TO
HDD
CN461
FOR
MEMORY
STICK
(NOT USED)
1
19
IC1102
RESET
XRST
1
19
IC1103
RESET
1
3
IC701
3.3V REG
IC1104
D1110,1109
DIR
OE
POWER
SW
Q451
+3.3V
IC102
1MB FLASH ROM
IC103
SDRAM
A1-12
A1,2
EN
IC1003
ADDRESS
DEC
A4,5
A1-3
A1-19
A1-15
D0-15
D0-15
PDD0-15
PDA0-2
RD
PDIOR#
PDIOW#
DIO
SCLK
BS
XINS
IN SW
OUT SW
3.3V
R RSTP#
PDCS#1
PDCS#3
IRQ14
WE0
IDE RST
CS#1
CS#3
D0-15
D0-15
A0-21
D0-15
+3.3V
MS
SW
Q461,462
+3.3V
PTJ0
106
CKE
105
CS3
99
10
9
X402
20MHz
EXT
AL1
XT
AL1
2
3
X401
22.579MHz
XT
AL0
EXT
AL0
IC1011
DELAY
LED
DRIVE
Q191-193
D191-193
HDD+5V
+3.3V
1
3
IC1001
3.3V REG
HDD+5V
+3.3V
1
3
IC702
1.8V REG
HDD+5V
+1.8V
USB
• Signal Path
• R-CH is omitted due to same as L-CH.
: HDD(REC)
: CD/DIGITAL-IN
: HDD(PB)
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