Sony CMT-EP404 / HCD-EP404 Service Manual ▷ View online
26
26
HCD-EP404
6-10. Schematic Diagram POWER Section
0
5
0.7
5.8
5.7
No mark : FM
AC IN
POWER TRANSFORMER
POWER TRANSFORMER
2SC536NP-F
2SA608SP-G
Q205,206
POWER ON/OFF
RELAY DRIVE
50V
22000p
22000p
22000p
22000p
22000p
22000p
22000p
22000p
22000p
22000p
22000p
22000p
22000p
22000p
25v
MTZJ-T-72-6.8B
MTZJ-T-
72-6.2B
72-6.2B
50V
TO
MAIN BOARD
(3/3)
A
(Page 22)
POWER BOARD
1
2
A
B
C
D
E
F
3
4
5
6
7
8
9
27
HCD-EP404
• IC Block Diagrams
IC101
LA1823
– MAIN Board –
24
23
FM
RF
1
AM
RF
GND2
2
VCC2
REG
3
AM
MIX
AM
OSC
OSC
BUFFER
4
22
21
VCC1
20
FM
OSC
PHASE
COMP
FM
MIX
DECODER
5
6
19
GND1
7
MUTE
8
18
17
16
9
15
PILOT
DET
14
FM
DET
13
10
FM
S-METER
11
12
ST
ST SW
FF
VCO
FF
FF
TRIG
AM
IF
AM
DET
AGC
FM
IF
SD
IF
BUFFER
FMRF IN
RF GND
FMRF OUT
VCC2
FM OSC
DET OUT
MUTE
R
L
AM/FM
MO/ST
FM DET
AMRF IN
REG
AM OSC
VCC1
FM MIX
GND
FM BUFFER
AM OSC BUFFER
AM MIX
QUAD
AMIF
SD
IC102
LC72131
PHASE
DETECTOR
CHARGE PUMP
SWALLOW COUNTER
1/16, 1/17 4BITS
12BITS
PROGRAMMABLE
DRIVER
UNIVERSAL
COUNTER
REFERENCE
DIVIDER
POWER
ON
RESET
1/2
CCB
INTERFACE
1
3 4 5 6
7 8 9 10
18
17
16
15
13
12
11
19
20
21
22
XOUT
VSS
AOUT
AIN
PD
VDD
FMIN
AMIN
14
NC
XIN
DO
CL
DI
CE
2
NC
IFIN
IO1
BO4
BO3
BO2
BO1
IO2
UNLOCK
DETECTOR
DATA SHIFT REGISTER LATCH
28
HCD-EP404
IC401
LC75392
IC702
AN7312
+
–
3
6
9
12
15
2
5
8
11
14
1
4
7
10
13
28
25
22
19
16
29
26
23
20
17
30
27
24
21
18
+
–
+
–
–
+
–
–
LATCH
DECODER
CONTROL
SHIFT
REGISTER
–
+
LVROUT
LVRIN
LTOUT
LTCOM
LT4
LT3
LT2
LT1
L4
L3
L2
L1
VDD
CL
DI
RVROUT
RVRIN
RTOUT
RTCOM
RT4
RT3
RT2
RT1
R4
R3
R2
R1
VREF
VSS
CE
RIPPLE FILTER
ALC
14
13
12
1
2
3
11
10
9
AMP. CH2
AMP. CH1
8
4
5
6
7
VCC
RF
ALC IN2
OUT2
PC2
NF2
IN2
GND
ALC CONST
ALC IN1
OUT1
PC1
NF1
IN1
IC701
uPC1330HA-NA
1
2
3
4
5
6
7
8
9
INVERTER
COMPARATER
SW R1
GND
SW P1 CONT
GND
VCC
SW P2 GND
SW R2
29
HCD-EP404
6-12. IC Pin Function Description
• IC301
µ
PD780306GC-A68-8EU System Controller, Liquid Crystal Display Driver (DISPLAY Board)
Pin No.
1
2
3
4
5
6
7
8
9
10, 11
12
13
14
15
16
17
18
19
20
21
22
23 to 26
27
28 to 30
31
32 to 59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
I/O
I
I
I
I
I
I
I
–
–
O
–
O
I/O
O
O
O
O
O
O
O
O
O
O
I
–
O
O
O
O
O
O
–
I
–
I
I
I
I
I
O
O
I/O
I
O
–
I
O
–
I
Pin Name
KEY2
KEY3
KEY4
KEY5
ANALYSER
STATION
RDSDATA
AVDD
AVREF
CDOUT1, CDOUT2
VSS
TIME
CDDATA
CDRESET
REC-EN
INPINENA
REC-LED
SOUNDENA
PLLENA
MUTE
POWER
COM0 to COM3
BIAS
VLC0 to VLC2
VSS
LCD4 to LCD31
LCD32
LCD33
LCD34
LCD35
LCD36
NC
24/12
NC
AMS
RDS
BLINK
REC_RVS
DATAIN
DATAOUT
CLK
EEPROMDATA
STEREO
EEPROMCLK
VSS
X1
X2
VDD
XT1
Description
Key input terminal (A/D input) SW306 to SW309 (x , X , N , TUNER MEM/ENTER)keys input
Key input terminal (A/D input) SW310 to SW312 (PRESET +/–, DISPLAY)keys input
Key input terminal (A/D input)
SW313 to SW315 (TUNING – . m , TUNING + M >, MUSIC MENU)keys input
Key input terminal (A/D input) SW316, SW317 (MEGA BASS, z )keys input
Analyzer level detection signal input terminal (A/D input) Not used (open)
Tuning detection signal input from the LA1823 (IC101)(A/D input)
Selection data input from the Q301
Power supply terminal
Reference voltage input terminal for A/D converter
Not used (open)
Ground terminal
LED control signal output
Two-way data bus with the CD block
Reset signal output to the CD block “L ”:reset
Recording bias switch control signal output
Mega bass on/off selection signal output “H ”:mega bass on
LED control signal output
Function switch and electronic volume LC75392 (IC401) chip enable signal output
PLL chip enable signal output to the FM/AM PLL (IC102) “H ” active
Audio line muting on/off control signal output “H ”:muting on
System power on/off control signal output “H ”:power on
Common drive signal output to the liquid crystal display
Bias output for the liquid crystal display drive
Input terminal for liquid crystal display drive voltage
Ground terminal
Segment drive signal output to the liquid crystal display
Segment drive signal output to the liquid crystal display Mode selection signal output
Segment drive signal output to the liquid crystal display Mode selection signal output
Segment drive signal output to the liquid crystal display Mode selection signal output
Segment drive signal output to the liquid crystal display Mode selection signal output
Segment drive signal output to the liquid crystal display
Not used (open)
Mode switch detection signal input
Not used (open)
Half switch detection signal input
Not used (open)
Rec-proof switch detection signal input
Not used
Serial data input from the FM/AM PLL (IC102)
Serial data output to the FM/AM PLL (IC102) and LC75392 (IC401)
Serial data transfer clock signal output to the FM/AM PLL (IC102) and LC75392 (IC401)
Two-way data bus with the EEPROM (IC302)
FM stereo detection signal input from the LA1823 (IC101) “L ”:stereo
Clock signal output to the EEPROM (IC302)
Internal connection terminal (connected to ground)
Main system clock output terminal (4.194304 MHz)
Main system clock input terminal (4.194304 MHz)
Power supply terminal
Sub system clock input terminal (32.768 kHz) Not used (open)
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