DOWNLOAD Sony CMT-EH55DAB / HCD-EH55DAB Service Manual ↓ Size: 3.93 MB | Pages: 50 in PDF or view online for FREE

Model
CMT-EH55DAB HCD-EH55DAB
Pages
50
Size
3.93 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
cmt-eh55dab-hcd-eh55dab.pdf
Date
PREV: Sony SS-CEH55 Service Manual

Sony CMT-EH55DAB / HCD-EH55DAB Service Manual ▷ View online

HCD-EH55DAB
29
IC401  BD38881FV
28
REC1O
27
REC1N
26
REC2N
25
REC2O
24
INC2
23
INC1
22
INB2
21
INB1
20
INA2
19
INA1
18
OUT1
17
BAS1
16
OUT2
15
BAS2
BASS
BASS
13
CONT
14
VEE
12
VDD
11
TRE2
10
TRE1
TREBLE
TREBLE
7
VOLIN1
8
VOLIN2
9
GND
VOLUME
VOLUME
6
PB1O
LOGIC
CONTROL
5
PB2O
4
PB2N
1
PB1N
2
PB1P
3
PB2P
IC451, 452  NJM2521M (TE2)
VOUT
VCC
VIN3 (MUTE)
1
2
3
4
5
6
7
GND
BUFFER
VIN1
VIN2
SW1
SW2
8
BIAS
IC601  MM3291CNRE
VDD 1
GND 2
CE 3
NC
4
REGULATOR
VOUT
5
– PT-VBUS Board –
IC901  PQ1CG2032FZ
1
VIN
2
VOUT
3
COM
4
OADJ
5
ON/OFF
ON/OFF
CIRCUIT
VOLTAGE
REGULATOR
SOFT START
R
Q
S
OVERCURRENT
DETECTION
CIRCUIT
OCSILLATION
OVERHEAT
DETECTION
CIRCUIT
+
–
–
+
PWM COMPARATOR
ERROR
AMP
HCD-EH55DAB
30
•  IC Pin Function Description
CD BOARD  IC101 (CD-MP3 PROCESSOR)  TC94A70FG-006 (D, HZ
Pin No.
Pin Name
I/O
Description
1
AVSS3
-
Ground terminal
2
RFZi
I
RF ripple zero crossing signal input terminal
3
RFRP
O
RF ripple signal output terminal
4
SBAD/RFDC
O
Sub beam addition signal or RF peak detection signal output terminal    Not used
5
FEi
O
Focus error signal output terminal    Not used
6
TEi
O
Tracking error signal output terminal
7
TEZi
I
Tracking error zero crossing signal input terminal
8
AVDD3
-
Power supply terminal (+3.3 V)
9
FOo
O
Focus coil drive signal output terminal
10
TRo
O
Tracking coil drive signal output terminal
11
VREF
I
Reference voltage (+1.65V) input terminal
12
FMo
O
Sled motor drive signal output terminal
13
DMo
O
Spindle motor drive signal output terminal
14
VSSP3
-
Ground terminal
15
VCOi
I
VCO control voltage input terminal
16
VDDP3
-
Power supply terminal (+3.3 V)
17
VDD1
-
Power supply terminal (+1.5 V)
18
VSS
-
Ground terminal
19
FGiN
I
FG signal input terminal    Not used
20
IO0 (/HSO)
I
Disc inner position detection signal input terminal
21
IO1 (/UHSO)
O
Not used
22
XVSS3
-
Ground terminal
23
XI
I
System clock input terminal (16.9344 MHz)
24
XO
O
System clock output terminal (16.9344 MHz)
25
XVDD3
-
Power supply terminal (+3.3 V)
26
DVSS3
-
Ground terminal
27
RO
O
Audio data (R-ch) output to the input selector
28
DVDD3
-
Power supply terminal (+3.3 V)
29
DVR
O
Reference voltage (+1.65V) output terminal
30
LO
O
Audio data (L-ch) output to the input selector
31
DVSS3
-
Ground terminal
32
VDDT3
-
Power supply terminal (+3.3 V)
33
VSS1
-
Ground terminal
34
VDD1
-
Power supply terminal (+1.5 V)
35
VDDM1
-
Power supply terminal (+1.5 V)
36
SRAMSTB
I
S-RAM standby mode control signal input terminal    Fixed at "L" in this set
37
XRST
I
Reset signal  input from the system controller    "L": reset
38, 39
BUS0, BUS1
I
Serial data input from the system controller
40
BUS2 (SO)
I
Serial data input from the system controller
41
BUS3 (SI)
I
Serial data input from the system controller
42
BUCK (CLK)
I
Serial data transfer clock signal input from the system controller
43
XCCE
I
Chip enable signal input from the system controller
44
TEST
I
Setting terminal for test mode    Normally fi xed at "L"
45
IRQ
I
Interrupt request signal input terminal    Not used
46
AoUT3 (PO4) 
O
Request signal output terminal    Not used
47
AoUT2 (PO5)
O
Audio data output terminal    Not used
48
PIO0
O
Request signal output to the system controller
49, 50
PIO1, PIO2
O
Not used
51
PIO3
I
Gate signal input terminal    Not used
52
VSS1
-
Ground terminal
53
VDDT3
-
Power supply terminal (+3.3 V)
54
SBSY
O
Subcode block sync signal output to the system controller
55
SBOK/FOK
O
Not used
HCD-EH55DAB
31
Pin No.
Pin Name
I/O
Description
56
IPF
O
Not used
57
SFSY/LOCK
O
Not used
58
ZDET
O
Zero detection signal output terminal    Not used
59
GPIN
I
Not used
60
MS
I
Microcomputer interface mode selection signal input terminal    Fixed at "H" in this set
61
DOUT (PO6)
O
Digital audio data output terminal    Not used
62
AOUT (PO7)
O
Audio data output terminal    Not used
63
BCK (PO8)
O
Bit clock signal output terminal    Not used
64
LRCK (PO9)
O
L/R sampling clock signal output terminal    Not used
65
AIN (PI4)
I
Digital audio data input terminal    Not used
66
BCKi (PI5)
I
Bit clock signal input terminal    Not used
67
LRCKi (PI6)
I
L/R sampling clock signal input terminal    Not used
68
VDD1
-
Power supply terminal (+1.5 V)
69
VSS
-
Ground terminal
70
AWRC
-
Not used
71
PVDD3
-
Power supply terminal (+3.3 V)
72
PDO
O
Phase error margin signal between EFM signal and PLCK signal output terminal
73
TMAXS
O
TMAX detection signal output terminal    Not used
74
TMAX
O
TMAX detection signal output terminal
75
LPFN
I
Inverted signal input from the operation amplifi er for PLL loop fi lter
76
LPFo
O
Signal output from the operation amplifi er for PLL loop fi lter
77
PVREF
I
Reference voltage (+1.65V) input terminal
78
VCOF
O
VCO fi lter output terminal
79
PVSS3
-
Ground terminal
80
SLCo
O
EFM slice level output terminal
81
RFi
I
RF signal input terminal
82
RFRPi
I
RF ripple signal input terminal
83
RFEQo
O
EFM slice level output terminal
84
VRo
O
Reference voltage (+1.65V) output terminal
85
RESiN
O
External resistor connection terminal
86
VMDiR
O
Reference voltage (+1.65V) output terminal for automatic power control circuit
87
TESTR
O
Low-pass fi lter terminal for RFEQO offset correction
88
AGCi
I
RF signal amplitude adjustment amplifi cation input terminal
89
RFo
O
RF signal generation amplifi cation output terminal
90
RVDD3
-
Power supply terminal (+3.3 V)
91
LDo
O
Laser diode on/off control signal output to the automatic power control circuit    
"H": laser diode on
92
MDi
I
Light amount monitor input from the laser diode of optical pick-up block
93
RVSS3
-
Ground terminal
94
FNi2 (C)
I
Main beam (C) input from the optical pick-up block
95
FNi1 (A)
I
Main beam (A) input from the optical pick-up block
96
FPi2 (D)
I
Main beam (D) input from the optical pick-up block
97
FPi1 (B)
I
Main beam (B) input from the optical pick-up block
98
TPi (F)
I
Sub beam (F) input from the optical pick-up block
99
TNPC
O
External capacitor connection terminal
100
TNi (E)
I
Sub beam (E) input from the optical pick-up block
HCD-EH55DAB
32
USB BOARD  IC101  BU9428JKV-E2 (USB CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
RESETX
I
Reset signal input from the system controller    "L": reset
2
SEL_SLAVE
I
Mode selection signal input terminal    "L": slave mode, "H": stand alone mode    
Fixed at "L" in this set
3
SEL_MP3
I
MP3 play mode selection signal input terminal    
"L": MP1, MP2 and MP3 play, "H": MP3 play only    Fixed at "L" in this set
4
SEL_DOUT
I
Digital/analog output mode selection signal input terminal    
"L": digital output, "H": analog output    Fixed at "L" in this set
5
SEL_VOL
I
Volume control mode selection signal input terminal    
"L": volume control invalid, "H": volume control valid    Fixed at "L" in this set
6
SEL_APLAY
I
Auto play mode on/off control signal input terminal    "L": auto play on, "H": auto play off    
Fixed at "H" in this set
7
SEL_UTPKT
I
USB test packet output on/off control signal input terminal    
"L": USB test packet output on, "H": USB test packet output off    Fixed at "H" in this set
8, 9
TEST1, TEST2
-
Fixed at "H"
10
MCHNG
I
Music change signal input from the system controller
11
BUSY
O
Command operation busy signal output to the system controller
12
SCL
I
I2C clock signal input from the system controller
13
SDA
I/O
Two-way I2C data bus with the system controller
14, 15
A0, A1
I
I2C slave address signal input terminal    Fixed at "L" in this set
16
SEL_SMAN
I
Slave mode selection signal input terminal    "L": slave mode 3, "H": slave mode 2    
Fixed at "H" in this set
17
TEST3
-
Not used
18
DVDDIO
-
Power supply terminal (+3.3V)
19
TEST4
-
Not used
20
NC
-
Not used
21 to 23
TEST6 to TEST8
O
Not used
24
DVSS
-
Ground terminal
25
TEST9
-
Not used
26
CLKOUT12
O
Clock output terminal (12 MHz)    Not used
27
DVDD
-
Power supply terminal (+1.5V)
28 to 30
TEST11 to TEST13
-
Not used
31
ATEST1
-
Not used
32
AVDDC
-
Power supply terminal (+3.3V)
33
USB_DM
I/O
Two-way data (minus) bus with the USB connector
34
USB_DP
I/O
Two-way data (plus) bus with the USB connector
35
AVSSC
-
Ground terminal
36
REXTI
I
Connect bias resistor to ground terminal
37
VOREFI
-
Not used
38
VDD_PLL
-
Power supply terminal (+3.3V)
39
TEST_PLL
-
Not used
40
XIN_PLL
I
System clock input terminal (16.9344 MHz)
41
XOUT_PLL
O
System clock output terminal (16.9344 MHz)
42
VSS_PLL
-
Ground terminal
43
DAVSS
-
Ground terminal
44
RDACO
O
Line output terminal (R-ch)    Not used
45
VCDACO
O
Reference voltage output terminal    Not used
46
LDACO
O
Line output terminal (L-ch)    Not used
47
DAVDD
-
Power supply terminal (+3.3V)
48
AMUTE
O
Audio muting control signal output terminal    Not used
49 to 52
TEST14 to TEST17
-
Not used
53
LRCK
O
I2S clock signal output to the D/A converter
54
BCK
O
I2S bit clock signal output to the D/A converter
55
DATA
O
I2S data output to the D/A converter
56
TEST18
-
Not used
57
DVDD
-
Power supply terminal (+1.5V)
58 to 61
TEST19 to TEST22
-
Not used
62
DVSS
-
Ground terminal
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