Sony CMT-DH40R / HCD-DH40R Service Manual ▷ View online
HCD-DH40R
53
IC903, 904 SI-8050S-LF1101
OVER
CURRENT
PROTECTOR
LATCH
&
DRIVER
OVER HEAT
PROTECTOR
REGULATOR
+
–
–
+
–
–
RESET
VREF
COMPARATOR
ERROR AMP
OSC
1
VIN
2
SW OUT
3
GND
4
VOS
5
S.S
IC907 TK11133CSCL-G
CONTROL
CIRCUIT
BANDGAP
REFERENCE
+
–
OVER HEAT &
OVER CURRENT
PROTECTION
1
VCONT
3
NP
2
GND
4
VOUT
5
VIN
HCD-DH40R
54
• IC Pin Function Description
DMB20 BOARD IC2006 CXD9894R-A (RF AMP, SERVO DSP, MPEG DECODER, AUDIO PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
OSC
O
RF offset cancellation capacitor connecting terminal
2
RFGC
O
RF AGC loop capacitor connecting terminal for DVD-ROM
3
IREF
I
Reference current input terminal
4
AVDD3
-
Power supply terminal (+3.3V)
5
AGND
-
Ground terminal
6
DVDA
I
AC coupled input path A
7
DVDB
I
AC coupled input path B
8
DVDC
I
AC coupled input path C
9
DVDD
I
AC coupled input path D
10
DVDRF IP
I
AC coupled DVD RF signal input from the optical pick-up block
11
MA
I
DC coupled main-beam RF signal input A
12
MB
I
DC coupled main-beam RF signal input B
13
MC
I
DC coupled main-beam RF signal input C
14
MD
I
DC coupled main-beam RF signal input D
15
SA
I
DC coupled sub-beam RF signal input A Not used
16
SB
I
DC coupled sub-beam RF signal input B Not used
17
TNI
I
3 beam satellite PD signal negative input from the optical pick-up block
18
TPI
I
3 beam satellite PD signal positive input from the optical pick-up block
19, 20
MDI1, MDI2
I
Laser power monitor input from the optical pick-up block
21
LDO2
O
Laser diode drive signal output to the optical pick-up block (for DVD)
22
LDO1
O
Laser diode drive signal output to the optical pick-up block (for CD)
23
SVDD3
-
Power supply terminal (+3.3V)
24
CSO
O
Central servo signal output terminal Not used
25
RFLVL
O
RFRP low pass output terminal Not used
26
SGND
-
Ground terminal
27
V2REFO
O
Reference voltage (+2.8V) output terminal
28
V2O
O
Reference voltage (+2V) output to the optical pick-up block
29
VREFO
O
Reference voltage (+1.4V) output terminal
30
FEO
O
Focus error monitor output terminal Not used
31
TEO
O
Tracking error monitor output terminal Not used
32
TEZISLV
O
Slice level of tracking error signal output terminal Not used
33
OPOUT
O
Output from the internal operational amplifi er Not used
34
OP_INN
I
Negative input to the internal operational amplifi er Not used
35
OP_INP
I
Spindle motor hall sensor input from the motor driver
36
DMO
O
Spindle motor control signal output to the motor driver
37
FMO
O
Sled motor control signal output to the motor driver
38
TROPENPWM
O
Loading motor control signal output to the motor driver
39
IOPMON
I
Power monitor terminal
40
TRO
O
Tracking coil control signal output to the coil driver
41
FOO
O
Focus coil control signal output to the coil driver
42
AGND18
-
Ground terminal
43
AVDD18
-
Power supply terminal (+1.8V)
44
USB_DP
I/O
Two-way data (positive) bus with the USB connector
45
USB_DM
I/O
Two-way data (negative) bus with the USB connector
46
USB_VDD3
-
Power supply terminal (+3.3V)
47
USB_VSS
-
Ground terminal
48
PAD_VRT
I/O
Reference current terminal generated with USB Not used
49
USB_VDD18
-
Power supply terminal (+1.8V)
50
USB_VSS
-
Ground terminal
51
USB_XO
O
System clock output terminal for USB Not used
52
USB_XI
I
System clock input terminal for USB Not used
53
LIMITSW
I
Limit detection switch input terminal
54
MSW
O
CD/DVD selection signal output terminal “L”: CD, “H”: DVD
55
DVDD18
-
Power supply terminal (+1.8V)
56 to 64
HA2 to HA8, HA18,
HA19
O
Address signal output to the fl ash ROM
65
DVDD3
-
Power supply terminal (+3.3V)
HCD-DH40R
55
Pin No.
Pin Name
I/O
Description
66
XWR
O
Write enable signal output to the fl ash ROM
67 to 75
HA16 to HA9, HA20
O
Address signal output to the fl ash ROM
76
XROMCS
O
Chip select signal output to the fl ash ROM
77
HA1
O
Address signal output to the fl ash ROM
78
XRD
O
Read enable signal output to the fl ash ROM
79, 80
HD0, HD1
I/O
Two-way data bus with the fl ash ROM
81
DVSS
-
Ground terminal
82 to 86
HD2 to HD6
I/O
Two-way data bus with the fl ash ROM
87
HA21
O
Address signal output to the fl ash ROM
88
RESERVED
-
Not used
89
HD7
I/O
Two-way data bus with the fl ash ROM
90
DVSS
-
Ground terminal
91, 92
HA17, HA0
O
Address signal output to the fl ash ROM
93
DVDD18
-
Power supply terminal (+1.8V)
94
FWD
O
Loading motor drive signal output terminal (forward direction)
95
REV
O
Loading motor drive signal output terminal (reverse direction)
96
DVDD3
-
Power supply terminal (+3.3V)
97
IFSDO
O
Serial data output to the system controller
98
IFCK
O
Serial data transfer clock signal output to the system controller
99
xIFCS
O
Chip select signal output to the system controller
100
IFSDI
I
Serial data input from the system controller
101
SCL
O
Serial data transfer clock signal output to the EEPROM
102
SDA
I/O
Two-way data bus with the EEPROM
103
CKSW
I
Chucking detection switch input terminal
104
OCSW
I
Disc slot in/out detection switch input terminal “L”: disc slot in
105
RXD
I
Receive data input terminal for UART communication when data writing to fl ash memory
106
TXD
O
Transmit data output terminal for UART communication when data writing to fl ash memory
107
ICE
I
ICE mode enable signal input terminal Not used
108
xSYSRST
I
Reset signal input from the system controller “L”: reset
109
RESERVED
-
Not used
110
xIFBSY
I
Busy request signal input from the system controller
111
DQM0
O
Data mask signal output to the SD-RAM
112
EEWP
O
Write protect signal output to the EEPROM
113 to
117
RD7 to RD3
I/O
Two-way data bus with the SD-RAM
118
DVDD3
-
Power supply terminal (+3.3V)
119 to
129
RD2 to RD0,
RD15 to RD8
I/O
Two-way data bus with the SD-RAM
130
TSD_M
O
Thermal shut down signal output to the motor/coil driver
131
DVDD3
-
Power supply terminal (+3.3V)
132
DQM1
O
Data mask signal output to the SD-RAM
133
_RWE
O
Write enable signal output to the SD-RAM
134
_CAS
O
Column address strobe signal output to the SD-RAM
135
_RAS
O
Row address strobe signal output to the SD-RAM
136
_RCS
O
Chip select signal output to the SD-RAM
137, 138
BA0, BA1
O
Bank address signal output to the SD-RAM
139 to
141
RA10, RA0, RA1
O
Address signal output to the SD-RAM
142
DVDD18
-
Power supply terminal (+1.8V)
143, 144
RA2, RA3
O
Address signal output to the SD-RAM
145
DVDD3
-
Power supply terminal (+3.3V)
146
DRCLK
O
Serial data transfer clock signal output to the SD-RAM
147
CKE
O
Clock enable signal output to the SD-RAM
148
DVSS
-
Ground terminal
149 to
155
RA11, RA9 to RA4
O
Address signal output to the SD-RAM
156
DVDD3
-
Power supply terminal (+3.3V)
157
MUTE123
O
Muting signal output to the motor/coil driver
158
MUTE
O
Muting signal output to the motor/coil driver
159
DDC_DA
I/O
Two-way I2C data bus with the HDMI OUT connector
HCD-DH40R
56
Pin No.
Pin Name
I/O
Description
160
DVDD18
-
Power supply terminal (+1.8V)
161
DDC_CLK
I/O
Two-way I2C clock bus with the HDMI OUT connector
162
HTPLG
I
HDMI hot-plug detection signal input from the HDMI OUT connector
163
AGND3
-
Ground terminal
164
EXT_RES
I
External resister connecting terminal
165, 166
AVDD3
-
Power supply terminal (+3.3V)
167
EXT_CAP
I
External capacitor connecting terminal
168, 169
AGND3, AGND18
-
Ground terminal
170
TXCN
O
TMDS clock signal (negative) output to the HDMI OUT connector
171
TXCP
O
TMDS clock signal (positive) output to the HDMI OUT connector
172
DVDD18
-
Power supply terminal (+1.8V)
173
TX0N
O
TMDS data (negative) output to the HDMI OUT connector
174
TX0P
O
TMDS data (positive) output to the HDMI OUT connector
175
DVDD18
-
Power supply terminal (+1.8V)
176
TX1N
O
TMDS data (negative) output to the HDMI OUT connector
177
TX1P
O
TMDS data (positive) output to the HDMI OUT connector
178
DVDD18
-
Power supply terminal (+1.8V)
179
TX2N
O
TMDS data (negative) output to the HDMI OUT connector
180
TX2P
O
TMDS data (positive) output to the HDMI OUT connector
181
AGND18
-
Ground terminal
182
R/Cr/Pr
O
Component video (Cr/Pr) signal output to the video amplifi er
183
B/Cb/Pb
O
Component video (Cb/Pb) signal output to the video amplifi er
184
DACVSSA
-
Ground terminal
185
Y/G
O
Component video (Y) signal output to the video amplifi er
186
DACVDDA
-
Power supply terminal (+3.3V)
187
CVBS
O
Video signal output to the video amplifi er
188
DACVSSB
-
Ground terminal
189
C
O
Chroma signal output terminal Not used
190
DACVDDB
-
Power supply terminal (+3.3V)
191
Y
O
Y signal output terminal Not used
192
DACVSSC
-
Ground terminal
193
FS
-
Full scale adjustment terminal
194
VREF
-
Bandgap reference voltage terminal
195
DACVDDC
-
Power supply terminal (+3.3V)
196
VBUS_OE
O
Power supply on/off control signal output terminal for USB “H”: power on
197
VBUS_OC
I
VBUS over current detection signal input terminal
198
SCORE
I
Score signal input terminal
199
DACSDA
I/O
Two-way I2C data bus terminal Not used
200
DACSCL
I/O
Two-way I2C clock bus terminal Not used
201
SPLRCK
O
L/R sampling clock signal output terminal Not used
202
SPDATA
O
Audio serial data output terminal Not used
203
ACLK
O
Master clock signal output to the D/A converter and A/D converter
204
ABCK
O
Bit clock signal output to the D/A converter and A/D converter
205
ALRCK
O
L/R sampling clock signal output to the D/A converter and A/D converter
206
ADIN
I
Audio serial data input from the A/D converter
207
DVDD3
-
Power supply terminal (+3.3V)
208
MIC
I
Microphone request signal input from the system controller
209
WIDE
O
Normal/squeeze selection signal output terminal Not used
210
RGB_SEL/DSEL
-
RGB selection signal or interlace/progressive selection signal output terminal Not used
211
TRG_SW
I
Trigger detection switch input terminal Not used
212
DVDD18
-
Power supply terminal (+1.8V)
213
KMOD
O
Karaoke mode selection signal output to the system controller “H”: karaoke mode
214
XVOICE
I
Voice signal input terminal
215
SPDIF
O
S/PDIF signal output terminal
216
APLLVDD3
-
Power supply terminal (+3.3V)
217
APLLCAP
-
External capacitor connecting terminal
218
APLLVSS
-
Ground terminal
219, 220
ADACVSS2,
ADACVSS1
-
Ground terminal
221
DAC_XRST
O
Reset signal output to the D/A converter “L”: reset
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