Sony CMT-DH3 / CMT-DH5BT / CMT-DH7BT / HCD-DH3 / HCD-DH5BT / HCD-DH7BT Service Manual ▷ View online
65
HCD-DH3/DH5BT/DH7BT
•
IC Pin Function Description
DMB15 BOARD IC102 CXD9849R (RF AMP, SERVO DSP, MPEG DECODER)
Pin No.
Pin Name
I/O
Description
1
AGND
-
Ground terminal
2
DVDA
I
AC coupled input path A
3
DVDB
I
AC coupled input path B
4
DVDC
I
AC coupled input path C
5
DVDD
I
AC coupled input path D
6
DVDRFIP
I
AC coupled DVD RF signal input from the optical pick-up block
7
DVDRFIN
I
AC coupled DVD RF signal input terminal Not used
8
MA
I
DC coupled main-beam RF signal input A
9
MB
I
DC coupled main-beam RF signal input B
10
MC
I
DC coupled main-beam RF signal input C
11
MD
I
DC coupled main-beam RF signal input D
12
SA
I
DC coupled sub-beam RF signal input A Not used
13
SB
I
DC coupled sub-beam RF signal input B Not used
14
SC
I
DC coupled sub-beam RF signal input C Not used
15
SD
I
DC coupled sub-beam RF signal input D Not used
16
CDFON
I
CD focusing error negative input terminal Not used
17
CDFOP
I
CD focusing error positive input terminal Not used
18
TNI
I
3 beam satellite PD signal negative input from the optical pick-up block
19
TPI
I
3 beam satellite PD signal positive input from the optical pick-up block
20, 21
MDI1, MDI2
I
Laser power monitor input from the optical pick-up block
22
LDO2
O
Laser diode drive signal output to the optical pick-up block (for DVD)
23
LDO1
O
Laser diode drive signal output to the optical pick-up block (for CD)
24
SVDD3
-
Power supply terminal (+3.3V)
25
CSO
O
Central servo signal output terminal Not used
26
RFLVL
O
RFRP low pass output terminal Not used
27
SGND
-
Ground terminal
28
V2REFO
O
Reference voltage (+2.8V) output terminal Not used
29
V2O
O
Reference voltage (+2V) output to the optical pick-up block
30
VREFO
O
Reference voltage (+1.4V) output terminal
31
FEO
O
Focus error monitor output terminal Not used
32
TEO
O
Tracking error monitor output terminal Not used
33
TEZISLV
O
Slice level of tracking error signal output terminal Not used
34
OPOUT
O
Output from the internal operational amplifier Not used
35, 36
OPIN
I
Input to the internal operational amplifier Not used
37
DMO
O
Spindle motor control signal output to the motor driver
38
FMO
O
Sled motor control signal output to the motor driver
39
TROPENPWM
O
Loading motor control signal output to the motor driver
40
IOPMON
I
Power monitor terminal
41
TRO
O
Tracking coil control signal output to the coil driver
42
FOO
O
Focus coil control signal output to the coil driver
43
DVSS
-
Ground terminal
44, 45
NC
-
Not used
46
DVDD3
-
Power supply terminal (+3.3V)
47
SPFG
I
Spindle motor hall sensor input from the motor driver
48
DSEL
O
Interlace/progressive selection signal output to the video amplifier
"L": progressive, "H": interlace
"L": progressive, "H": interlace
66
HCD-DH3/DH5BT/DH7BT
Pin No.
Pin Name
I/O
Description
49
WIDE
O
Normal/squeeze selection signal output to the video amplifier
"L": normal, "H": squeeze
"L": normal, "H": squeeze
50
MSW
O
CD/DVD selection signal output terminal "L": CD, "H": DVD
51
MAMUTE
O
Muting control signal output terminal Not used
52
DVDD18
-
Power supply terminal (+1.8V)
53 to 61
IOA2 to IOA8,
IOA18, IOA19
IOA18, IOA19
O
Address signal output to the flash ROM
62
DVSS
-
Ground terminal
63
APLLCAP
-
Connection terminal for an external capacitor
64
APLLVSS
-
Ground terminal
65
VDD3
-
Power supply terminal (+3.3V)
66
IOWR
O
Write enable signal output to the flash ROM
67 to 72
IOA16 to IOA11
O
Address signal output to the flash ROM
73
DVDD3
-
Power supply terminal (+3.3V)
74 to 76
IOA10, IOA9,
IOA20
O
Address signal output to the flash ROM
77
IOCS
O
Chip select signal output to the flash ROM
78
IOA1
O
Address signal output to the flash ROM
79
IOOE
O
Output enable signal output to the flash ROM
80
DVDD3
-
Power supply terminal (+3.3V)
81 to 84
AD0 to AD3
I/O
Data/address signal input/output terminal with the flash ROM
85
DVSS
-
Ground terminal
86 to 88
AD4 to AD6
I/O
Data/address signal input/output terminal with the flash ROM
89
IOA21
O
Address signal output to the flash ROM
90
ALE
O
Address latch enable signal output terminal Not used
91
AD7
I/O
Data/address signal input/output terminal with the flash ROM
92, 93
IOA17, IOA0
O
Address signal output to the flash ROM
94
DVSS
-
Ground terminal
95
UWR
O
Write enable signal output terminal Not used
96
URD
O
Data read enable signal output terminal Not used
97
DVDD18
-
Power supply terminal (+1.8V)
98
IFSDO
O
Serial data output to the system controller
99
IFCK
O
Serial data transfer clock signal output to the system controller
100
XIFCS
O
Chip select signal output to the system controller
101
IFSDI
I
Serial data input from the system controller
102
SCL
O
Serial data transfer clock signal output to the EEPROM and D/A converter
103
SDA
I/O
Two-way data bus with the EEPROM and D/A converter
104
TRG-SW
I
Trigger detection switch input terminal
105
IFBSY
I
Busy signal input from the system controller
106
RXD
I
Receive data input terminal for UART communication when data writing to flash memory
107
TXD
O
Transmit data output terminal for UART communication when data writing to flash memory
108
DVDD3
-
Power supply terminal (+3.3V)
109
ICE
I
ICE mode enable signal input terminal Not used
110
PRST
I
Reset signal input from the system controller "L": reset
111
IR
I
IR control signal input terminal Not used
112
INT0
O
Interrupt request signal output terminal Not used
113
DQM0
O
Data mask signal output to the SD-RAM
114
MREQ
O
Muting request signal output terminal Not used
67
HCD-DH3/DH5BT/DH7BT
Pin No.
Pin Name
I/O
Description
115
RD7
I/O
Two-way data bus with the SD-RAM
116
DVSS
-
Ground terminal
117, 118
RD6, RD5
I/O
Two-way data bus with the SD-RAM
119
DVSS
-
Ground terminal
120, 121
RD4, RD3
I/O
Two-way data bus with the SD-RAM
122
DVDD18
-
Power supply terminal (+1.8V)
123 to 126
RD2 to RD0, RD15
I/O
Two-way data bus with the SD-RAM
127
DVDD3
-
Power supply terminal (+3.3V)
128 to 133
RD14 to RD9
I/O
Two-way data bus with the SD-RAM
134
DVSS
-
Ground terminal
135
RD8
I/O
Two-way data bus with the SD-RAM
136
GPIO
-
Not used
137
DQM1
O
Data mask signal output to the SD-RAM
138
RWE
O
Write enable signal output to the SD-RAM
139
CAS
O
Column address strobe signal output to the SD-RAM
140
RAS
O
Row address strobe signal output to the SD-RAM
141
DVDD3
-
Power supply terminal (+3.3V)
142
RCS
O
Chip select signal output to the SD-RAM
143
BA0
O
Bank address signal output to the SD-RAM
144
DVSS
-
Ground terminal
145
BA1
O
Bank address signal output to the SD-RAM
146, 147
RA10, RA0
O
Address signal output to the SD-RAM
148
DVSS
-
Ground terminal
149 to 151
RA1 to RA3
O
Address signal output to the SD-RAM
152
DVDD18
-
Power supply terminal (+1.8V)
153, 154
NC
-
Not used
155
DVDD3
-
Power supply terminal (+3.3V)
156
RCLK
O
Serial data transfer clock signal output to the SD-RAM
157
CKE
O
Clock enable signal output to the SD-RAM
158 to 160
RA11, RA9, RA8
O
Address signal output to the SD-RAM
161
DVSS
-
Ground terminal
162
RA7
O
Address signal output to the SD-RAM
163
DVSS
-
Ground terminal
164 to 166
RA6 to RA4
O
Address signal output to the SD-RAM
167
DVDD3
-
Power supply terminal (+3.3V)
168
DISC/X
-
Not used
169
RGB
-
Not used
170
TSD_M
O
Thermal shut down signal output to the motor/coil driver
171, 172
NC
-
Not used
173
DVDD18
-
Power supply terminal (+1.8V)
174
FWD
O
Loading motor drive signal output to the motor driver (forward direction)
175
NC
-
Not used
176
LIMSW
I
Limit detection switch input terminal
177
OCSW
I
Disc in/out detection switch input terminal
178
REV
O
Loading motor drive signal output to the motor driver (reverse direction)
179
CKSW
I
Chucking detection switch input terminal
180, 181
NC
-
Not used
68
HCD-DH3/DH5BT/DH7BT
Pin No.
Pin Name
I/O
Description
182
DVDD3
-
Power supply terminal (+3.3V)
183 to 188
NC
-
Not used
189
DAVCC
-
Power supply terminal (+3.3V)
190
VREF
-
For bandgap reference voltage terminal Not used
191
FS
-
Full scale adjustment terminal
192
YUV0
O
Video data output terminal Not used
193
DAVSS
-
Ground terminal
194
YUV1
O
Y signal output to the video amplifier
195
DAVDD
-
Power supply terminal (+3.3V)
196
YUV2
O
Chroma signal output to the video amplifier
197
DAVSS
-
Ground terminal
198
YUV3
O
Video signal output to the video amplifier
199
DAVDD
-
Power supply terminal (+3.3V)
200
YUV4
O
Y signal output to the video amplifier
201
DAVSS
-
Ground terminal
202, 203
YUV5, YUV6
O
Component video signal output to the video amplifier
204
DVDD3
-
Power supply terminal (+3.3V)
205
MIC
I
Microphone signal input detection signal input from the system controller
"H": microphone signal input
"H": microphone signal input
206
VOICE
I
Voice signal input terminal
207
KRMOD
O
Karaoke mode selection signal output to the system controller "H": karaoke mode
208
SMSCK
I
Score signal input terminal
209
SPDATA
I
SPDIF digital audio data input terminal Not used
210
MUTE
O
Muting signal output to the motor/coil driver
211
MUTE123
O
Muting signal output to the motor/coil driver
212
DVDD3
-
Power supply terminal (+3.3V)
213
ALRCK
O
L/R sampling clock signal output to the D/A converter
214
ABCK
O
Bit clock signal output to the D/A converter
215
ACLK
O
Master clock signal output to the D/A converter
216
DVSS
-
Ground terminal
217 to 219
ASDATA1 to
ASDATA2
O
Audio serial data output to the D/A converter
220
XRST
O
Reset signal output to the D/A converter "L": reset
221
DVDD18
-
Power supply terminal (+1.8V)
222
ASDATA4
O
Audio serial data output to the D/A converter
223
DVSS
-
Ground terminal
224
DWIDE
-
Not used
225
SPDIF
O
SPDIF digital audio signal output to the digital optical transceiver
226
RFGND18
-
Ground terminal
227
RFVDD18
-
Power supply terminal (+1.8V)
228
XTALO
O
System clock output terminal (27 MHz)
229
XTALI
I
System clock input terminal (27 MHz)
230
JITFO
O
Output terminal of the RF jitter meter
231
JITFN
I
Input terminal of the RF jitter meter
232
PLLVSS
-
Ground terminal
233
IDAC
-
Not used
234
PLLVDD3
-
Power supply terminal (+3.3V)
235
LPFON
O
Data PLL loop filter output terminal
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