Sony CMT-CPZ1 / HCD-CPZ1 / SS-CCPZ1 Service Manual ▷ View online
HCD-CPZ1
45
45
HCD-CPZ1
NO991
NO992
JW901
JW990
JW992
D994
D992
D993
C994
RY991
T991
SUB POWER
TRANSFORMER
CN990
RY990
D995
C993
Q991
D991
R991
R992
C995
SUB POWER BOARD
(AC IN)
Q
SW POWER
BOARD
CN1
1
2
1
2
E
1
3
1
3
4
5
1-865-274-
11
(12)
L
MAIN
BOARD
CN300
1
2
3
4
5
6
7
A
B
C
D
E
F
IC991
D991
B-6
D992
E-6
D993
E-6
D994
D-6
D995
D-6
IC991
B-6
Q991
B-6
•
Localização do
Semicondutor
Semicondutor
Ref. No. Location
(Page 29)
(Page 42)
7-26. PLACA DE CIRCUITO IMPRESSO – PLACA SUB POWER –
:Utilizada solda sem chumbo.
HCD-CPZ1
46
46
HCD-CPZ1
R992
C994
C995
D993
D992
D991
CN990
NO991
C993
T991
D995
IC991
Q991
R991
NO992
D994
RY991
RY990
C992
C991
100k
100
10V
10V
0.01
10EDB40
10EDB40
1SS355
2P
2P
2200
16V
10EDB40
MM1614ANLE
2SC3052
2.2k
3P
10EDB40
0.01
250V
0.01
250V
NEUTRAL
LIVE
NEUTRAL
LIVE
RELAY ON/OFF
4V(EVER)
GND
VO
VI
CONT
GND
NOISE
SUB POWER
TRANSFORMER
+4V REGULATOR
RELAY DRIVE
(AC IN)
7-27. DIAGRAMA ESQUEMATICO – PLACA
SUB POWER –
–
Os componentes identificados com a marca
0
são críticos para a segurança. Somente os subs-
titua por peças especificadas neste manual.
titua por peças especificadas neste manual.
(Page 43)
(Page 31)
HCD-CPZ1
47
47
HCD-CPZ1
3
IC201
u;
(RFACO)
(CD PLAY mode)
200 mV/DIV, 500 ns/DIV
0.5 to 1.3 Vp-p
22.8
µ
s
3.3 Vp-p
1
IC201
1
(LRCK)
(CD PLAY mode)
1 V/DIV, 10
µ
s/DIV
20.8
µ
s
3.4 Vp-p
ed
IC701
q;
(LRCK)
1 V/DIV, 10
µ
s/DIV
2
IC201
5
(BCK)
(CD PLAY mode)
1 V/DIV, 200 ns/DIV
472 ns
3.3 Vp-p
es
IC701
qa
(BCK)
1 V/DIV, 100 ns/DIV
324 ns
3.3 Vp-p
4
IC201
<z/,
(XTAO)
(CD PLAY mode)
1 V/DIV, 20 ns/DIV
59.4 ns
2.3 Vp-p
qa
T601
4
(TAPE REC mode)
50 V/DIV, 5
µ
s/DIV
11
µ
s
230 Vp-p
qs
Q642, 643 (Collector)
(TAPE REC mode)
(TAPE REC mode)
5 V/DIV, 5
µ
s/DIV
11
µ
s
18 Vp-p
qd
Q642, 643 (Base)
(TAPE REC mode)
(TAPE REC mode)
1 V/DIV, 5
µ
s/DIV
11
µ
s
3.8 Vp-p
ws
IC301
qd
(XOUT)
500 mV/DIV, 20 ns/DIV
62.4 ns
1.0 Vp-p
wa
IC301
qa
(XCOUT)
1 V/DIV, 10
µ
s/DIV
30.6
µ
s
2.7Vp-p
ea
IC701
qg
(SCKI)
1 V/DIV, 50 ns/DIV
81.5 ns
3.1 Vp-p
ef
IC705
rk
(XFSOIN)
500 mV/DIV, 10 ns/DIV
20.6 ns
1.4 Vp-p
ra
IC951
ts
(OSC2)
1 V/DIV, 10
µ
s/DIV
27.3
µ
s
3.6 Vp-p
•
Formas de Ondas
– Placa BD –
– Placa TC –
– Placa AMP –
– Placa PRINCIPAL –
– Placa LCD –
IC402
BA5947FM-E2
•
Diagrama em Blocos do IC
– Placa BD –
1
LEVEL SHIFT
MUTING
D
15
16
+
–
+
–
D
D
17
18
D
19
20
VREF
21
22
23
24
25
26
27
28
PREVCC
OPOUT
OUTVREF
CH4CAPA
CH4IN
CH3FIN
CH3RIN
GND
MUTE
POWVCC
CH3OUTF
CH3OUTR
CH4OUTF
CH4OUTR
OPIN
–
2
OPIN+
INTERFACE
14
13
D
12
11
D
10
9
8
7
6
CH2FIN
CH2RIN
GND
5
4
CH1FIN
CH1RIN
VREFIN
POWVCC
CH2OUTR
CH2OUTF
CH1OUTR
CH1OUTF
INTERFACE
D
D
3
SW
INTERFACE
IC701
BA6956AN
– Placa DRIVER –
1
2
3
4
5
6
7
8
9
CONTROL LOGIC
TSD
VREF
OUT2
OUT1
RNF
VM
VCC
FIN
GND
RIN
IC200
PQ12RF21
– Placa PRINCIPAL –
1
2
3
4
ASO
PROTECTION
CIRCUIT
REFERENCE
VOLTAGE
GENERATION
CIRCUIT
OVERHEAT
PROTECTION
CIRCUIT
OUTPUT
ON/OFF
CONTROL
CIRCUIT
DC INPUT
DC OUTPUT
GND
ON/OFF
CONTROL
48
HCD-CPZ1
IC302
PST3629NR
VDD 2
OUT 1
GND 3
+
–
VREF
CD
5
NC
4
IC501
BD3872FS
32
SEQ1
31
SOUT1
100k
TREBLE1
fo = 10 kHz
TREBLE2
fo = 10 kHz
SURROUND
5
A1
16
GND
100k
6
A2
100k
7
B1
100k
8
B2
100k
9
C1
100k
10
C2
100k
11
D1
100k
12
D2
100k
13
E1
100k
14
E2
15
FILTER
4
SEL2
3
VIN2
2
SEL1
1
VIN1
LOUD
SPEAKER
EQUALIZER1
30
SEQ2
29
SOUT2
28
TNF1
27
TNF2
BASS1
fo = 80 Hz
BASS2
fo = 80 Hz
25
BOUT1
23
BOUT2
22
OUT1
21
OUT2
26
BNF1
24
BNF2
LOGIC
17
SC
18
SI
20
CAP
19
VCC
LOUD
SPEAKER
EQUALIZER2
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