Sony CMT-CPX22 / HCD-CPX22 / HCD-NXM3 / MHC-NXM3 Service Manual ▷ View online
41
HCD-CPX22/NXM3
7-21. IC Pin Function Descriptions
• IC101 CXD3059AR (RF AMP) (BD BOARD)
Pin No.
Pin Name
I/O
Description
1
MIRR
I/O
Mirror signal input/output(Not used)
2
DFCT
I/O
Defect signal input/output (Not used)
3
FOK
I/O
Focus OK signal input/output (Not used)
4
VSS
—
Internal digital ground
5
LOCK
I/O
Not used
6
MDP
O
Spindle motor servo control output
7
SSTP
I
Disk innermost detection signal input
8
IOVSS1
—
I/O digital ground
9
SFDR
O
Sled drive output
10
SFDR
O
Sled drive output
11
TFDR
O
Tracking drive output
12
TRDR
O
Tracking drive output
13
FFDR
O
Focus drive output
14
FFDR
O
Focus drive output
15
IOVDD1
—
I/O digital power supply
16
AVDD0
—
Analog power supply
17
AVSS0
—
Analog ground
18
NC
—
Not used
19
E
I
E signal input
20
F
I
F signal input
21
TEI
I
Tracking error signal input
22
TEO
O
Tracking error signal output
23
FEI
I
Focus error signal input
24
FEO
O
Focus error signal output
25
VC
I/O
Center voltage output from RF amplifier block
26
A
I
A signal input
27
B
I
B signal input
28
C
I
C signal input
29
D
I
D signal input A
30
NC
—
Not used
31
AVDD4
—
Analog power supply
32
RFDCO
O
RFDC signal output (Not used)
33
PDSENS
I
Reference voltage pin
34
AC_SUM
O
RFAC summing amplifier output
35
EQ_IN
I
Equalizer circuit input
36
LD
O
APC output
37
PD
I
APC input
38
NC
—
Not used
39
RFC
I
Equalizer cut-off frequency adjustment pin
40
AVSS4
—
Analog ground
41
RFACO
O
RFAC signal output
42
RFACI
I
RFAC signal input or EFM signal input
43
AVDD3
—
Analog power supply
44
BIAS
I
Asymmetry circuit constant current input
45
ASYI
I
Asymmetry comparator voltage input
46
ASYO
O
EFM full-swing output
47
VPCO
O
Not used
48
VCTL
I
Wide-band EFM PLL VCO2 control voltage input
42
HCD-CPX22/NXM3
Pin No.
Pin Name
I/O
Description
49
AVSS3
—
Analog ground
50
CLTV
I
Multiplier VCO1 control voltage input
51
FILO
O
Master PLL (slave = digital PLL) filter output
52
FILI
I
Master PLL filter input
53
PCO
O
Master PLL charge pump output
54
AVDD5
—
Analog power supply
55
DDVROUT
O
DC/DC converter output
56
DDVRSEN
I
DC/DC converter output voltage monitor input
57
AVSS5
—
Analog ground
58
DDCR
I
DC/DC converter reset input
59
NC
—
Not used
60
BCKI
I
D/A interface bit clock input
61
PCMDI
I
D/A interface serial data input (2’s COMP, MSB first)
62
LRCKl
I
D/A interface LR clock input
63
LRCK
O
D/A interface LR clock output f = Fs
64
VSS
—
Internal digital ground
65
PCMD
O
D/A interface serial data output (2’s COMP, MSB first)
66
BCK
O
D/A interface bit clock output
67
VDD
—
Internal digital power supply
68
EMPH
O
High when the playback disc has emphasis, low it has not
69
EMPHI
I
High when de-emphasis is ON, low when input OFF
70
IOVDD2
—
I/O digital power supply
71
DOUT
O
Digital Out output
72
TEST
I
Test pin Normally ground
73
TES1
I
Test pin Normally ground
74
IOVss2
—
I/O digital ground
75
NC
—
Not used
76
XVSS
—
Master clock ground
77
XTAO
O
Crystal oscillation circuit output
78
XTAI
I
Crystal oscillation circuit input
79
XVDD
—
Master clock power supply
80
AVDD1
—
Analog power supply
81
AOUT1
O
Lch analog output
82
VREFL
O
Lch reference voltage
83
AVSS1
—
Analog ground
84
AVSS2
—
Analog ground
85
VREFR
O
Rch reference voltage
86
AOUT2
O
Rch analog output
87
AVDD2
—
Analog power supply
88
NC
—
Not used
89
IOVDD0
—
I/O digital power supply
90
RMUT
O
Rch “0” detection flag (Not used)
91
LMUT
O
Lch “0” detection flag (Not used)
92
NC
—
Not used
93
XTSL
I
Crystal selection input (Not used)
94
IOVSS0
—
I/O digital ground
95
XTACN
I
Oscillation circuit control
Self-oscillation when high, oscillation stop when low
96
SQSO
O
Subcode Q 80-bit and PCM peak and level data output (Not used)
97
SQCK
I
SQSO readout clock input
43
HCD-CPX22/NXM3
Pin No.
Pin Name
I/O
Description
98
SBSO
O
Subcode P to W serial output (Not used)
99
EXCK
I
SBSO readout clock input (Not used)
100
XRST
I
System reset input
101
SYSM
I
Mute input
102
D ATA
I
Serial data input from CPU
103
VSS
—
Internal digital ground
104
XLAT
I
Latch input from CPU
105
CLOCK
I
Serial data transfer clock input from CPU
106
VDD
—
Sled drive output Internal digital power supply Tracking drive output
107
SENS
O
SENS output to CPU
108
SCLK
I
SENS serial data readout clock input
109
ATSK
I/O
Anti-shock input/output (Not used)
110
WFCK
O
WFCK output (Not used)
111
XUGF
O
XUGF output (Not used)
112
XPCK
O
XPCK output (Not used)
113
GFS
O
GFS output (Not used)
114
C2PO
O
C2PO output (Not used)
115
SCOR
O
High output when the subcode sync, S0 or S1, is detected
116
VDD
—
Internal digital power supply
117
C4M
O
4 2336MHz output (Not used)
118
WDCK
O
Word clock output f = 2Fs (Not used)
119
COUT
I/O
Track number count signal input/output (Not used)
120
NC
—
Not used
44
HCD-CPX22/NXM3
• IC401 M30622MGN-B28FPUO (SYSTEM CONTROL) (MAIN Board)
Pin No.
Pin Name
I/O
Description
1
MP3 CS
O
Chip select signal to CD Digital Processor
2
MP3 LP
O
Latch pulse output to CD Digital Processor and Motor signal output
3
MP3 ACK
I
ACK input from CD Digital Processor and Motor signal input
4
SIRCS
I
Remote commander signal input
5
MP3 DATA OUT
O
Serial data output to the MP3 circuit
6
MP3 DATA IN
I
Serial data input from the MP3 circuit
7
MP3 CLK
O
Serial clock output to the MP3 circuit
8
BYTE
I
External data bus width select input (connected to ground)
9
CN VSS
I
Processor modes switch
10
Xcin
I
Sub clock input (32.768kHz)
11
Xcout
O
Sub clock output (32.768kHz)
12
RESET
I
System reset input
13
Xout
O
Main system clock output (16MHz)
14
Vss
–
Ground
15
Xin
I
Main system clock input (16MHz)
16
Vcc
–
Power supply
17
NMI
I
Non-maskable interrupt input
18
RDS-INT
I
Sirial data taransfer clock signal input
19
SCOR
I
CD Q-DATA request
20
AC-CUT
I
AC cut-off detection signal input
21
SENS
I
Internal status(SENSE) signal input from CXD3059AR
22
CD-DATA
O
Serial data output
23
CD-CLK
O
Serial data transfer clock signal output
24
XLT
O
Serial data latch pulse output
25
XRST
O
Reset signal output to the CD mechanism
26
XCTN
O
XCTN signal output (for Tuner noise reduction)
27
A-MUTE
O
Audio muting on/off control signal output
28
MP3-STANDBY
O
Standby signal output to the MP3 circuit
29
IIC_CLK
I/O
Communication data reading clock signal input or transfer clock siganal output
30
IIC_DATA
I/O
Communication data bus with CD mechanism and Fluorescent indicater
31
MP3 REQ
I
REQ signal input from MP3 circuit
32
MP3 RESET
O
RESET signal output to the MP3 circuit
33
CDM-MOT-POS-1
O
Motor drive signal output (L/D)
34
CDM-MOT-POS-2
O
Motor drive signal output (U/D)
35
CDM-MAIN-SW-CLS
I
Detection signal input from disc tray close detect main switch
36
CDM-SUB-SW-OPN
I
Detection signal input from disc tray open detect sub switch
37
CDM-ENC-A-1
I
Detection signal input from the disc tray address detect rotary encoder
38
CDM-ENC-A-3
I
Detection signal input from the disc tray address detect rotary encoder
39
CDM-ENC-B-1
I
Detection signal input from the disc tray address detect rotary encoder
40
CDM-ENC-B-3
I
Detection signal input from the disc tray address detect rotary encoder
41
CDM-ENC-B-2
I
Detection signal input from the disc tray address detect rotary encoder
42
CDM-ENC-B-0
I
Detection signal input from the disc tray address detect rotary encoder
43
CDM-ENC-A-2
I
Detection signal input from the disc tray address detect rotary encoder
44
CDM-ENC-A-0
I
Detection signal input from the disc tray address detect rotary encoder
45
CDM-SUB-SW-CLS
I
Detection signal input from disc tray close detect sub switch
46
CDM-MAIN-SW-OPN
I
Detection signal input from disc tray open detect main switch
47
CDM-MOT-NEG-2
O
Motor drive signal output (U/D)
48
CDM-MOT-NEG-1
O
Motor drive signal output (L/D)
49
RDS-DATA
I
RDS data input
50
ST-MUTE
O
Tuner muting control signal output to tuner unit
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