Sony CFD-V77S Service Manual ▷ View online
CFD-V77S
6-6. SCHEMATIC DIAGRAM – MAIN BOARD (3/3) –
• Refer to page 20 for Note on Schematic Diagram.
— 31 —
— 32 —
• Refer to page 35 for IC Block Diagrams.
— 33 —
— 34 —
6-7. IC PIN FUNCTION DESCRIPTION
IC702 CD DIGITAL SIGNAL PROCESSOR, LED DRIVE, SYSTEM CONTROL (CXP401-602R)
Pin No.
Pin name
I/O
Description
1
SEIN
I
CD SENS input.
2
CNIN
I
CD SENS input.
3
DATO
O
CD DSP command data output.
4
XLTO
O
Latch output.
5
CLKO
O
Clock output for CD DSP command.
6
DV
SS
–
Digital ground.
7
DV
DD
–
Digital power supply (+5V).
8
MON
–
Not used (Open).
9
MDP
O
Spindle motor drive control.
10
MDS
–
Not used (Open).
11
LOCK
O
Lock signal output.
12
VPCO2
–
Not used (Open).
13
VPCO1
–
Not used (Open).
14
VCKI
–
Not used (Connect to
!∞
pin).
15
V16M
–
Not used (Connect to
!¢
pin).
16
VCTL
–
Not used (“H” level).
17
PCO
O
Decoder PLL phase comparator output.
18
FILI
I
Decoder PLL filter input.
19
FILO
O
Decoder PLL filter output.
20
AV
SS
–
Analog ground.
21
CLTV
I
Decoder PLL VCO control voltage input.
22
AV
DD
–
Analog power supply (+5V).
23
RF
I
CD RF signal input.
24
BIAS
I
Playback EFM asymmetry current constant input.
25
ASYI
I
Playback EFM asymmerty comparater voltage input.
26
ASYO
O
Playback EFM full swing output.
27
TEST1
I
Test terminal (Fixed at “L”).
28
TEST2
I
Test terminal (Fixed at “L”).
29
XRST
I
CD reset input.
30
XRSTO
O
CD reset output. “L” : Reset
31
FOK
I
FOK signal input.
32
LRCK
O
L/R clock signal output. (Connect to
#£ pin)
33
LRCKI
I
L/R clock signal input. (Connect to
#™ pin)
34
PCMD
O
PCM data output. (Connect to
#∞ pin)
35
PCMDI
I
PCM data input. (Connect to
#¢ pin)
36
BCK
O
Bit clock signal output. (Connect to
#¶ pin)
37
BCKI
I
Bit clock signal input. (Connect to
#§ pin)
38
GTOP
–
Not used (Open).
39
XPCK
–
Not used (Open).
40
GFS
–
Not used (Open).
41
RFCK
–
Not used (Open).
42
C2PO
–
Not used (Open).
43
DV
SS
–
Digital ground.
44
DV
DD
–
Digital power supply (+5V).
45
XROF
–
Not used (Open).
Pin No.
Pin name
I/O
Description
46
MNT3
–
Not used (Open).
47
MNT1
–
Not used (Open).
48
MNT0
–
Not used (Open).
49
C4M
–
Not used (Open).
50
DOUT
–
Not used (Open).
51
EMPHI
–
Not used (Open).
52
WFCK
–
Not used (Open).
53
SCOR
–
Not used (Open).
54
SBSO
–
Not used (Open).
55
EXCK
–
Not used (Open).
56
DTEST
I
Test terminal (Fixed at “L”).
57
CTEST
I
Test terminal (Fixed at “L”).
58
FR
I
= key input.
59
PLAY/PAUSE
I
^ key input.
60
FF
I
+
key input.
61
STOP
I
p key input.
62
MODE
I
PLAY MODE key input.
63
DISP/ENTER
I
DISPLAY/ENTER key input.
64
AU MUTE
O
Audio mute signal output.
65
BTL MUTE
O
BTL mute signal output.
66
SENCE2
I
CD SENCE input.
67
REC
I
Function REC input.
68
LIMIT SW
I
LIMIT switch input.
69
OPEN/CLOSE
I
CD door open/close switch input.
70
RMC
–
Not used (Fixed at “H”).
71
DV
SS
–
Digital ground.
72
DV
DD
–
Digital power supply (+5V).
73
SEG 15
–
Not used (Open).
74
SEG 14
–
Not used (Open).
75 – 88
SEG 0 – 13
O
LCD segment output.
89 – 92
COM 0 – 3
O
LCD common output.
93 – 95
VCL 1 – 3
I
LCD drive device voltage input.
96
AV
SS
1
–
Analog ground.
97
AV
DD
1
–
Analog power supply (+5V).
98
AOUT1
O
Audio output.
99
AIN1
I
Audio input.
100
LOUT1
O
L-CH audio output.
101
AV
SS
1
–
Analog ground.
102
XV
DD
–
Oscillator power supply (+5V).
103
XTAI
I
Oscillator connect terminal (16.9344MHz).
104
XTAO
O
Oscillator connect terminal (16.9344MHz).
105
XV
SS
–
Oscillator ground.
106
AV
SS
2
–
Analog ground.
107
LOUT2
O
R-CH audio output.
108
AIN2
I
Audio input.
109
AOUT2
O
Audio output.
110
AV
DD
2
–
Digital power supply (+5V).
111
AV
SS
2
–
Ground terminal.
112
NC
–
Not used (Connect to ground).
— 35 —
• IC BLOCK DIAGRAMS
IC1 CXA1538S
REG
FM FRONT-END
AM FRONT-END
VCO
REG
MPX REG.
PD 1
PD 2
MONO/ST
SELECT
SELECT
1/2
COUNTER
1/2
COUNTER
MUTING
DECORD AMP
AUTOBLEND
RIPPLE
FILTER
BAND PASS
MUTE
TUNING
INDICATOR
AM
IF / DET
GND
PLL LPF 1
PILOT DET
LPF
VCO CHECK
ST IND
R_ch
L_ch
VCC
RIPPLE
FILTER
U AGC : AFC
J AGC : AFC
IF, DET GND
TUN
FM IF IN
AM IF IN
BAND SELE
PLL LPF
MPX REG
VCO
FM
DISCRI
MUTE
AM OSC
AFC
FM OSC
REG
FM RF
AM IN
RF IN
IF OUT
GND_FE
2
3
5
4
6
7
8
9
10
1
11
12
13
14 15
16
17
18
19
20
30
29
28
27
26
25 24 23 22
21
FM IF /
DISCRI
IC301 TA2068N
21
22
23
24
2
3
5
4
6
7
8
9
10
1
11
12
13
14
15
16
17
18
19
20
LOGIC
7dB
26dB
26dB
7dB
ALC1
ALC2
DET
MIC
AMP1
1k
10k
NAB
AMP2
NAB
AMP1
ON
MUTE
MUTE
MUTE
BUF AMP
A2
BUF AMP
A1
BUF AMP
B1
BUF AMP
B2
TAPE
TAPE
–––––
TAPE
–––––
LINE
RADIO
10k
10k
10k
1k
1k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
15k
6k
1k
6k
LINE
RADOI
TAPE
REC
AMP1
REC
AMP2
REF AMP
2.1
ON
ON
MONITOR
AMP
MONITOR
AMP
LIN
MIC
I/EX
L. RAD
L. LO
REC
TAPE
R. LIN
MIC
IN
R. LO
LINE
R. RAD
VCC
MIC
NF
R. PO
R. NF
R. RO
R. IN
GND
REF
L. IN
L. RO
L. NF
L. PO
AGC
— 36 —
IC701 CXA1992BR
Charge
up
FEO
FEI
FDFCT
FGD
FLB
FE_O
FE_M
SRCH
TGU
TG2
FSET
TA_M
TA_O
SL_P
SL_M
SL_O
ISET
VCC
VCC
LOCK
CLK
XLT
DATA
XRST
C. OUT
SENS1
SENS2
FOK
CC2
CC1
CB
CP
RF_I
RF_O
RF_M
RFTC
LD
PDO
PD1
PD2
FE_
BIAS
F
E
EI
VEE
TEO
LPF1
TEI
ATSC
TZC
VC
FZC
TM2
VEE
VEE
TM3
TM5
TM4
TM6
VCC
VCC
TM7
ISET
TTL
↓
IIL
IIL
↓
TTL
IIL
↓
TTL
IIL DATA REGISTER,
INPUT SHIFT REGISTER,
ADDRESS DECODER,
SENS SELECTOR,
OUTPUT DECODER
INPUT SHIFT REGISTER,
ADDRESS DECODER,
SENS SELECTOR,
OUTPUT DECODER
DFCTO IFB1-6
BAL1-4
TOG1-4
TOG1-4
FS1-4
TG1-2
TM1-7 PS1-4
FOH
FOL
TGH
TGL
BALH
BALL
ATSC
TZC
FZC
FSET
TG2
VEE
VCC
FS1
FS2
FOCUS
PHASE COMPENSATION
PHASE COMPENSATION
DFCT
FS4
TRACKING
PHASE COMPENSATION
PHASE COMPENSATION
TG1
TM1
DFCT
FZC COMP.
VEE
VCC
VCC
TDFCT
TZC COMP.
ATSC
WINDOW
COMP.
WINDOW
COMP.
E-F BALANCE
WINDOW COMP.
WINDOW COMP.
TRK. GAIN
WINDOW COMP.
WINDOW COMP.
FO. BIAS
WINDOW
COMP.
WINDOW
COMP.
VEE
TGFL
TOG1
TOG2
TOG3
TOG4
BAL1
BAL2
BAL3
BAL4
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
FE AMP
VEE
E IV AMP
F IV AMP
VCC
APC
VCC
VEE
LASER POWER CONTROL
VEE
PD1 IV
AMP
AMP
PD2 IV
AMP
AMP
RF
SUMMING
AMP
SUMMING
AMP
VCC
VEE
VEE
LEVEL S VEE
LEVEL S VEE
MIRR
VCC
DFCT
FOK
VCC
LDON
LPCL
LPC
TGFL
MIRR
DFCT1
CC1
1
2
3
4
5
6
7
8
9
10
11
12
13
26
39
40
41
42
43
44
45
46
47
48
49
50
51
52
38
37
36
35
34
33
32
31
30
29
28
27
24
24
23
22
21
20
19
18
17
16
15
14
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