Sony CFD-G55 Service Manual ▷ View online
33
33
CFD-G55
5-17. Schematic Diagram – POWER Section –
T0.5AL/250V
Ver 1.1 2002.05
34
34
CFD-G55
• IC Block Diagrams
IC1
TA2149BN
GND1
3
2
1
IF REQ
AM
MIX
FM RF IN
AM LOW CUT
5
4
MIX OUT
VCC2
AF IF IN
8
7
6
FM IF IN
GND2
10
9
AGC
QUAD
12
11
R OUT
L OUT
FM RF OUT
22
23
24
20
21
17
18
19
15
16
13
14
AM RF IN
VCC1
FM OSC
ST IND
OSC OUT
AM OSC
IF OUT
LPF2/MO-ST
MPX IN
DET OUT
LPF1/BAND
FM
MIX
FM
OSC
LEVEL
DET
AM
DET
MUTE
FM
DET
ST/MO
FM/AM
AM
OSC
1/1OR
1/16
AGC
SW
ST
1/8
BUFF
BUFF
DIVIDE
DECODE
VCO
IF BUFF
AF BUFF
AF
FM RF
AM IF
FM IF
IC701
LC78646E-E
1
APC
PLL
VCEC
GATE
GATE
GENERAL-
PURPOSE
PORTS
DRF
SLICE
LEVEL
CONTROL
MIX
EQ
AGC
LPF
PH
BH
TBAL
LEVEL SET
LPF
SW
MONI
CONT
CONT
JITTER
DETECT
A/D
SERVO
PROCESSOR
RAM
AUTO
ADJUST
FRAME SYNC DETECT,
PROTECT INSERT,
EFM DECODE
TRACK
JUMP
SW
D/A
COMMAND
INTERFACE
INTERFACE
8FS
DIGITAL
FILTER
1BIT
DAC
SUBCODE
DECODE CRC
CLV, CAV
CONTROL
MONITOR
SIGNAL
SELECTOR
AUDIO
OUT
CLOCK
GENERATOR
ERROR
CORRECTION
AUDIO CD
C1-1, C2-2
RAM
SERIAL
OUT
EXTERNAL
AUDIO IN
2
3
4
5
6
7
8
9
+
–
+
–
+
–
+
–
+
–
10
13
12
11
+
+
–
+
+
–
TBAL
14
15
16
17
18
19
20
LPF
S/H
21 22 23 24
+
–
+
–
+
–
25 26 27
28 29 30
80 79
78 77 76 75 74 73
72 71 70
RUPTURE
DEFECT
32 33 34 35 36
31
PCK
LPF
INTERPOLATION
MUTE
ATTENUATION
DEEMPHASIS
69 68
67
65 64 63 62 61
66
37 38 39 40
60
59
58
57
56
55
53
52
54
51
50
49
48
47
46
45
44
43
42
41
SLCO
SLCIST
EFMIN
RF
RFVDD
RFVSS
FIN1
FIN2
TIN1
TIN2
VREF
REFI
FE
TEC
TE
RFMON
JITTC
ADAVDD
ADAVSS
TDO
FDO
SPDO
SLDO
GPDAC
CONT4
CONT5
SBCK/CONT6
SBCK/FG
DEFECT
MONI1
MONI2
MONI3
MONI4
MONI5
(3.3V)VSS
VDD
DOUT
CL
CE
FSEQ
TEST
*RES
*WRQ
DO
DI
VSS
VDD5V
CONT1
DRF
CONT2
CONT3
PCKIST
VVSS
PD02
PD01
LDD
LDS
FR
VVDD
V/*P
LVSS
LCHO
LVSS
RVSS
RCHO
RVDD
XVDD
XOUT
XIN
FSX/16MIN
XVSS
16MOUT
ASLRCK
ASDACK
ASDFIN
LRSY
DATACK
DATA
C2F
EFLG
IC2
LC72137M-TLM
OCB
I/F
1
CE
2
DI
3
CL
4
DO
16
PD
VSS
15
VDD
14
13
MO/ST
20
X OUT
18
LP-OUT
17
LP-IN
19
X IN
5
NUTE
6
MW/L
W
7
BAND
8
ST
-IND
9
BAND
DATA SHIFT REGISTER
LATCH
UNIVERSAL
CONTROLER
SWALLOW COUNTER
1/16. 1/17 4 BITS
12 BIT PROGRAMBLE
DIVIDER
UNLOCK
DETECTOR
PHASE DETECTOR
CHARGE PUMP
FILTER
REFERENCE
DIVIDER
POWER
ON
RESET
1/2
10
IF-IN
12
FM-IN
AM-IN
11
24
CAP
23
TNF1
22
TNF2
21
BNF2
20
BOUT2
19
BNF1
18
BOUT1
17
OUT1
16
OUT2
15
VCC
14
SI
13
SC
1
VIN1
2
VIN2
3
SEL2
4
SEL1
5
A1
6
A2
7
B1
8
B2
9
C1
10
C2
11
FIL
TER
12
GND
0dB-
-87dB
-
-87dB
-
Vcc/2
Vcc/2
Surround
50k
50k
50k
50k
50k
50k
Vcc/2
Vcc/2
Vcc/2
Treble1
fc=8kHz
Treble2
fc=8kHz
Bass2
fo=80Hz
Bass1
fo=80Hz
Logic
IC321
BD3870FS
35
CFD-G55
IC301 TA2068N
IC702 BA5826FP-E2
21
22
23
24
2
3
5
4
6
7
8
9
10
1
11
12
13
14
15
16
17
18
19
20
LOGIC
7dB
26dB
26dB
7dB
ALC1
ALC2
DET
MIC
AMP1
1k
10k
NAB
AMP2
NAB
AMP1
ON
MUTE
MUTE
MUTE
BUF AMP
A2
BUF AMP
A1
BUF AMP
B1
BUF AMP
B2
TAPE
TAPE
–––––
TAPE
–––––
LINE
RADIO
10k
10k
10k
1k
1k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
15k
6k
1k
6k
LINE
RADOI
TAPE
REC
AMP1
REC
AMP2
REF AMP
2.1
ON
ON
MONITOR
AMP
MONITOR
AMP
L. LIN
MIC
I/EX
L. RAD
L. LO
REC
TAPE
R. LIN
MIC
IN
R. LO
LINE
R. RAD
VCC
MIC
NF
R. PO
R. NF
R. RO
R. IN
GND
REF
L. IN
L. RO
L. NF
L. PO
AGC
–
+
+
VCC
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LEVEL
SHIFT
–
+
+
VCC
LEVEL
SHIFT
+
–
–
1
2
3
5
6
7
8
9 10
11
12
13 14
LEVEL
SHIFT
+
–
–
+
–
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
DRIVE
BUFFER
REGULATOR VOLTAGE DETECT,
BIAS VOLTAGE DETECT,
THERMAL SHUT DOWN
4
–
+
+
DRIVER
MUTING
GND
SL –
SL+
SLIN
(SLIN)
VREF
VCC
VCC
(FIN)
FIN
F –
F +
NC
OPIN
SP –
SP +
SPIN
RST
REG-B
REGO
MUTE
GND
TIN
(TIN)
T –
T +
GND
OPOUT
LEVEL
SHIFT
36
CFD-G55
5-18. IC Pin Function Description
• IC801 µPD789478GC-8BT
System Control (MAIN Board)
Pin No.
1, 2
3
4
5
6 to 9
10 to 27
28, 29
30
31
32
33
34
35
36
37
38
39
40
41
42
43 to 45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
I/O
—
I
I
I
O
O
—
O
O
O
O
O
O
I/O
O
—
I
I
I
I
I
I
—
I
I
I/O
I
I
I
O
O
O
O
I
O
I
O
O
O
O
O
O
O
O
I
I
O
—
—
I
Pin Name
NC
VLC2
VLC1
VLC0
COM0 to COM3
SEG0 to SEG17
NC
WOOFER ON/OFF
WOOFER 1/2
ISS1
ISS2
A-MUTE
SCL
SDA
INIT
AVDD
REC
C-DOOR
SIMUKE
MODE
KEY-1 to KEY-3
C-FSEQ
AVSS
RMC
REG CHK
WP
TC-PLAY
WRQ
C-DO
C-DI
C-CLK
C-CE
R-MUTE
C-DRF
C-RES
R-COUNT
R-CLK
R-DATA
R-CE
V-CLOCK
V-DATA
P-CON
TAPE
VL
NC
XT1
XT2
VDD
VSS
X1
Description
Not used (open)
LCD bias power supply
LCD bias power supply
LCD bias power supply
LCD common signal output
LCD segment signal output
Not used (open)
Woofer on/off control signal output
Woofer 1/2 signal output
ISS-1 signal output (not used)
ISS-2 signal output (not used)
Audio muting signal output
Clock output to the EEPROM
Data input/output with the EEPROM
Initialization setting signal output
Power supply (A/D converter)
REC signal input from the REC/PB switch (S301) “H”: record mode
Detection signal input from the CD OPEN switch (S701) “L”: CD door close
Destination setting signal input
Model setting signal input
Key signal input from the function keys
CD FSEQ synchronizing signal detection signal input from the IC701
Ground (A/D converter)
Data input from the remote control receiver
Power supply voltage monitoring signal input
WAKE UP reading signal output (interrupt signal in input mode)
TAPE PLAYsignal input from the TC PLAY switch (S321)
CD WRQ signal input from the IC701
CD DSP data input from the IC701
CD DSP data output to the IC701
CD clock output to the IC701
CD chip enable signal output to the IC701
Radio muting signal output “L”: active
CD DRF signal input from the IC701
CD system reset signal output to the IC701
Radio IF count signal input from the IC2
Radio clock signal output to the IC2
Radio data output to the IC2
Radio chip enable signal output to the IC2
Clock signal output to the sound processor (IC321)
Data output to the sound processor (IC321)
Power control signal output
TAPE function signal output to the IC301
VL control signal output “L”: active
Not used (connected to ground)
Sub system clock oscillator input (32.768kHz)
Sub system clock oscillator output (32.768kHz)
Power supply
Ground
Main system clock oscillator input (4.19MHz)
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