Sony CFD-D505 / D-E350 / D-E351 / D-E351SR / D-E353 / D-E355 / D-E356CK Service Manual ▷ View online
6
D-E350/E351/E351SR/E353/E355/E356CK
SECTION 4
ELECTRICAL ADJUSTMENTS
The CD section adjustments are done automatically in this set.
Precautions for Check
1. Perform check in the order given.
2. Use YEDS-18 disc (Part No.: 3-702-101-01) unless otherwise
2. Use YEDS-18 disc (Part No.: 3-702-101-01) unless otherwise
indicated.
3. Power supply voltage requirement : DC4.5 V in DC IN jack.
(J401)
VOLUME button : Minimum
HOLD switch : OFF
HOLD switch : OFF
Focus bias Check
Condition:
• Hold the set in horizontal state.
• Hold the set in horizontal state.
Connection:
Procedure:
1. Connect the oscilloscope to the test points TJ503(RFI) and TJ610
1. Connect the oscilloscope to the test points TJ503(RFI) and TJ610
(VBIAS) on the MAIN board.
2. Set a disc. (YEDS-18)
3. Press the >B button.
4. Check the oscilloscope waveform is as shown below.
3. Press the >B button.
4. Check the oscilloscope waveform is as shown below.
A good eye pattern means that the diamond shape (
◊
) in the cen-
ter of the waveform can be clearly distinguished.
RF Signal reference Waveform (Eye Pattern)
To watch the eye pattern, set the oscilloscope to AC range and
increase the vertical sensitivity of the oscilloscope for easy
watch-ing.
increase the vertical sensitivity of the oscilloscope for easy
watch-ing.
5. Stop revolving of the disc motor by pressing the x button.
[MAIN BOARD] (SIDE B)
S801
(OPEN/CLOS
C301
C619
C802
IC603
TP814
C106
R620
TAP806
C634
TJ502
R631
TJ608
TP817
TP609
TP616
R824
0
TP503
TJ303
C306
R209
C10
TJ603
C203
TP507
TJ610
R205
TP603
TJ604
D801
TAP803
TJ405
TJ601
TJ602
TJ607
TAP805
TJ501
Q601
TJ503
TAP601
TP621
IC302
R109
C206
C610
R605
R107
D805
R617
R613
R614
R615
L601
HPLOUT
AVDD
AGND
LD
RFI
AVDD
LASER
MON1
MON2
CLK4M
FOK
RF1
SCOR
XBUSY
C2POEN
PD
VBIAS
OPSTB
RFGO
.4V
TJ610 (VBIAS)
TJ503(RFI)
oscilloscope
(AC range)
RF level
0.45 to 0.65 Vp-p
0.45 to 0.65 Vp-p
VOLT/DIV : 100 mV (With the 10 : 1 probe in use)
TIME/DIV : 500n
TIME/DIV : 500n
s
7
D-E350/E351/E351SR/E353/E355/E356CK
Pin No.
Pin name
I/O
Description
SECTION 5
DIAGRAMS
5-1. EXPLANATION OF IC TERMINALS
IC801 (SYSTEM CONTROL) T5AW5-Z5-M0
1
GND
–
Ground terminal.
2
XIN
I
System clock input.
3
XOUT
O
Not used (OPEN).
4
TEST
I
Test mode terminal (FiXed to “L”).
5
VCPU
–
Power supply for CPU & I/O.
6
FOK_I
I
Focus OK signal input.
7
XBUSY_I
I
DSP’s auto sequencer status.
8
XRESET_I
I/O
Micon reset terminal.
9
XSTOP_I
I
Not used (FiXed to “L”).
10
DFCT CTRL
O
Not used (OPEN).
11
SCOR_I
I
SCOR pulse input.
12
HPSW_O
O
Headphone IC power switch.
13
DEFECT
O
DEFECT signal output (Not used).
14
XPOWLT_O
O
Power IC’s serial interface latch output.
15
R/XW_O
O
DSP’s serial interface Read/Write signal output.
16
MSDTI
I
Serial interface input.
17
MSDTO
O
Serial interface output.
18
SCK_O
O
Serial interface clock output.
19
AVCPU
–
Power supply for CPU and I/O.
20
VREFH
–
Analog reference voltage for A/D converter.
21
AD_SEL
I
Test mode detection input
22
AD_CHGMNT
I
Charging monitor input.
23
AD_KEY2
I
Key input.
24
AD_BATMNT
I
Battery voltage monitor input.
25
AD_KEY
I
Set’s key detection input.
26
AD_RMKEY
I
Remocon’s key detection input.
27
AD_DCINMNT
I
DC voltage monitoring input.
28
XOPEN_I
I
OPEN switch status detection input.
29
P50
O
Not used (OPEN).
30
BEEP_O
O
BEEP sound
31
TSB
O
Not used (OPEN).
32
VDD_EEPROM
–
Power supply for EEPROM (OPEN).
33
P44
O
Not used (OPEN).
34
XNONCHG_I
I
Charging feature detection
35
P42
O
Not used (OPEN).
36
FRANCE_I
I
France version detection input.
37
X4M/16M_I
I
DRAM size selection terminal (OPEN).
38
CMPON_I
I
ESP switch status detection input.
39
XTSB/PANA-HP
O
Not used (fixed at “L”) (OPEN).
40
HOLD_I
I
HOLD switch status detection input.
41
SEG15
O
Not used (OPEN).
42-55
SEG1-14
O
LCD segment output.
56
SEG0
O
Not used (OPEN).
57-60
COM0-3
O
LCD common output.
61-63
V1-3
–
LCD driver booster.
64
C1
–
LCD driver booster.
65
C0
–
LCD driver booster.
8
D-E350/E351/E351SR/E353/E355/E356CK
Pin No.
Pin name
I/O
Description
66
XWAKEUP_O
O
Wale-up signal output.
67
PGM STD0
–
Not used (OPEN).
68
PGMSI_I
–
Not used (OPEN).
69
PGMSCK_O
–
Not used (OPEN).
70
P13
O
Not used (OPEN).
71
GFS_I
I
Guard Frame Synchronous signal input.
72
ESPLT_O
O
ESP’s serial interface latch output.
73
PGMSEL_O
–
Not used (OPEN).
74
AMUTE_O
O
Mute ON/OFF control output.
75
VCC2ON_O
O
Not used (OPEN).
76
XRST_O
O
System reset output.
77
XPOFF_O
O
DSP’s power off output.
78
OPSTBY_O
O
Pick-up’s power supply ON/OFF control.
79
OPG4[_O
O
RF IC’s gain control.
80
C2POEN_O
O
C2PO enable.
9
9
D-E350/E351/E351SR/E353/E355/E356CK
5-2. BLOCK DIAGRAMS
88,87,85,84
4
1,2,24,25
5,9-12,14-18
23 3
90 83 89
22
52
51
CH3
H
BRIDGE
CH2
H
BRIDGE
CH1
H
BRIDGE
LEVEL
SHIFTER
49
50
50
33
35
24
46
27
56
55
E
OPTICAL
PICK-UP
BLOCK
(DAX-25E)
F
OPGSW
LD
PD
F+
F-
T+
T-
S+
S-
C+
C-
OPSTB
A
RF
OP IC
A
RF
FO1
RO2
FO2
RO3
FO3
RO1
FO4
RO4
36 VM12
40 VM2
41 VM3
26 VM34
40 VM2
41 VM3
26 VM34
FOCUS
COIL
TRACKING
COIL
M
M902
SLED
MOTOR
M901
SPINDLE
MOTOR
M
F3
FIN+
FIN-
CPOL
CPOL
CDUTY
R3
FR4
PWM4
31
32
LEVEL
SHIFTER
I/F
29
F2
TIN+
TIN-
SIN+
SIN+
SIN-
FIN+
FIN-
CPOL
CDUTY
TIN+
TIN-
SIN+
SIN-
R2
FI
30
RI
28
27
26
25
25
LATCH
DATA
CLOCK
WAKEUP
FI1
23
RESET
XRST_O
SCOR_I
POFF_O
XBUSY_I
DEFECT_I
FOK_I
ESPLT_O
AD_BATMNT
BEEP_O
AMUTE_O
RM KEY
XIN_I
IC603
RAM(4M)
D0-3
A0-10
D0-D3
88,87,85,84
AO-A10
AD_CHG MNT
WP/AD,DSINMNT
BATM1
BATN2
1
CHGB
IC801
SYSTEM
CONTROL
MICON
XRAS
XCAS
XWE
XRAS
XCAS
XWE
42 - 55
57 - 60
28
SEG1
I
SEG14
COM0
I
COM3
LIQUID
CRYSTAL
DISPLAY
LCD801
WP/XOPEN
40
HOLD_I
38
CMPON_I
5
VCPU
25
WP/AD_KEY_1
23
AD-KEY_2
11
7
77
13
72
24
44
16
14
1
5
26
6
SCGFS_I
71
76
75 74 72 73 77 76 79 78
38
37
40
44
43 45 52 64 65 68 70
5
71
74
30
2
13
14
15
7
20
19
17
31
29
8
6
4
9
8
6
6
7
2
15 R/XW_O
X POWLT_O
14
(SENS)MSDTI_I
16
MSDTO.O
17
SCK_O
18
XWAKEUP_O
66
XRESET_I
VBATT
49
OPG_O
79
XOPSTBY_O
78
HPSW_O
12
47 48 49 50
RF
AMP
APC
SERVO CORE
PWM
CLOCK
OSC
SIO
WINDOW
ECC
ESP
OUT
IN
IC403
+2V REG.
3
15
10
6
13
54
2
62
1
5 OUT
IN
IC402
+2V REG.
5
2 OUT
IN
IC405
RESET
5
4 OUT
IN
1
CTRL
IC404
+5V REG.
DC IN 4.5V
!
J401
Q401
L401
REGB
DC IN
D404
Q403
D402
D801
VBATT
SWITCGING
REG.
SWITCGING
REG.
4
DRY BATTERY
SIZE" AA"
(IEC DESIGNATION LR6)
2PCS,3V
0R
RECHARGEABLE BATTERY
NC-WMAA/NH-WM2AA
2.4V
S801
DOOR
OPEN
ON OFF
S807
x
S806
.
.
S811
MENU
S809
VOL+
> N
SOUND
VOL-
S808
S808
S810
S803
ESP
ON OFF
DEFFERNTIAL
Q402
44
37
39
RF
A
B
E
F
LD
PD
3
VBATT
IC401(1/2)
FOCUS/TRACKING COIL DRIVE
SLED/SPINDLE MOTOR DRIVE
IC601
RF AMP,DIGITAL SERVO
DIGITAL SIGNAL PROCESSOR
IC302
HEADPHONE AMP
IC401(2/2)
SWITCHING REGURATOR
48
42
CH4
H
BRIDGE
DAC
LOUT
LIN
RIN
BEEP
MUTE
PWRSW
LDACO
RDACO
ROUT
VREF
VBATT
LD
DRIVER
Q601
FDOP
FDON
CL
VON
CL
VOP
TDOP
TDON
SDOP
SDON
CLKDRV
XOUT
XIN
XRST
SBSY
XPWMN
XBUSY
FOK
DEFECT
YMLD
GFS
VCHK
X4M/8M
CLK4M
SCOK
SRW
SDIN
SDOUT
VBATT
AVDD+2V
VCC+2.2V
VCPU+2V
+3V
VCC1-OUT
VCC1-IN
STNG
VMMNT
VCPU
CHGMNT
Q405
GATE
GATE
VCPU+2V
AVDD+2V
VCC0
VIN
E353,E355
E353,E355
E353,E355
: CD PLAY
Q404
J301
i
X171
90MHz
53
S802
HOLD .
• Signal path
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