Sony CFD-D505 / D-E350 / D-E351 / D-E351SR / D-E353 / D-E355 / D-E356CK Service Manual ▷ View online
11
11
D-E350/E351/E351SR/E353/E355/E356CK
5-4. SCHEMATIC DIAGRAM – MAIN SECTION (1/3) – • Refer to page 14 for Notes. • Refer to page 14 for waveforms.
• Refer to page 15 IC for Block Diagrams.
IC404
IC401
Q402
Q405
Q401
IC405
L406
L407
D402
D405
R416
R415
C422
R417
D404
C431
C434
R410
C429
L401
220
µ
H
47
µ
H
C402
C426
C401
C407
C425
C408
L402
R401
R405
C404
C406
R403
TAP402
C405
C427
C409
D403
C410
C412
C413
R407
C433
R419
L404
L405
D401
C415
D406
R422
C502
CN502
CN503
CN501
C503
TP413
TP412
TP411
TP403
TP404
D407
D408
IC403
Q404
R413
R412
R414
R411
Q403
C428
R406
IC402
J401
BT400
BT401
BT402
MM1385AN
BH6571KVT
DTC143TUA
2SC4116GL
2SB16790
XC61CN1402MR
MA2YD
MA2YD2300L
47k
220k
0.22
47k
MA2YD2300L
0.01
0.1
1k
2.2
4.7
16V
16V
0.1
100
6.3V
0.1
10
4V
4V
100
4V
100k
1M
100
6.3V
2200p
10k
0.1
10
4V
4V
0.22
MA111-TX
1
0.047
1000p
470k
0.01
0
UDZS5.1B
220
6.3V
UMZ6.8N
0
2.2
2P
2P
15 PIN
0.1
POWER_IC
TEST
UDZS5.1B
UDZS5.1
XC6201P242
2SD1781K
2.2
2.2
2.2
100
0.1
100k
XC6201P212MR
GND
2.2V
VCPU 2V
VDD
3V
SYNC
B3
AVDD 2V
DCINMNT
RF
B1
CPOL
CDUTY
SIN+
SIN-
TIN+
TIN-
FIN-
FIN+
T+
S-
S+
T-
F-
F+
C
+
PD
LD
F
E
OPSTB
B
A
OPGSW
C-
BATMNT
CHGMNT
C-
C+
S-
S+
F+
T+
T-
F-
RESET
POWERLT
SDTO
SCK
XWAKEUP
RESET
RESET
XWAKEUP
*
SYNC
FO1
PGND1
RO1
FO2
PGND2
RO2
FO3
RO3
PGND3
FO4
PGND4
RO4
R3
F3
R2
F2
R1
F1
LATCH
DATA
CLOCK
WAKEUP
RESET
VCPU
VREF
SLOW
STNG
EO
EI
VCC0
USW
DSW
VIN
LG
VG
INM
DCIN
GSW
SEO
SEI
PREGND
BATM1
BATM2
CHGMNT
VCC2
VCC0
VCC1-IN
VCC1-OUT
SOFT
VCPUNF
VMMNT
VG
PREGND2
REGB
DGND
PGND5
CHGB
PMG
VM
12
VM
2
VM
3
VM
34
PWM4
FR4
SAWMON
DET
SPINDLE MOTOR
GREEN
WHITE
SLED MOTOR
GND
NC
NC
IN
OUT
GN
D
D
NC
NC
IN
O
U
T
GND
NSE
CTRL
IN
OUT
OUT
GND
NC
VIN
Cd
DC IN 4.5V
OPIC
VCC
M901
M902
COIL
TRACKING
COIL
FOCUS
LD
PD
FOCUS/TRACKING COIL DRIVE
SLED/SPINDLE MOTOR DRIVE
DEFFERENTIAL
RESET
SWITCHING
REGULATOR
+2V REG
+5V REG
GATE
SWITCH
SWITCH
DRY BATTERY
SIZE"AA"
(IEC DESIGNATION LR6)
2PCS,3V
OR
BATTERY
RECHARGEABLE
NC-WMAAA/NH-WM2AA
2.4V
*Q403
2SA1241-Y
2SB1237PQR
E353,355
E350,E351,
E353,E355
E353,E355
+2.4V REG
E353,E355
E351SR,E356CK
D-E350/E351/E351SR/E353/E355/E356CK
12
12
5-5. SCHEMATIC DIAGRAM – MAIN SECTION (2/3) – • Refer to page 14 for Notes. • Refer to page 14 for waveforms.
TP633
IC302
IC601
IC603
Q601
L601
R602
R603
C604
R601
C638
C603
TP601
TP602
C610
C611
R617
R613
R614
R615
TJ603
TJ604
R610
C614
C616
C617
C618
R616
C608
C609
C634
TAP601
R620
C619
C620
C202
C203
R205
C204
R207
C102
C103
R105
C621
C635
L602
10
µ
H
C628
L604
10
10
µ
H
TP608
TP607
TP635
TP629
C624
C637
R636
C622
C623
L603
X601
R631
R630
R629
R627
R628
TP634
C304
C307
C305
R301
C301
R109
R209
C206
C106
C306
FB101
FB301
FB201
J301
D201
D305
D101
C629
R633
TP628
R626
TP630
TP626
TP625
TP624
TP623
TP622
R607
R611
TP610
TP606
C626
C625
R107 C107
C303
R612
D301
D303
R819
R818
R605
C612
C613
TP621
TJ610
DOUT
TA2120FN
HP IC
BU9355KS
MSM51V4400E-70SJ
DRAM(4M)
2SB16790
2.2
100k
2.2
470
10
4V
4V
0.1
VMON
RFO
0.01
1000p
100k
100k
100k
100k
MON1
(B)
MON2
(B)
0
0.1
47p
0.22
0.22
470
0.1
10
4V
4V
2200p
47
220
6.3V
1
10K
2.2
1000p
10K
2.2
2.2
2200p
0.1
1
0.01
1M
10p
10p
16.9MHz
0
0
0
0
0
10
4V
4V
47p
10
4V
4V
4.7
220
6.3V
4.7
4.7
0.1
0.1
2.2
0
0
0
UDZ5.1B
UDZ5.1B
UDZ5.1B
10
4V
4V
2.2k
C2FX
10k
0
0
47p
0.1
1000p
1
0
UDZ5.1B
UDZ5.1B
1k
10k
0
0.01
2200p
RFGO
VBIAS
B1
2.2V
VCPU 2V
VDD
3V
SYNC
B3
GND
AVDD 2V
RF
RMKEY
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
D0
D1
D2
D3
XRAS
XWE
CPOL
CDUTY
FIN-
FIN+
XCAS
TIN-
TIN+
SIN-
SIN+
ESPLT
GFS
DEFECT
FOK
XBUSY
CLK4M
BEEP
HPSW
AMUTE
SDTI
SDTO
SRW
SCK
POFF
XRST
SCOR
A0
A1
A2
A3
A9
D1
XWE
XRAS
D0
A4
A5
A6
A7
A8
D2
D3
XCAS
PD
A
B
E
F
BATMNT
LD
*
*
*
*
D1
D0
VSS
D3
D2
A0
A1
A2
A3
VCC
A4
A5
A6
A7
A8
A9
XCAS
XOE
XRAS
XWE
AVDD1
AVSS1
AVSS2
AVDD2
DVSSIO1
DVDDIO1
DVSSIO2
DVDDIO2
LD
PD
VMON
VCHK
E
F
VBIAS
RFO
B
A
RFI
PKC
BTC
RFGO
DETI
ASYI
ASYO
MON1
MON2
ADPFO
ADPFI
FCO
PCO
RLINO
RLINI
RDACO
VCDACO
LDACO
LLINI
LLINO
MUTE
XIN
XOUT
SBDAT
SFSY
SBSY
SCLK
SRW
SDIN
SDOUT
CLK4M
DEFECT
FOK
C2FX
EFM/YFLG
YMLD
EXPLCK
SYNC
CLKDRV
CLVON
FDON
FDOP
TDON
TDOP
SDON
SDOP
DIT
A10/CAS2B
D2
D3
D0
D1
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
XRAS
XWE
XCAS
XBUSY
CLVOP
DVSS2
DVDD2
TEST2
TEST1
TEST0
DVDD1
DVSS1
XPDWN
XRST
TZC
RFZC
ONTRK
ONDIR
TGU
ATTSW
GND
BEEP
BIAS
PGND
VCC
LIN
RIN
LOUT
ROUT
VREF
BBSW
PWRSW
MUTE
ALCDET
ALCIN
MIXOUT
RFIN
ADDOUT
BSTNF
BSTOUT
BIAS_IN
OCLSW
X4M/8M
AMP
HEADPHONE
DIGITAL SIGNAL PROCESSOR
RF AMP,DIGITAL SERVO,
LD DRIVER
FR
EXCEPT FR
*R105,205
22k
10k
FR
EXCEPT FR
*R107,207
4.7k
22k
10
µ
H
MUTE_t
E355
E355,E356CK
E355,E356CK
13
13
D-E350/E351/E351SR/E353/E355/E356CK
5-6. SCHEMATIC DIAGRAM – MAIN SECTION (3/3) –
• Refer to page 14 for Notes. • Refer to page 14 for waveforms.
S808
S809
S810
S811
IC801
C809
C810
C811
C812
TP812
TP815
R820
TAP803
R823
R806
D801
C801
C802
R824
R817
TAP801
C818
R801
C804
C807
Q808
C805
R816
C813
TAP802
S801
S802
S803
D805
S807
S806
S805
R811
R812
R809
R810
R813
R814
R815
D804
C814
TP806
TP807
TP803
TP809
TP811
TP820
C806
R804
R803
CN901
T5AW5-Z5-M0
0.1
0.1
0.22
0.1
VCC2_ON
10k
100k
100k
MA2ZD1400
1
0.22
0
100k
TEST
4700p
100k
0.01
0.01
0.01
0.01
220k
4700p
OPEN
(DOOR OPEN)
UMZ6.8N
2.2k
4.7k
10k
10k
2.2k
4.7k
10k
UDZS5.1B
0.1
SEG15
SEG0
10k
10k
B1
GND
DCINMNT
VCPU 2V
RMKEY
HOLD
AMUTE
XRST
POFF
COM0
COM1
COM2
COM3
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
RESET
SRW
SCK
FOK
XBUSY
HOLD
G-PRO
OPEN
SCOR
SDTO
POWERLT
SDTI
CLK4M
G-PRO
GFS
OPEN
OPSTB
HPSW
OPGSW
XW
AKEUP
C2PO
SEG14
ESPLT
DEFECT
P23
PGM_SEL
PGM_SCK
PGM_SDTI
PGM_SDTO
RESET2
TEST
CLK4M2
BEEP
BATMNT
CHGM
NT
PGM_SCK
PGM_SDTI
PGM_SDTO
PGM
_SEL
TEST
RESET2
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
COM3
COM2
COM1
COM0
*
SEG14
SEG13
SEG6
SEG5
XOUT
SEG4
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG3
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
V3
V2
V1
C1
C0
TEST
VREFH
FOK_I
AM
UTE_O
VCC2ON_O
XRST_O
SCK_O
AD_CHGM
NT
AD_BATM
NT
HOLD_I
MSDTO_O
(SENS)MSDTI_I
XBUSY_I
SCOR_I
BEEP_O
<VDD_EEPROM>
CM
PON_I
SEG15
XW
AKEUP_O
<PGMSI_I>
<PGMSEL_O>
POFF_O
AD_SEL
(P13/PW
M4)
(P50)
XPOWLT_O
TSB
(P42)
FRANCE_I
W
P/AD_DCINM
NT
W
P/AD_RMKEY
C2POEN_O
XIN_I
GFS_I
XRESET_I
AVCPU
VCPU
XSTOP
HPSW_O
R/XW_O
W
P/XOPEN
XNONCHG_I
GND
ESPLT_O
PGM_SDTO
PGM
_SCK
X4M
/16M
_I
W
P/AD_KEY_1
XOPSTBY_O
OPG4_O
AD_KEY_2
(P44)
DEFECT_I
(DFCT_CTRL_O)
XTSB/PANA-HP_I
VDD
(
(
VOL-
VOL+
SOUND
MENU
SYSTEM CONTROL
MICON
HOLD
ON
OFF
ON
OFF
ESP
LIQUID
CRYSTAL
DISPLAY
LCD801
*C806
0.0047
0
CHECK
OPEN:NORMAL MODE
SHORT:TEST MODE
E353,E355
FR
E351,351SR,E353
E355,E356CK
D-E350/E351/E351SR/E353/E355/E356CK
14
14
• Abbreviation
AUS
: Australian
CND
: Canadian
FR
: French
HK
: Hong Kong
AR
: Argentina
EA
: Saudi Arabia
CH
: Chinese
EE
: East European
TW
: Taiwan
MX
: Mexico
KR
: Korean
C&SA
: Central and South America
E13
: AC220-230V area model
E33
: AC100-240V area model
r
Waveforms
IC601
ek
X OUT
4
VOLT/DIV : 1 V AC
TIME/DIV : 50 nsec
TIME/DIV : 50 nsec
IC801
2
XIN-
I
IC401
4
LG
VOLT/DIV : 1 V AC
TIME/DIV : 200 nsec
TIME/DIV : 200 nsec
PLAY MODE
VOLT/DIV : 2 V AC
TIME/DIV : 2
TIME/DIV : 2
µ
sec
VOLT/DIV : 1 V AC
TIME/DIV : 2
TIME/DIV : 2
µ
sec
2 p-p
16.9 MHz
2.6 p-p
4.24 MHz
6.2 Vp-p
5.6
µ
sec
3 Vp-p
5.6
µ
sec
IC401
9
USW
5
IC601
qh
RFGO
VOLT/DIV : 0.1 V AC
TIME/DIV : 0.5 msec
TIME/DIV : 0.5 msec
Note:
• All capacitors are in
• All capacitors are in
µ
F unless otherwise noted. pF:
µµ
F 50 WV or
less are not indicated except for electrolytics and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise specifed.
•
f
: internal component.
Note:
Note:
The components identi-
Les composants identifiés
fied by mark
0
or dotted
par une marque
0
sont cri-
line with mark
0
are cri-
tiques pour la sécurité.
tical for safety.
Ne les remplacer que par
Replace only with part
une piéce portant le numéro
number specified.
spécifié.
•
A
: B+ Line.
• Power voltage is dc 3 V and fed with regulated dc power supply
from battery terminal.
• Voltages are dc with respect to ground under no-signal conditions.
no mark : PLAY
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal production
tolerances.
tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal production toler
ances.
ances.
• Circled numbers refer to waveforms.
• Signal path.
• Signal path.
E
: CD PLAY
0.45-0.65 Vp-p
3
1
2
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