Sony CFD-CD777SMK2 Service Manual ▷ View online
37
CFD-CD777SMK2
IC702
CXD2507AQ
IC703
BA6898S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
52
53
54
55
56
57
58
59
60
61
62
63
64
19
FOK
MON
MDP
MDS
LOCK
TEST
FILO
FILI
PCO
VSS
AVSS
CLTV
AVDD
RF
BIAS
ASYI
ASYO
ASYE
WDCK
DATA
XRST
SENS
MUTE
SQCK
SQSO
EXCK
SBSO
SCOR
V
SS
WFCK
EMPH
DOUT
C4M
FSTT
XTSL
XTAO
XTAI
MNTO
SERVO AUTO
SEQUENCER
CPU
INTERFACE
DIGITAL
CLV
SUB CODE
PROCESSOR
EFM
DEMODULATOR
DIGITAL
PLL
ASYMMETRY
CORRECTOR
D/A
INTERFACE
ERROR
CORRECTOR
16K
RAM
DIGITAL
OUT
CLOCK
GENERATOR
LRCK
PCMD
BCLK
GTOP
XUGF
XPCK
V
DD
GFS
RFCK
CZPO
XROF
MNT3
MNT1
XLON
SPOD
SPOC
SPOB
SPOA
CLKO
V
DD
XLTO
DATO
CNIN
SEIN
CLOK
XLAT
3
5
14
4
5
3
6
REGULATOR
BIAS
DRIVER
MUTE
LEVEL
SHIFT
LEVEL
SHIFT
LEVEL
SHIFT
LEVEL
SHIFT
1
21
22
18
19
20
17
2
3
4
5
6
7
8
9
NC
VCC
BIAS IN
VIN1’
VO1 (+)
VO1 (–)
VIN1
VO2 (–)
GND
10
VO2 (+)
11
VIN2’
12
RESET
13
REG-B
14
REG OUT
15
MUTE
16
FIN
REGULATOR
BIAS, T.S.D.
MONITOR
NC
GND
VIN3’
VIN3
VO3 (+)
VO3 (–)
29
VIN4
28
VO4 (+)
27
VO4 (–)
26
NC
25
OP IN (–)
24
OP OUT
23
GND
30
VIN4+’
31
VCC
32
FIN
+
–
+
–
–
+
–
+
–
+
–
+
–
+
–
38
CFD-CD777SMK2
IC704
27C512-C35A65-V3.03
ATTENUATION COUNTER
FILTER PROCESSOR &
ATTENUATION PROCESSOR
NOISE SHAPER
PROCESSOR BLOCK
INPUT INTERFACE
PWN DATA
PRODUCE
BLOCK
TIMING
CONTROL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
MUTE
DEEN
CKO
DVSS
BCKI
DI
DVDD
LRCI
TSTN
TO1
AVDDL
LO
AVSS
RO
AVDDR
MUTE
XVDD
XTI
XTO
XVSS
DS
RSTN
MODE
ATCK
L
L
L
R
R
R
39
CFD-CD777SMK2
– AMP Board –
IC103
LA4620
– CONTROL Board –
IC104, 204
KIA6966S
PRE
DRIVER
POWER
AMP
RL SHORT
PROTECTOR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
23
21
20
19
18
17
22
VCC
DC
L IN+
IN–
IN–
GND
IN–
R IN+
STANDBY
VCC
MUTE
OUT
GND
OUT
IN–
OUT
GND
OUT
+
–
–
PRE
DRIVER
POWER
AMP
+
–
PRE
DRIVER
POWER
AMP
RL SHORT
PROTECTOR
THERMAL
PROTECTION
CIRCUIT
RIPPLE
FILTER
POP NOISE
PREVENTION
CIRCUIT
+
–
PRE
DRIVER
POWER
AMP
+
–
REFERENCE
VOLTAGE
1
2
3
4
5
6
7
8 9
OUT1
OUT2
OUT3
OUT4
OUT5
VD
GND
IN
VCC
+
–
–
+
–
–
+
–
+
–
–
+
–
–
+
–
–
40
CFD-CD777SMK2
6-16.
IC PIN FUNCTION DESCRIPTION
•
CONTROL BOARD IC801 CXP5086H-684Q (SYSTEM CONTROLLER, LCD DRIVER)
Pin No.
Pin Name
I/O
Description
1, 2
NC
O
Not used
3
SENS
I
Internal status input from the DSP
4
SCOR
I
Subcode sync (S0+S1) detection signal input from the DSP
5
SQCKO
O
Subcode Q data reading clock signal output to the DSP
6, 7
NC
O
Not used
8
SQSO
I
Subcode Q data input from the DSP
9
CLOK
O
Serial data transfer clock signal output to the DSP
10
XLAT
O
Serial data latch pulse signal output to the DSP
11
DATA
O
Serial data output to the DSP
12
XRST
O
Reset signal output to the RF AMP, DSP and D/A converter “L”: reset
13
GND
—
Ground terminal
14
REC
I
REC/PB switch input terminal “L”: recording mode
15
DOOR
I
CD lid open/close detection switch input terminal “L”: CD lid is closed
16
TEST
I
Setting terminal for the service mode “L”: service mode, Normally: fixed at “H”
17
NC
O
Not used
18
LCD
I
Fixed at “L” in this set
19
MODE
I
PLAY MODE key input terminal “L” is input when the key pressing
20
DISP
I
DISPLAY/ENTER key input terminal “L” is input when the key pressing
21
K-PLAY
I
Play/pause (N X) key input terminal “L” is input when the key pressing
22
K-STOP
I
Stop (x) key input terminal “L” is input when the key pressing
23
K-FR
I
Fast rewind (>) key input terminal “L” is input when the key pressing
24
K-FF
I
Fast forward (.) key input terminal “L” is input when the key pressing
25
GND
—
Ground terminal
26
VDD
—
Power supply terminal (+5V)
27
NC
O
Not used
28
C-MUTE
O
Muting control signal output to the DSP, D/A converter and line muting circuit “H”: muting on
29 to 33
NC
O
Not used
34
LDON
O
Laser diode on/off control signal output terminal “H”: laser on
35
NC
O
Not used
36
SEG14
O
Segment drive signal output terminal Not used
37 to 50
SEG13 to SEG0
O
Segment drive signal output to the liquid crystal display
51 to 54
COM3 to COM0
O
Common drive signal output to the liquid crystal display
55
VLC1
I
Power supply input for the liquid crystal display
56
VLC2
I
Power supply input for the liquid crystal display
57
VLC3
I
Power supply input for the liquid crystal display
58
VDD
—
Power supply terminal (+5V)
59
VL
I
Power supply input for the liquid crystal display
60
XTAL
O
Main system clock output terminal (4.019 MHz)
61
EXTAL
I
Main system clock input terminal (4.019 MHz)
62
RST
O
Reset signal output to the motor/coil driver IC “L”: reset
63
GND
—
Ground terminal
64
RMC-S
I
Sircs remote control signal input from the remote control receiver
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