Sony CFD-980 Service Manual ▷ View online
— 45 —
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
I
I
I
O
O
O
O
O
I
O
O
I
O
O
I
I
O
I
O
O
O
I
O
O
O
O
O
I
—
I
I
I
I
O
O
I
O
I
I
—
I
O
O
Description
CD subcode interrupt terminal
Regulator check terminal
Remote control signal receive port
CD system reset signal
CD data output signal
Interface latch clock of D-RAM
Interface shift clock of D-RAM
Interface status output of D-RAM
Interface serial data of D-RAM
CD SUB-Q clock output
CD SUB-Q signal out input
CD clock output
High speed operation when D-RAM data is not present
CD sense signal input
Synchro record operation after record is recognized
CD mute output
CD door open/close detection
Function tape output
Function radio output
Function CD output
Radio stereo/mono judgment signal
Clock output to PLL IC
Data output to PLL IC
Chip enable signal output to PLL IC
CD latch output signal
Radio mute output
PLL count data input
No Connect
CD LD-ON signal output
Key 1 input
Key 2 input
Key 3 input
POWER CONTROL controlling terminal
Momentary “L” output after reset for destination check
Read A/D value after reset for destination check
Radio shift clock output
Microprocessor reset signal input
4.20MHz clock
4.20MHz clock
Ground
No Connect
Ground
A/D converter reference voltage
A/D converter ground
LCD bias control terminal
LCD bias power terminal 3
LCD bias power terminal 2
LCD bias power terminal 1
LCD common 0 output
Pin Name
PE2/INT2
PE3/INT3/NMI
PE4/RMC
PE5/PWM
PE6/TO/ADJ
PB0/CINT
PB1/CSO
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PH0
PH1
PH2
PH3
PH4
PH5
PH6
—
PA0/AN0
PA1/AN1
PA2/AN2
PA3/AN3
PA4/AN4
PA5/AN5
PA6/AN6
PA7/AN7
RST
EXTAL1
XTAL1
VSS
—
EXTAL2
AVREF
AVSS
VL
VLC3
VLC2
VLC1
COMO
5-10. IC PIN FUNCTION
•
IC801
CXP83120A
— 46 —
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76 ~ 88
89
90
91
92
93
94
95
96
97
98
99
100
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
—
I
—
O
O
O
O
I
I
Description
LCD common 1 output
LCD common 2 output
LCD common 3 output
LCD segment 0
LCD segment 1
LCD segment 2
LCD segment 3
LCD segment 4
LCD segment 5
LCD segment 6
LCD segment 7
LCD segment 8
LCD segment 9
LCD segment 10
LCD segment 11
LCD segment 12
LCD segment 13
LCD segment 14
LCD segment 15
LCD segment 16
LCD segment 17
LCD segment 18
LCD segment 19
LCD segment 20
LCD segment 21
No Connect
Microprocessor power supply 5 V
VDD terminal
Microprocessor ground
32.768kHz clock
32.768kHz clock
No Connect
Audio mute output
Volume clock output
Volume data output
Volume chip enable output
Wake-up (interrupt) input
Tape play signal input
Pin Name
COM1
COM2
COM3
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16/PD0
SEG17/PD1
SEG18/PD2
SEG19/PD3
SEG20/PD4
SEG21/PD5
—
VDD
VDD
VSS
TX
TEX
—
SEG36/PG4
SEG37/PG5
SEG38/PG6
SEG39/PG7
PE0/INT0/EC0
PE1/INT1/EC1
— 47 —
5-11. IC BLOCK DIAGRAMS
24
23
22
21
20
19
18
17
16
15
14
11
10
9
8
7
6
5
4
3
2
1
12
13
AM
RF
AM
MIX
FM
MIX
AM
OSC
FM
OSC
BUFF
BUFF
IF
BUFF
AF
BUFF
AM/FM
ST/MONO
SW
FM MPX
AM
DET
1/801V
FM
IF
AM
IF
LEVEL
DET
FM
DET
ST
DET
AGC
FM
RF
MUTE
IC1
TA2008AN
IC3 BU2614
16
15
14
13
12
11
10
9
1
6
7
8
I/O CTL
MAIN COUNT
PRESCALER
4
5
3
2
SHIFT
REGISTER
LATCH
REFERENCE
DIVIDER
20BIT
COUNT
20BIT
COUNT
PHASE
DET
ULLOCK
VSS
PD1
VDD1
VDD2
FMIN
AMIN
P2
IFIN
XOUT
XIN
CE
CK
DA
CD
P0
P1
— 48 —
36
PHD2
PHD1
PHD
33
LD
32
RF M
31
RF O
30
RF I
29
CP
28
CB
27
CC1
26
CC2
25
FOK
24 SENS
23 C. OUT
22 XRST
21 DATA
20 XLT
19 CLK
18 VCC
17 ISET
16 SL 0
15 SL M
14 SL P
13
12
TA O
TA M
11
FSET
10
TG2
9
TGU
8
SRCH
7
FE M
6
FE O
5
FLB
4
FGD
3
FDFCT
2
FEI
1
FEO
48
VC
47
TDFCT
46
TZC
45
ATSC
44
TEI
43
LPFI
42
TEO
41
VEE
40
EI
39
E
38
F
37
FE BIAS
+
+
–
+
+
–
+
–
+
–
+
–
+
–
+
–
+
+
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
–
+
+
–
–
–
+
+
–
+
–
+
–
+
–
+
–
APC
–
–
–
–
LEVELS
FOK
MIRR
DFCT
RF IV AMP2
RF IV AMP1
FE AMP
F IV AMP
E IV AMP
TE AMP
FZC COMP
BAL1
BAL2
BAL3
TOG1
TOG2
TOG3
TTL
IIL
IIL
TTL
TTL
IIL
• IIL DATA RESISTOR
• INPUT SHIFT RESISTOR
• ADDRESS DECODER
• OUTPUT DECODER
HPF COMP
LPF COMP
TZC COMP
DFCT
DFCT
TM1
FS4
ATSC
• WINDOW COMP
• FCS PHASE
COMPENSATION
COMPENSATION
• TRACKING
• PHASE
COMPENSATION
COMPENSATION
• ISET
FS1
FS2
TM4
TM5
TM6
TM3
TM7
TG2
• F SET
TG1
TM2
+
–
–
TOG1-3
FS1-4
TG1-2
TM1-7
PS1-4
BAL1-3
35
34
12
13
11
10
9
1
2
3
4
5
6
7
8
GND
GND
STANDBY
SWITCH
BIAS
CIRCUIT
T.S.D
+
–
CH–2
+
–
CH–1
IC701
CXA1782BQ
IC305
LA4597
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