DOWNLOAD Sony CDP-S3 / MHC-S3 Service Manual ↓ Size: 2.13 MB | Pages: 34 in PDF or view online for FREE

Model
CDP-S3 MHC-S3
Pages
34
Size
2.13 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
cdp-s3-mhc-s3.pdf
Date

Sony CDP-S3 / MHC-S3 Service Manual ▷ View online

11
CDP-S3
SECTION  5
ELECTRICAL  ADJUSTMENTS
Note :
1. CD Block is basically designed to operate without adjustment.
Therefore, check each item in order given.
2. Use LUV-P01 (4-999-032-01) unless otherwise indicated.
3. Use an oscilloscope with more than 10M
 impedance.
4. Clean the object lens by an applicator with neutral detergent
when the signal level is low than specified value with the
following checks.
S-Curve Check
Procedure :
1. Connect an oscilloscope to TP (FEO).
2. Connect between TP (FEI) and TP (DVC) ( 1.65 V) by lead
wire.
3. Turn Power switch on.
4. Load a disc (LUV-P01) and actuate the focus search. (In
consequence of open and close the disc tray, actuate the focus
search)
5. Confirm that the oscilloscope waveform (S-curve) is
symmetrical between A and B. And confirm peak to peak level
within 2 
±
 0.5 Vp-p.
6. After check, remove the lead wire connected in step 2.
Note :
• Try to measure several times to make sure than the ratio
of A : B or B : A is more than 10 : 7.
• Take sweep time as long as possible and light up the
brightness to obtain best waveform.
RF Level Check
Procedure :
1. Connect an oscilloscope CH1 to TP (RFDC) and CH2 to TP
(RFAC).
2. Turn Power switch on.
3. Load a disc (LUV-P01) and playback.
4. Confirm that oscilloscope waveform is clear and check if RF
signal level is correct or not.
Note :
Clear RF signal waveform means that the shape “ 
 ” can be clearly
distinguished at the center of the waveform.
BD board
Oscilloscope
TP(FEO)
TP(DVC)
symmetry
S-curve waveform
within 2 
±
0.5Vp-p
A
B
TP(RFDC)
TP(RFAC)
BD board
oscilloscope
TP(DVC)
E-F Balance (1 Track jump) Check
Procedure :
1. Connect an oscilloscope to TP (TEO) and TP (DVC).
2. Turn Power switch on.
3. Load a disc (LUV-P01) and playback the number nine track.
4. Press the  
N
  button. (Becomes the 1 track jump mode.)
5. Confirm that the level B and A (DC voltage) on the oscilloscope
waveform.
6. Adjust RV101 on the BD board so that the center of waveform
becomes the same voltage of DVC. (i.e.  A=0V)
Adjustment Location:
[BD BOARD] (Conductor Side)
RF signal waveform
VOLT/DIV : 200mV
TIME/DIV : 500ns
level : 0.65 
±
0.15Vp-p (RFDC)
1.1 
±
0.4Vp-p (RFAC)
TP(TEO)
TP(DVC)
BD board
oscilloscope
level=1.0 
±
0.5Vp-p
symmetry
A (DC voltage)
center of
waveform
B
DVC
1 track jump waveform
TP (TEO)
TP
(RFAC)
TP
(FEI)
TP
(RFDC)
TP (FEO)
IC101
IC103
RV101
TP (DVC)
1
15
30
1
20
21
40
60
80
41
61
16
12
CDP-S3
SECTION  6
DIAGRAMS
C
B
These are omitted.
E
Q
B
These are omitted.
C
E
Q
Note on Printed Wiring Boards:
X
: parts extracted from the component side.
Y
: parts extracted from the conductor side.
f
: internal component.
: Pattern from the side which enables seeing.
• Indication of transistor.
Note on Schematic Diagram:
• All capacitors are in 
µ
F unless otherwise noted.  pF: 
µµ
F
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in 
 and 
1
/
4
 
W or less unless otherwise
specified.
f
: internal component.
C
: panel designation.
A
: B+ Line.
• Voltages are taken with a VOM (Input impedance 10 M
).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
• Circled numbers refer to waveforms.
• Signal path.
J
: CD PLAY
Note: The components identified by mark 
0
 or dotted line
with mark 
0
 are critical for safety.
Replace only with part number specified.
6-1.
NOTE  FOR  PRINTED  WIRING  BOARDS  AND  SCHEMATIC  DIAGRAMS
(In addition to this, the necessary note is printed in each block)
13
CDP-S3
• Circuit Boards Location
DISC SENSOR board
BD board
IN OUT SW board
MOTOR board
DRIVER board
TRAY SENSOR board
MAIN board
PANEL (L) board
PANEL (R) board
14
CDP-S3
6-2.
PRINTED  WIRING  BOARD  – BD Section –
 See page 13 for Circuit Boards Location.
There are a few cases that the part printed on
this diagram isn’t mounted in this model.
• Semiconductor
Location
Ref. No.
Location
MAIN
BOARD
CN301
M102
(SLED)
TP
(RFDC)
TP
(RFAC)
TP
(FEI)
TP
(DVC)
TP (TEO)
TP
(FEO)
M101
(SPINDLE)
A
D101
B-3
IC101
C-3
IC102
B-2
IC103
D-2
Q101
C-1
Q102
A-3
(Page 18)
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