Sony CDP-LSA1 Service Manual ▷ View online
21
Note :
1. CD Block is basically designed to operate without adjustment.
Therefore, check each item in order given.
2. Use YEDS-18 disc (3-702-101-01) unless otherwise indicated.
3. Use an oscilloscope with more than 10M
3. Use an oscilloscope with more than 10M
Ω impedance.
4. Clean the object lens by an applicator with neutral detergent
when the signal level is low than specified value with the
following checks.
following checks.
S-Curve Check
Procedure :
1. Connect oscilloscope to IC103 qh pin.
2. Connect between TP (FE) and TP (VC) by lead wire.
3. Press the "/1 button to turn ON the power.
4. Load a disc (YEDS-18) and actuate the focus search. (In
1. Connect oscilloscope to IC103 qh pin.
2. Connect between TP (FE) and TP (VC) by lead wire.
3. Press the "/1 button to turn ON the power.
4. Load a disc (YEDS-18) and actuate the focus search. (In
consequence of open and close the disc tray, actuate the focus
search)
search)
5. Confirm that the oscilloscope waveform (S-curve) is
symmetrical between A and B. And confirm peak to peak level
within 3.0 ±0.5 Vp-p.
within 3.0 ±0.5 Vp-p.
7. After check, remove the lead wire connected in step 2.
Note : • Try to measure several times to make sure than the ratio
Note : • Try to measure several times to make sure than the ratio
of A : B or B : A is more than 10 : 8.8.
• Take sweep time as long as possible and light up the
brightness to obtain best waveform.
RF Level Check
Procedure :
1. Connect oscilloscope to TP (RFAC).
2. Press the "/1 button to turn ON the power.
3. Load a disc (YEDS-18) and playback.
4. Confirm that oscilloscope waveform is clear and check RF signal
1. Connect oscilloscope to TP (RFAC).
2. Press the "/1 button to turn ON the power.
3. Load a disc (YEDS-18) and playback.
4. Confirm that oscilloscope waveform is clear and check RF signal
level is correct or not.
BD board
Oscilloscope
IC103
qh
pin
TP(VC)
symmetry
S-curve waveform
within 3.0
±
0.5Vp-p
A
B
TP(RFAC)
TP(VC)
TP(VC)
BD board
oscilloscope
Note:
Clear RF signal waveform means that the shape “
◊” can be
clearly distinguished at the center of the waveform.
RF signal waveform
E-F Balance (1 Track jump) Check
Procedure:
1. Connect oscilloscope to TP (TE) and TP (VC) board.
2. Press the "/1 button to turn ON the power.
3. Load a disc (YEDS-18) and playback the number five track.
4. Press the u button. (Becomes the 1track jump mode.)
5. Confirm that the level B and A (DC voltage) on the oscilloscope
1. Connect oscilloscope to TP (TE) and TP (VC) board.
2. Press the "/1 button to turn ON the power.
3. Load a disc (YEDS-18) and playback the number five track.
4. Press the u button. (Becomes the 1track jump mode.)
5. Confirm that the level B and A (DC voltage) on the oscilloscope
waveform.
1 track jump waveform
Specification level:
x
100=less than ±50%
6. After check, remove the lead wire connected in step 1.
RF PLL Free-run Frequency
Procedure :
1. Connect frequency counter to test point TP (XPCK) with lead
1. Connect frequency counter to test point TP (XPCK) with lead
wire.
2. Press the "/1 button to turn ON the power.
3. Put the disc (YEDS-18) in to play the number five track.
3. Put the disc (YEDS-18) in to play the number five track.
Confirm that reading on frequency counter is 4.3218MHz.
VOLT/DIV : 200mV
TIME/DIV : 500ns
TIME/DIV : 500ns
level : 1.1
±
0.2Vp-p
oscilloscope
BD board
TP (TE)
TP (VC)
TP (VC)
+
–
–
0V
Center of
waveform
waveform
B
Symmetry
A (DC voltage)
level=1.5
±
1.0Vp-p
A
B
B
+
–
–
frequency counter
BD board
TP (XPCK)
SECTION 5
ELECTRICAL ADJUSTMENTS
22
Adjustment Location :
[ BD BOARD ] — SIDE B —
TP(FE)
TP(TE)
TP(VC)
TP(XPCK)
TP(RFAC)
IC103
30
16
15
1
CDP-LSA1
23
23
SECTION 6
DIAGRAMS
6-1. CIRCUIT BOARDS LOCATION
THIS NOTE IS COMMON FOR PRINTED WIRING
BOARDS AND SCHEMATIC DIAGRAMS.
(In addition to this, the necessary note is printed
in each block.)
BOARDS AND SCHEMATIC DIAGRAMS.
(In addition to this, the necessary note is printed
in each block.)
For schematic diagrams.
Note:
• All capacitors are in µF unless otherwise noted. pF: µµF
• All capacitors are in µF unless otherwise noted. pF: µµF
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
f
: internal component.
•
2
: nonflammable resistor.
•
5
: fusible resistor.
•
C
: panel designation.
For printed wiring boards.
Note:
• X
: parts extracted from the component side.
• Y
: parts extracted from the conductor side.
•
a
: Through hole.
• b
: Pattern from the side which enables seeing.
(The other layers' patterns are not indicated.)
•
U
: B+ Line.
•
V
: B– Line.
•
H
: adjustment for repair.
• Voltages and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Circled numbers refer to waveforms.
• Signal path.
• Signal path.
J
: CD (ANLOG)
c
: CD (DIGITAL)
Caution:
Pattern face side: Parts on the pattern face side seen from the
(Side B)
Pattern face side: Parts on the pattern face side seen from the
(Side B)
pattern face are indicated.
Parts face side:
Parts on the parts face side seen from the
(Side A)
parts face are indicated.
• Indication of transistor
C
B
These are omitted.
E
Q
B
These are omitted.
C
E
B
These are omitted.
C
E
Note:
The components identified by mark
The components identified by mark
0
or
dotted line with mark
0
are critical for
safety.
Replace only with part number specified.
Replace only with part number specified.
MAIN board
SUB MAIN board
TRANS board
PANEL board
BD board
LOADING board
CDP-LSA1
24
24
6-2. BLOCK DIAGRAMS – BD SECTION –
E
F
A
B
C
D
DRIVE
Q101
LD
RF EQ
AMP
BIAS
Q104
SUMMING
AMP
RF
ERROR
AMP
FOCUS
ERROR
AMP
TRACKING
APC LD
AMP
VC
BUFFER
VC
RF AMP
IC103
DIGITAL SERVO
DIGITAL SIGNAL PRCESSOR
IC101
LASER
DIODE
DETECTOR
IC1
OPTICAL ASSY (A-MAX.2)
A
C
D
B
E
F
LD
POWER
VR1
PD
MONOUT
LD
PD
LD
PD1
PD2
E
F
TE
FE
RFAC
RFDCO
RFC
ASYMMETRY
CORRECTION
AUTO
SEQUENCER
SERVO
INTEG-
RATOR
DIGITAL
PLL
EFM
DEMODULATOR
REGISTER
SUB CODE
PROCESSOR
ERROR
CORRECTOR
DATA BUS
32K
RAM
D/A
INTERFACE
DIGITAL
OUT
SERVO
INTERFACE
DIGITAL
CLV
SW
OP AMP
ANALOG SW
A/D
CONVERTER
PWM
GENERATOR
TRACKING
PWM
GENERATOR
FOCUS
PWM
GENERATOR
SLED
PWM
GENERATOR
VC
TRACKING
SERVO
FOCUS
SERVO
SLED
SERVO
SERVO DSP
TFDR
TRDR
FFDR
FRDR
SFDR
SRDR
MDP
DETECTOR
MIRR
DFCT
FOK
D OUT
PCM-D
S STOP
RFDC
FE
TE
CE
SE
CPU
INTERFACE
SENS
DATA
XLAT
CLOK
CLOCK
GENERATOR
XTAI
XTA0
XTSL
M
TRACKING
COIL
FOCUS
COIL
SLED
MOTOR
M102
M101
SPINDLE
MOTOR
T+
T
F+
F
SD+
SD
FOCUS/TRACKING COIL DRIVE
SLED MOTOR DRIVE
IC102
TFDR
TRDR
FFDR
FRDR
SFDR
SRDR
VC
MUTE
VC
VC
MUTE
09
S101
LIMIT SW
SQCK
A+5V
XRST
ADATA
D/O
1-4
1-2
BCLK
LRCK
SENS
DATA
SCLK
XLT
CLK
SCOR
SQSO
SCOR
SUBQ
SQCK
LPH
XRST
LD ON
LRCK
BCLK
C2PO
C2PO
D+5V
MD2
RF AC
ASYI
ASYO
CONTROL SIGNAL
BLOCK
SERVO
BLOCK
VCC
VC
MAIN
SECTION
• SIGNAL PATH
: CD (ANALOG)
(Page 25)
A
6
8
9
7
A+5V
10
11
1
2
22
23
2
1
16
15
20
SW
3
12
14
18
28
RFDCI 29
16
15
15
50
48
49
43
38
41
39
40
42
32
31
34
33
30
29
25
64
63
67
66
14
65
71
7
69
15
6
5
4
77
76
8
26
2
WFCK
WFCK
10
SBSO
SBSO
7
EXCK
EXCK
SPDL MUTE
80
14
13
12
11
17
18
27
24
26
24
25
22
12
13
6
1
4
7
6
5
4
INTEG-
RATOR
IC104
INV.
2
4
M
BUFFER
Q102
1
5
3
9
10
12
14
13
72
OSC
X201
33.8MHz
LDON
IC191
SPINDLE
MOTOR
DRIVE
LPF
SWITCH
IC102
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