Sony CDP-CX55 Service Manual ▷ View online
— 29 —
THIS NOTE IS COMMON FOR PRINTED WIRING BOARDS
AND SCHEMATIC DIAGRAMS.
(In addition to this, the necessary note is printed in each
block.)
AND SCHEMATIC DIAGRAMS.
(In addition to this, the necessary note is printed in each
block.)
NOTE
•
: parts extracted from the component side.
•
: parts extracted from the conductor side.
•
: Pattern from the side which enable seeing.
•
p
: parts mounted on the conductor side.
•
: Solder bridge
NOTE
• All capacitors are in
µ
F unless otherwise noted. pF :
µµ
F 50WV
or less are not indicated except for electrolytics and tantalums.
• All resistors are in
Ω
and 1/4W or less unless otherwise speci-
fied.
•
: panel designation.
•
B+
: B+ Line
•
B–
: B– Line
• Voltage and waveforms are dc with respect to ground under no-
signal conditions.
no mark : STOP
no mark : STOP
• Voltages are taken with a VOM (Input impedance 10M
Ω
).
Voltage variations may be noted due to normal production tol-
erances.
erances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal production tol-
erances.
erances.
• Circled numbers refer to waveforms.
• Signal path.
• Signal path.
: CD
: CD (digital)
: CD (digital)
• Abbreviation
CND : Canadian model.
SP
SP
: Singapore model.
AUS : Australian model.
IC501
#¡
EXTAL
10MHz
IC102
@¡
PCK
4.32MHz
IC102
$¢
XOUT
33.867MHz
IC102
^º
16M
33.867MHz
IC102
^¡
4.2M
4.23MHz
(PLAY)
IC101
$¡
RFSM
1.4Vp-p
(PLAY)
IC101
@º
FE
APPROX 400mVp-p
2.5V
APPROX 1Vp-p
(PLAY)
IC101
7
TE
BD SECTION
• Waveforms
MAIN SECTION
Note:
The components identi-fied
by mark
The components identi-fied
by mark
!
or dotted line with
mark
!
are critical for safety.
Replace only with part num-
ber specified.
ber specified.
Note:
Les composants identifiés par
une marque
Les composants identifiés par
une marque
!
sont critiques pour
la sécurité.
Ne les remplacer que par une
pièce portant le numéro spécifié.
Ne les remplacer que par une
pièce portant le numéro spécifié.
1
2
3
4
5
6
5.8Vp-p
5.2Vp-p
5.5Vp-p
7
5.6Vp-p
1
4.3Vp-p
— 30 —
7-2. IC BLOCK DIAGRAMS
DEFI
EFLG
SBSY
XVSS
XIN
XOUT
XVDD
MUTER
RVDD
RVDD
RCHO
RVSS
LVSS
LCHO
RVSS
LVSS
LCHO
LVDD
MUTEL
N.C
MUTEL
N.C
TEST4
TAI
PDO
VVSS
ISET
VVDD
FR
VSS
EFMO
EFMIN
TEST2
CLV+
CLV-
V / P
HFL
TES
SLICE LEVEL
CONTROL
µ
COM
INTERFACE
XTAL
TIMING GENERATOR
2K x 8BIT
RAM
RAM ADDRESS
GENERATOR
MUTE
SERVO
COMMANDER
CLV
DIGITAL SERVO
DIGITAL
ATTENUATOR
OVERSAMPLING
DIGITAL FILTER
1BIT DAC
L.P.F
DIGITAL OUT
GENERAL PORT
VCO CLOCK OSCILLATION
CLOCK CONTROL
SYNCRONOUS DETECTION
EFM DEMODULATION
SUBCODE CLASSIFICATION
QCRC
64
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
28
18 19 20 21
23 24 25 26 27
29
30
31
32
63
62
61
60
59 58 57 56 55 54 53 52
51
50
49
48
47
45
46
44
42
43
33
34
41
40
40
39
38
37
36
36
35
22
TEST1
CS
TEST5
RES
TEST1
16M
4.2M
COCK
COIN
SQOUT
RWC
WRQ
FSX
SBCK
SFSY
PW
EMPH
CF2
DOUT
TGL
TOFF
TEST3
JP+
JP-
PCK
FSEQ
VDD
CONT1
CONT2
CONT3
CONT4
CONT5
C1, C2
ERROR DETECTION
&
CORRECTION
FLAG PROTCESS
IC102 LC78622E
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
64
VCC1
LDS
LDD
BHI
PHI
LF2
VR
REFI
VCC2
FSS
DRF
CE
DAT
CL
CLK
DEF
FD-
FA
FA-
FE
FE-
SL-
SL+
AGND
SP
SPI
SPG
SP-
SPD
SLEQ
SLD
JP-
NC
TBC
FSC
DGND
SLI
SLC
RFS-
RFSM
CV+
CV-
CV-
SLOF
HFL
TES
TOFF
TOFF
TGL
JP+
FIN2
FINI
E
F
TB
TE-
TE
TESI
SCI
TH
TA
TD-
TD
JR
TO
FD
62
61
60
59
55 54 53 52 51 50
49
48
47
46
45
44
43
41
40
39
38
37
37
36
35
34
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
42
58
57
56
RF DET
I / V
VCA
VCA
LSC
RF AMP
BAL
TE
T. SERVO & T. LOGIC
F. SERVO & F. LOGIC
SPINDLE SERVO
SLED SERVO
µ
-COM
INTERFACE
APC
REF
+ -
+
-
+
-
+
-
+ -
+ -
+ -
- +
+ -
63
IC101 LA9240M
— 31 —
VCC
MUTE
VINL
VGL
VO1
VO2
VCC
VIN4
VG4
VO8
VO7
VREF
11k
Ω
11k
Ω
11k
Ω
11k
Ω
1
1
2
3
4
5
6
VO3
VO4
VG2
VIN2
REG OUT
REG IN
7
8
9
10
11
12
24
23
22
21
20
19
VO6
VO5
VG3
VIN3
CD
RES
18
17
16
15
14
13
+
-
+
-
LEVEL
SHIFT
LEVEL
SHIFT
BTL
DRIVER
BTL
DRIVER
BTL
DRIVER
BTL
DRIVER
LEVEL
SHIFT
LEVEL
SHIFT
REGULATOR
RESET
Vcc
IC103 LA6541
IC201 LA5602
VIN
EN
CDEL
GND
RES
CN
VOUT
1
2
3
4
REFERENCE
VOLTAGE
ERROR
AMP
OVER CURRENT
LIMITTER
OVER HEAT
PROTECTION
ON / OFF
RESET
GEN
5
6
7
IC104 LC89170M
1
2
3
4
5
6
7
8
9
10
14
13
12
11
VDD
DQSY
SRDT
SCLK
SW2
SW1
TEST
EXCK
SBSO
SCOR
WFCK
MCK
XMODE
GND
32 WORD X 8 BIT
DUAL PORT RAM
DUAL PORT RAM
TIMING
&
SYNCHRONIZATION
SIGNAL
PROTECTION
CRC
CHECKER
CPU INTERFACE
VDD
IC203 LA5601
VIN
EN
VO
CN
VOD
1
10
9
6
7
8
2
3
4
V.REF
RESET
5
ON/OFF
GND
CD
RES
VOMUTE
VID
AMP
AMP
IC601 BA6780
VIN2
FIN2
RIN2
CT2
VEE
FBIN-
FBIN+
OUT2+
OUT2-
VIN1
FIN1
REVERSIBLE DRIVER
FWD/REV CONTROLLER
COVERNER DRIVER
FWD/REV CONTROLLER
COVERNER
LOAD CURRENT
DETECTION
AMPLIFIER
COVERNER
OUTPUT
REFERENCE
VOLTAGE OUTPUT
LOW VOLTAGE
OUTPUT
RIN1
IOUT
VEE
VEE
VCC
VREF
VREG
VCC
OUT1+
+-
OUT1-
18
17
16
15
1
2
3
4
5
6
7
8
9
14
13
12
11
10
— 32 —
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