Sony CDP-CX355 Service Manual ▷ View online
49
CDP-CX355
IC505 LA6510 (MIAN Section)
VOUT1
+VIN1
VSENCE1
–
VIN1
–
VIN2
VCC
+VIN2
VOUT2
VSENCE2
VEE
1
2 3 4 5 6 7 8 9 10
+
–
+
–
IC931 LA5601 (MAIN Section)
3
6
7
2
5
1
4
9
8
10
ON/OFF
AMP
V REF
AMP
RESET
VOMUTE
CD
VIN
VO
RES
CN
GND
EN
VID
VOD
IC702 M66310FP (DISPLAY Section)
24
0
D
R
CK
23
0
D
R
CK
22
0
D
R
CK
21
0
D
R
CK
20
0
D
R
CK
19
0
D
R
CK
18
0
D
R
CK
17
0
D
R
CK
16
0
D
R
CK
15
0
D
R
CK
14
0
D
R
CK
13
4
5
6
7
8
9
10
11
12
0
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
D
1
R
CK
D
1
0
0
R
CK
D
R
CK
D
R
CK
1
2
3
D
1
R
CK
D
1
0
0
R
CK
D
R
CK
D
R
CK
QC
QD
QE
QF
QG
QH
QI
QJ
QK
QL
QM
QN
QA
QB
VCC
DATA
OE
LT
RST
CLK
GND
SQP
QO
QP
50
CDP-CX355
7-21. IC Pin Functions
• IC101 DIGITAL SIGNAL PROCESSOR (CXD2587Q) (BD Section)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
I/O
O
I
I
I
I
I
I
O
I
—
I/O
I
I
O
O
O
O
O
O
O
I/O
I/O
I/O
I/O
I/O
O
I
O
O
O
O
O
O
—
I
I
I
I
I
I
I
I
I
O
—
I
—
Pin Name
SQSO
SQCK
XRST
SYSM
DATA
XLAT
CLOK
SENS
SCLK
VDD
ATSK
SPOA
SPOB
XLON
WFCK
XUGF
XPCK
GFS
C2PO
SCOR
COUT
MIRR
DFCT
FOK
LOCK
MDP
SSTP
SFDR
SRDR
TFDR
TRDR
FFDR
FRDR
VSS
TEST
TES1
XTSL
VC
FE
SE
TE
CE
RFDC
ADIO
AVSS0
IGEN
AVDD0
Description
Sub-Q 80-bit and PCM peak level data output (CD text data output)
Clock input for SQSO read-out
System reset “L” : reset
Muting input “H” : mute
Serial data input, supplied from CPU
Latch input, supplied from CPU
Serial data transfer clock input, supplied from CPU
SENS signal output to CPU
SENS serial data read-out clock input
Digital power supply
Input pin for anti-shock (Connected to ground)
Microcomputer escape interface input A
Microcomputer escape interface input B
Microcomputer escape interface output (Not used)
WFCK output (Not used)
Not used
Not used
Not used
Not used
Sub-code sync output
Numbers of track counted signal input/output (Not used)
Mirror signal input/output (Not used)
Defect signal input/output (Not used)
Focus OK input/output (Not used)
GFS is sampled by 460 Hz. H when GFS is H (Not used)
Output to control spindle motor servo
Input signal to detect disc inner most track
Sled drive output
Sled drive output
Tracking drive output
Tracking drive output
Focus drive output
Focus drive output
Digital ground
TEST pin connected normally to ground
TEST pin connected normally to ground
X’tal selection input (Connected to ground)
Center voltage input pin
Focus error signal input
Sled error signal input
Tracking error signal input
Center servo analog input
RF signal input
Test pin (Not used)
Analog ground
Stabilized current input for operational amplifiers
Analog power supply
• Abbreviation
GFS : Guarded Frame Sync
51
CDP-CX355
Pin No.
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
I/O
O
I
I
I
—
I
O
I
O
—
—
—
O
O
O
O
O
—
I
O
—
—
O
I
O
—
—
O
I
O
—
O
O
Pin Name
ASYO
ASYI
BIAS
RFAC
AVSS3
CLTV
FILO
FILI
PCO
AVDD3
VSS
VDD
DOUT
LRCK
PCMD
BCK
EMPH
XVDD
XTAI
XTAO
XVSS
AVDD1
AOUT1
AIN1
LOUT1
AVSS1
AVSS2
LOUT2
AIN2
AOUT2
AVDD2
RMUT
LMUT
Description
EFM full swing output
Asymmetry comparate voltage input
Asymmetry circuit constant current input
EFM signal input
Analog ground
Control voltage input for master VCO1
Filter output for master PLL
Filter input for master PLL
Charge-pump output for master PLL
Analog power supply
Digital ground
Digital power supply
Digital-out output pin
D/A interface LR clock output (ƒ = Fs) (Not used)
D/A interface serial data output (Not used)
D/A interface bit clock output (Not used)
Playback disc output in emphasis mode (Not used)
Power supply for master clock
X’tal oscillator circuit input (16.9344MHz)
X’tal oscillator circuit output (16.9344MHz)
Ground for master clock
Analog power supply
L-ch analog output
L-ch operational amplifiers input
L-ch line output
Analog ground
Analog ground
R-ch line output
R-ch operational amplifiers input
R-ch analog output
Analog power supply
R-ch “0” detection flag output
L-ch “0” detection flag output
• Abbreviation
EFM : Eight to Fourteen Modulation
PLL : Phase Locked Loop
PLL : Phase Locked Loop
52
CDP-CX355
• IC501 SYSTEM CONTROL (MN101C49GSA) (MAIN Section)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
—
I
I
I
I
I
I
I
I
—
—
O
I
—
I
O
—
I
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
O
O
I
O
O
O
O
I
O
O
O
I
I
O
O
O
O
Pin Name
GND
DOOR SW
GND
KEY1
KEY2
KEY3
KEY4
KEY5
D.SENS
VREF
VDD
OSC2
OSC1
VSS
XI
XO
GND
AC IN
ICSW (RELAY ON/OFF)
LEDLT
FLDATA
FLLT
FLCLK
RESET OUT
STAND-BY LED
RMIN
T2
T4
BUSIN
SCOR
KBCIN
T1
RESET
KBCOUT
KBDOUT
KBDIN
TEST-PULSE2
TEST PULSE
AGC
SMUTE
AMUTE
DATA
XLT
CLK
SENS
SUBQ
SQCK
LED3
LED2
LED1
Description
Ground
Door panel SW (5V: OPEN)
Digital filter (not used)
Key A/D input
Disc sensor input
A/D standard power terminal
Power supply terminal (+5V)
Main clock (10MHz) Output
Main clock (10MHz) Input
Ground terminal
Not used
Not used
Ground terminal
Power monitor input
Power terminal for circumference IC
Latch for LED driver output
Data for fluorescent indicator driver output
Latch for fluorescent indicator output
Clock for fluorescent indicator output
Reset output for circumference IC
LED output for STANDBY
Remote control input
Table sensor input
CONTROL A1 input
Sub code Q synchronous signal
Keyboard clock input
Table sensor input
System reset signal input
Keyboard clock output
Keyboard data output
Keyboard data input
DISC detection test output
TSENS1, 2 output
CXD2587Q LPH output
Mute on output
Mute on input
CXD2587Q D/F data output
CXD2587Q Latch output
CXD2587Q D/F clock output
CXD2587Q Servo sensor signal input
CXD2587Q Q data input
CXD2587Q Q data clock output
interior illumination
interior illumination
interior illumination
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