Sony CDP-CX355 Service Manual ▷ View online
46
46
CDP-CX355
7-19. Printed Wiring Board – SWITCH/MOTOR Section –
7-20. Schematic Diagram – SWITCH/MOTOR Section –
TO
MAIN BOARD
CN509
(Page 36)
TO
MAIN BOARD
CN503
(Page 36)
TO
MAIN BOARD
CN508
(Page 36)
CNP85
TO
MAIN BOARD
CN504
(Page 36)
TO
MAIN BOARD
CN505
(Page 36)
L.SW (A) BOARD
L.SW (B) BOARD
• See page 31 for Circuit Boards Location.
47
CDP-CX355
• IC Block Diagrams
IC101 CXD2587Q (BD Section)
TE
RFDC
CE
IGEN
AVSS0
ADIO
AVDD0
CLTV
FILO
AVSS3
VSS
AVDD3
DOUT
VDD
PCO
FILI
ASYO
ASYI
RFAC
BIAS
SSTP
DFCT
MIRR
MDP
LOCK
FOK
SFDR
VSS
TEST
FRDR
FE
VC
VC
COUT
SE
XTSL
TES1
SRDR
TFDR
FFDR
TRDR
TRDR
2
1
70
71
68
69
66
67
64
65
62
61
63
73
74
72
75
76
77
78
79
80
4
XRST
3
SQCK
SQSO
5
9
8
7
6
56
60
53
54
55
59
57
58
51
52
48
49
50
47
44
45
46
43
41
42
XLAT
CLOK
SENS
SYSM
DATA
XUGF
XPCK
GFS
C2PO
WFCK
10 11 12 13 14 15 16 17 18 19 20
21
22
23
24
25
26
32
33
30
31
36
37
34
35
39
40
38
28
27
29
SPOA
ATSK
SCLK
VDD
SCOR
SPOB
XLON
XTAI
XVDD
EMPH
AVDD1
AOUT1
AIN1
XTAO
XVSS
XVSS
AIN2
AOUT2
AVDD2
RMUT
LOUT2
LOUT1
BCK
LRCK
PCMD
LMUT
AVSS1
AVSS2
CPU
INTERFACE
SERVO AUTO
SEQUENCER
SERIAL IN
INTERFACE
OVER SAMPLING
DIGITAL FILTER
3rd ORDER
NOISE SHAPER
PWM
PWM
EFM
DEMODULATOR
TIMING
LOGIC
DIGITAL
OUT
D/A
INTERFACE
DIGITAL
PLL
ASYMMETRY
CORRECTION
CORRECTION
CLOCK
GENERATOR
MIRR, DFCT,
FOK
DETECTOR
DIGITAL
CLV
SUBCODE
PROCESSOR
SERVO
INTERFACE
SERVO DSP
FOCUS
SERVO
SERVO
TRACKING
SERVO
SLED
SERVO
PWM GENERATOR
FOCUS PWM
GENERATOR
TRACKING
PWM GENERATOR
SLED PWM
GENERATOR
16K
RAM
ERROR
CORRECTOR
INTERNAL BUS
A/D
CONVERTER
OPERATIONAL
AMPLIFIER
ANALOG SWITCH
48
CDP-CX355
IC131 CXA2581N-T4 (BD Section)
RW/ROM
RW/ROM
EQ ON/OFF
VOFST
VOFST
DVC
VC
VC
VC
RW/ROM
VC
DVC
30
29
28
+
–
+
–
DVC
VCC
DVC
27
26
25
24
RW/ROM
EQ
23
22
21
20
19
RFAC
VCA
VCC
+
–
DVC
+
–
+
–
RW/ROM
VC
RW/ROM
DVC
+
–
3
A
B
C
D
B
C
C
A
A
A
B
C
C
D
B
C D
D
+
–
1
2
APC AMP
5
6
7
8
9
4
RFAC
SUMMING
AMP
RW/ROM
APC-OFF
(Hi-Z)
RW/ROM
(H/L)
VOFST
VC
RW/ROM
+
–
10
11
GM
GM
18
17
16
B
D
A
C
13
14
15
12
EQ IN
LD
PD
GND
A
B
C
D
AC SUM
E
F
DVCC
DVC
RFAC
SW
DC OFST
RFDCI
RFDCO
VC
RFC
VFC
BST
RFG
VCC
CEI
CE
TE BAL
TE
FEI
FE
IC504 M5M5256DFP-70XL (MAIN Section)
VCC
W
A13
A8
A9
A11
OE
A10
SI
DQ8
DQ7
DQ6
DQ5
DQ4
A12
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
DQ3
GND
A7
A14
CLOCK
GENERATOR
OUTPUT
BUFFER
SENSE
AMP
32768 WORD
x 8 BIT
RAM
(512 x 512)
ROW
ADDRESS
DECODER
DECODER
ROW INPUT BUFFER
COLUMN INPUT BUFFER
COLUMN
ADDRESS
DECODER
DECODER
INPUT
DATA
CONTROL
1
2 3 4
5 6 7
8 9 10
11 12 13 14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
49
CDP-CX355
IC505 LA6510 (MIAN Section)
VOUT1
+VIN1
VSENCE1
–
VIN1
–
VIN2
VCC
+VIN2
VOUT2
VSENCE2
VEE
1
2 3 4 5 6 7 8 9 10
+
–
+
–
IC931 LA5601 (MAIN Section)
3
6
7
2
5
1
4
9
8
10
ON/OFF
AMP
V REF
AMP
RESET
VOMUTE
CD
VIN
VO
RES
CN
GND
EN
VID
VOD
IC702 M66310FP (DISPLAY Section)
24
0
D
R
CK
23
0
D
R
CK
22
0
D
R
CK
21
0
D
R
CK
20
0
D
R
CK
19
0
D
R
CK
18
0
D
R
CK
17
0
D
R
CK
16
0
D
R
CK
15
0
D
R
CK
14
0
D
R
CK
13
4
5
6
7
8
9
10
11
12
0
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
1
D
R
CK
D
1
R
CK
D
1
0
0
R
CK
D
R
CK
D
R
CK
1
2
3
D
1
R
CK
D
1
0
0
R
CK
D
R
CK
D
R
CK
QC
QD
QE
QF
QG
QH
QI
QJ
QK
QL
QM
QN
QA
QB
VCC
DATA
OE
LT
RST
CLK
GND
SQP
QO
QP
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