DOWNLOAD Sony CDP-CE525 / CDP-CE535 Service Manual ↓ Size: 3.13 MB | Pages: 40 in PDF or view online for FREE

Model
CDP-CE525 CDP-CE535
Pages
40
Size
3.13 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
cdp-ce525-cdp-ce535.pdf
Date

Sony CDP-CE525 / CDP-CE535 Service Manual ▷ View online

– 35 –
Pin No.
Pin Name
I/O
Function
• IC302 MASTER CONTROL (CXP84648-019Q)
• Abbreviation
FL : Fluorescent indicator tube
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
O
O
O
O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
O
I
I
O
I
O
I
I
Address data output to S-RAM
Address data output to S-RAM
Address data output to S-RAM
Address data output to S-RAM
Not used
Data input/output with S-RAM
Data input/output with S-RAM
Data input/output with S-RAM
Data input/output with S-RAM
Data input/output with S-RAM
Data input/output with S-RAM
Data input/output with S-RAM
Data input/output with S-RAM
PLAY lamp control output
PAUSE lamp control output
MEGA lamp control output
XFADE lamp control output
DELAY lamp control output
Write signal output to S-RAM
Loading motor control output (loading-in)
Loading motor control output (loading-out)
FL driver clock output
FL driver data output
FL display masthead light output
Address data output to S-RAM
Address data output to S-RAM
Address data output to S-RAM
Disc sensor input
Not used
Reset signal input
10 MHz clock input
10 MHz clock output
Ground
Not used
Connected to ground
Analog ground
Analog reference voltage input
CONTROL-A1 transmission output
Model select input
key input
D3
D4
D2
D1
D0
A8
A7
A6
A5
A4
A3
A2
A1
LED PLAY
LED PAUSE
LED MEGA
LED XFADE
LED DELAY
WE
LOD IN
LOD OUT
* FL.CLK
* FL.DATA
* BLK
A13
A14
A15
DSENS
RST
EXTAL
XTAL
VSS
NC (TX)
TEX
AVSS
AVREF
BUSOUT
VERSION
KEY 6
– 36 –
Pin No.
Pin Name
I/O
Function
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
KEY 3
CD1/2/3
KEY 2
KEY 1
ADJ
TSENS
* FLT
CLK
LDON
DATA
SQCK
SUBQ
PRGLT
SENSE
NC
RMIN
NC
XLT
AMUTE
DQSY
SCOR
BUSIN
XSEL
ZMUTE
LP CONT
S1
S2
S3
TBLL
TBLR
A0
VDD
VDD
A12
A11
A10
A9
D7
D6
D5
I
I
I
I
I
I
O
O
O
O
O
I
O
I
I
I
I
O
O
I
I
I
O
O
O
I
I
I
O
O
O
O
O
O
O
O
O
O
key input
Remote control mode select input
key input
key input
n Test mode input
Table sensor of disc table input
FL driver latch output
Serial clock output
Optical pick-up laser diode control output
Serial data output
Subcode Q data readout clock output
Subcode Q data input
Digital filter latch output
SENSE signal input
Connected to VDD
Remote control signal input
Connected to VDD
Serial data latch output
Audio mute output
Not used
Subcode sync input
CONTROL-A1 receive input
Not used
2nd input mute output
LP control hold output
Loading position detection input
Loading position detection input
Loading position detection input
Table motor left control output
Table motor right control output
Address data output to S-RAM
+5V power supply
+5V power supply
Address data output to S-RAM
Address data output to S-RAM
Address data output to S-RAM
Address data output to S-RAM
Address data output to S-RAM
Address data output to S-RAM
Address data output to S-RAM
– 37 –
• BD section
6-12. IC BLOCK DIAGRAMS
IC101  CXA2585Q
3
80
76
74
75
73
72
68
64 63
62 61
58
59
60
67 66 65
69
71 70
1
78
79
77
2
5
4
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21 22
25 26 27 28 29 30 11 11
31 32
33 34
35 36 37
38 39 40
46
50
53
55
52
57
56
51
54
49
48
47
44
41
42
43
24
23
Clock
Generator
D/A
Interface
Error
Corrector
32K
RAM
Sub Code
Processor
EFM
demodurator
Digital
OUT
Digital
PLL
Asymmetry
Corrector
Servo
Auto
Sequencer
Digital
CLV
MIRR
DFCT
FOK
SERVO
Interface
CPU
Interface
OPAmp
Analog SW
A/D
Converter
PWM GENERATOR
FOCUS SERVO
SERVO DSP
SLED SERVO
TRACKING
SERVO
TRACKING PWM
GENERATOR
SLED PWM
GENERATOR
FORCUS PWM
GENERATOR
45
SIGNAL PROCESSOR BLOCK
SERVO BLOCK
MUTE
XRST
DVDD0
DATA
XLAT
CLOCK
SENS
SCLK
ATSK
WFCK
XUGF
XPCK
GFS
SCOR
WDCK
C4M
DVSS0
COUT
MIRR
V2PO
DFCT
FOK 
PWMI 
LOCK 
MDP 
SSTP 
FETO 
DVDD1
SFDR 
SRDR 
TFDR 
TRDR 
FFDR 
FRDR 
DVSS1
TEST 
TES1 
VC 
FE 
SE 
IGEN
 AVSSO
ADIO
RFDC
CE     
TE    
RFAC
ASYI
ASYO
AVDD0
AVDD1 
AVSS1
BIAS
VCTL
V16M
VPCO
PCO
FILI
FILO
CLTV
EXCK
SBSO
SCSY
SQCK
SQSO
XOLT
SOCK
SOUT
XTAO
XTAI 
DVSS2
XTSL
EMPH
BCK   
PCMD
LRCK
DOUT
MD2  
ASYE
DVDD2
– 38 –
IC102  BA6392FP
IC103  CXD2568M
BUFF
BUFF
BUFF
BUFF
R
R
F
F
1
CH1 OUT F
2
CH1 OUT R
3
CAPA IN 1
4
CH1 R IN
5
CH1 F IN
6
VREF IN
7
VREF OUT
8
GND
9
CH2 F IN
10
CH2 R IN
11
CAPA IN 2
12
CH2 OUT R
13
CH2 OUT F
14
GND
28 GND
27 CH4 OUT F
26 CH4 OUT R
25 VB IN
24 VS IN
23 VB IN
22 VCC
21 VCC
20 CH3 F IN
19 CH3 R IN
18 CAPA IN 3
17 CH3 OUT R
16 CH3 OUT F
15 MUTE
LEVEL
SHIFT
INTERFACE
BUFF
BUFF
BUFF
BUFF
R
F
R
F
BUFF
INTERFACE
INTERFACE
F
F
R
R
MUTE
11
12
10
VC
VC
VC
VC
VC
VC
VC
VCC
VCC
RF SUMMING AMP       RF_EQ_AMP
ERROR AMP
FOCUS
TRACKING
ERROR AMP
VC BUFFER
VCC
VCC
VC
VC
VC
VC
VEE
VEE
VEE
VEE
VEE
VREF
13
14
15
6
5
1
2
3
4
7
8
9
16
19
20
21
22
23
24
18
17
HOLD
LD
PD
A
B
C
D
VEE
F
E
VC
AGCVTH
AGCCONT
VCC
LC/PD
LD_ON
HOLD_SW
RF_BOT
RFTC
RF_1
RFO
RFE
FE
TE
(50%/30%
OFF)
APC PD AMP
APC LD AMP
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