DOWNLOAD Sharp LC-65XS1E (serv.man5) Service Manual ↓ Size: 773.89 KB | Pages: 15 in PDF or view online for FREE

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LC-65XS1E (serv.man5)
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15
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Service Manual
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Device
TV / LCD / Major IC Informations
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lc-65xs1e-sm5.pdf
Date

Sharp LC-65XS1E (serv.man5) Service Manual ▷ View online

LC-52XS1E/RU/LC-65XS1E/RU
5 – 1
LC-52XS1E
Service Manual
 
CHAPTER 5. 
MAJOR IC INFORMATIONS
[1] MAJOR IC INFORMATIONS
No.
REF 
No.
Name
Part Code
Description
Drawing 
No.
[IF PCB]
1
IC6001
VHiS24CS02J-1Y
2K E2PROM
This IC is 2 K bit 2 wire serial E2PROM. This EEPROM chip stores EDID-data for 
HDMI of a display. This data is controlled through I2C signals. It is written in exe-
cuting EDID WRITE on the monitor process adjustment and the 3 page. Please 
write in at the time of IC exchange. The harness of LB connector on IF board 
(P7908) is making a monitor's size distinction serve a double purpose.
Please write in after attaching the right harness. (The data of EDID changes by 
harness classification.)
*harness LB 
 
•52size QCNW-H636WJQZ 11pin – 12pin open 
                                              13pin – 14pin open
 
•65size QCNW-H623WJQZ 11pin – 12pin open 
                                              13pin – 14pin short 
*harness KM 
 52size QCNW-H712WJQZ 
 65size QCNW-H709WJQZ
 
•8pin – 9pin      short
 
•10pin – 11pin  short 
 
•12pin – 13pin  open
 1/20
2
IC6004
VHiSii9181A-1Q
HDMI_SW
This IC is IC for HDMI SW.
It is used as an equalizer for waveform shaping of the case where the cable which 
is not an enclosed HDMI cable is used, and the sake at the time of 10m cable 
(schedule) use of an option.
 1/20
3
IC6102
VHiSii9125+-1Q
HDMI_RX
This IC is HDMI Receiver IC. A differential signal is input from IC6004, and it con-
verts it into 8 bits of RGB of CMOS for each. 
 2/20
4
IC6052
VHiTLVD1023-1Q
LVDS 
TRANSMIT-
TER
This is LVDS (Low-Voltage Differential Signaling) transmitter IC.
It convert each 8 bits of RGB of CMOS from IC6102 into a LVDS signal.
 3/20
5
IC6201
RH-iXC068WJQZQ
DECODER 
& CPU
This IC is DECODER & MAIN CPU. Although the output from STB is 1080p, 
when the signal of 480p and 1080i is directly connected to a display, the signal of 
480p and 1080i is changed into 1080p by this IC. Moreover, OSD of a display is 
generated here and added to a picture signal. Data reading processing is also 
performed from a service terminal as a wall picture function here.
 4/20
6
IC6301
RH-iXB800WJQZY
Clock Gen-
erator
This IC is a clock generator. From a 27MHz crystal oscillator, generation of 
48MHz for SCC, 54MHz for STC, and 74.25MHz for PWM is performed.
 5/20
7
IC6302
RH-iXB801WJQZY
CLOCK-
GEN
This IC is a clock generator. From a 27MHz crystal oscillator, generation of 
54MHz for STC, 33MHz for CPLD, 33MHz for FPGA, and 33MHz for PCI is per-
formed.
 5/20
8
IC6402
/3/4/5
RH-iXC511WJQZQ
512Mb-
DDR2-
SDRAM-
MEMORY
This is a 512Mb DDR2 SDRAM IC. This IC is IC for IrSS encoding.
It operates as a memory of IC6201 (DECODER).
6/20
9
IC6351
RH-iXC012WJQZQ
Ir_communi
cation con-
troller
This IC is IC for IrSS encoding.
It encodes by receiving the signal from the IrSS euphotic part on a RC/LED 
board, and data is transmitted to IC6201 through SLOW BUS.
7/20
10
IC6608
VHiBR24L64F-1Y
64K 
E2PROM
This IC is 64K bit serial E2PROM of 8K word *8K bit configuration.
As for this IC, the data of a portion with which IC6201 (DECODER) is processing 
is saved.
 8/20
11
IC6651
VHi29GL064N-1Q
64Mb-
FLASH
The S29GL064A is 64Mb-NOR Flash memory.
The software of IC6201 (DECODER) is stored.
9/20
12
IC6652
RH-iXC623WJQZQ 
1Gb-NAND-
FLASH
This IC is 1 Gb-NAND-FLASH memory.
The data of IC6201 (DECODER) and the pre-install picture of a wall picture func-
tion are stored in this IC.
9/20
13
IC6702
RH-iXC588WJN1Q CPLD
This IC is CPLD (Complex Programmable Logic Device).
By SLOW BUS control signal, the reset signal sent to each device, the extended 
I/O port of the control signal etc., and the modulated light signal are generated. 
10/20
14
IC6804
VHiAK7770EQ-1Q
S-DSP
This IC is Audio DSP. This IC is performing delayed audio delay processing of the 
picture of IC6201(DECODER), analog 2.1ch processing, and processing of SRS 
TruSurroundXT from I2S signal inputted from IC7103(FPGA).
11/20
15
IC6902
VHiADAU1592-1Y
1bit-AMP
This IC is 1-bit amplifier. A sampling frequency is 12.288MHz. It drives by 
7.5W+7.5W in all of the 52 types and 65 types.
12/20
16
IC6951
VHiYDA147SZ-1Y
SUB-P-AMP
This IC is a digital audio power amplifier. In this models, it used as woofer for SRS 
TruSurroundXT, and it drives by 15W in 52 and 65 types. 
13/20
LC-52XS1E/RU/LC-65XS1E/RU
5 – 2
1. IF PWB
1. IC6001 (VHiS24CS02J-1Y)
This is an EEPROM in which the EDID for the HDMI of the display is stored. The writing process is carried out by executing the EDID WRITE func-
tion described on page 3. The writing process must be implemented when the IC is replaced. The harness of the LB connector (P7908) on the IF
PWB is also used for identifying the size of the monitor. The harness of the KM connector (P7905) on the IF PWB is also used for setting the des-
tination of the monitor. The writing process must be carried out after the proper harnesses are attached. (The EDID varies depending on the types
of harnesses.)
While the STB reads the value contained in this EEPROM, the model mode on the side of the STB changes accordingly (as indicated on the upper
right side of the page 1 of the process screen for STB). Also, the operation of the monitor alone mode partially changes depending on the destina-
tion.
2. IC6004 (VHiSII9181A-1Q)
This is an HDMI SW used as an equalizer for waveform shaping in case any cable other than the attached HDMI cable is used or the optional 10
m cable (planned) is used.
HDMI Switch
17
IC7103
RH-iXC582WJQZQ
FPGA
This IC is FPGA (Field Programmable Gate Array) IC.
In this IC, 10 bit LVDS signal from IC6201(DECODER) is input, and it processes 
the color gamut conversion, the skin color correction is processed, and it outputs 
it with each RGB LVTTL in 10 bits. Moreover, the I2S signal from IC6102 is input, 
and the audio delay processing for the picture delay generated since the LCD 
TCON+A3C substrate is done. 
14/20
18
IC7502
VHiTLVD1023-1Q
LVDS 
TRANSMIT-
TER
This is an LVDS (Low-Voltage Differential Signaling) transmitter IC.
This IC converts each 10 bits of RGB of LVTTL from IC7103(FPGA) into a LVDS 
signal. 
15/20
19
IC7002
RH-iXC331WJQZQ
Monitor-
UCON
This IC is a 16-bit monitor microcomputer which carries M16C/60 series CPU 
core. In this IC, the receiving light of R/C, control of the CEC signal, detection of 
key, and detection of OPC are performed. Moreover, detection of the error about 
the power supply in IF board and power supply management of the monitor part 
are performed.
17/20
20
IC7006
VHiBR24L04F-1Y
4K E2PROM
This IC is 4K bit serial E2PROM of 512 word *8K bit configuration.
This IC saves the data of a portion with which IC7002 (MONITOR-MICON) is pro-
cessing.
17/20
21
IC5802
VHiLTC1154+-1Y
5V-REG
It is power supply IC for supplying the object 5V for the wireless transmission 
units of an option. It has short circuit detection and a thermal shutdown function.
 18/20
22
IC5901
VHiBD9045FV-1Y
2CH-DC/
DC-CONV
This IC is 2 CH-DC/DC-CONV-IC. 15V from a power supply unit is inputted, and 
5V and 3.3V which are used within IF board are generated.
 Moreover, over-current protection, over voltage protection, short protection, and 
RT open short protection etc. builds in the substantial protection circuit.
19/20
23
IC5902
VHiBD9045FV-1Y
2CH-DC/
DC-CONV
This IC is 2 CH-DC/DC-CONV-IC. 15V from a power supply unit is inputted, and 
1.2V and 1.8V which are used within IF board are generated.
19/20
Pin No.
Pin Name
I/O
Pin Function
System Switching
37
DSDA
I/O
DDC I2C Data for respective port. 
38
DSCL
I
DDC I2C Clock.
39
RPWR
I
5V Port detection input. Connect to 5V signal from HDMI input connector.
25
HPD
O
Hot Plug Detect Output. Connect to HOTPLUG of HDMI input connector.
51
HPDIN
I
Hot Plug Detect Input.
53
TSCL
O
Master DDC I2C Clock (Open Drain Output) to HDMI receiver. I2C transactions required for HDCP opera-
tion are performed over this I2C bus.
52
TSDA
I/O
Master DDC Data (Open drain output.) to HDMI receiver.
I2C transactions required for HDCP operation are performed over this I2C bus.
Configuration
54
I2CADDR/TPWR
I/O
I2C Slave Address input/Transmit Power Sense output pin.
When RESET# is low, this pin is used as an input to latch the I2C sub-address. The level on this pin is 
latched when the RESET# pin transitions from low to high.
When RESET# is high, this pin is used as the TPWR output, indicating that the Rx-port has 5V present.
No.
REF 
No.
Name
Part Code
Description
Drawing 
No.
LC-52XS1E/RU/LC-65XS1E/RU
5 – 3
24
I2CSEL/INT#
I/O
I2C Selection input/ Interrupt output pin. 
The SiI9181A has two modes of operation: I2C control and Standalone. The mode is determined by the 
level of the I2CSEL/INT pin at the rising edge of RESET#. A high indicates I2C mode, and a low indicates 
Standalone mode.
In I2C control mode, all functions are controlled and observed with I2C registers using the pins LSCL/
EPSEL1 and LSDA/EPSEL0 as the local I2C bus.
In Standalone mode, the external pins LSCL/ EPSEL1 and LSDA/ EPSEL0 are use to determine whether 
the SiI9181A is in Normal mode or Standby mode.
After reset, this pin becomes the Interrupt output.
This is an open-drain output and requires an external pull-up.
50
RSVDL
---
Reserved for use by Silicon Image and must be tied low.
Control Pins
11
RESET#
I
Reset Pin (Active LOW). Certain configuration inputs are latched when RESET# transitions from low to 
high.
13
LSCL/EPSEL1
I
Local I2C Clock / External Port Select 1. When I2CSEL is high, this becomes the Local I2C bus clock pin, 
LSCL. When I2CSEL is low, this becomes the external port select pin, EPSEL1. True open drain, so does 
not pull to ground if power not applied. An external pull-up is required.
12
LSDA/EPSEL0
I/O
Local I2C Data / External Port Select 0. When I2CSEL is high, this becomes the Local I2C bus data pin, 
LSDA. When I2CSEL is low, this becomes the external port select pin, EPSEL0. True open drain, so does 
not pull to ground if power not applied. An external pull-up is required.
CEC Pins
41
CEC_A
I/O
HDMI compliant CEC I/O used to interface to CEC devices.
CEC electrically compliant signal. This pin connects to the CEC signal of all HDMI connectors in the sys-
tem.
As an input, the pad acts as a LVTTL Schmitt triggered input and is 5V tolerant. As an output, the pad acts 
as an NMOS driver with resistive pull-up. This pin has an internal pull-up resistor.
40
CEC_D
I/O
CEC interface to local system. True open-drain. An external pull-up is required. This pin typically connects 
to the local CPU.
Differential Signal Data Pins
30
RX0+
I
TMDS input data pairs.
29
RX0-
I
33
RX1+
I
32
RX1-
I
35
RX2+
I
34
RX2-
I
28
RXC+
I
TMDS input clock pair.
27
RXC-
I
6
TX0+
O
TMDS output data pairs.
7
TX0-
O
3
TX1+
O
4
TX1-
O
1
TX2+
O
2
TX2-
O
8
TXC+
O
TMDS output clock pair.
9
TXC-
O
10
EXT_SWING
O
Voltage Swing Adjust. A resistor tied from this pin to AVCC18 determines the amplitude of the voltage 
swing. The recommended value is 750 
Ω.
Power and Ground Pins
14, 15, 16, 
17, 18, 19, 
20, 21, 43, 
44, 45, 46, 
47, 55, 56
AGND
---
Analog GND.
5, 26, 36
AVCC18
---
Analog VCC. Connect to 1.8V supply.
22, 48
DVCC18
---
Digital VCC. Connect to 1.8V supply.
23, 49
DGND
---
Digital GND.
31, 42
AVCC33
---
Analog VCC. Connect to 3.3V supply.
Pin No.
Pin Name
I/O
Pin Function
LC-52XS1E/RU/LC-65XS1E/RU
5 – 4
3. IC6102 (VHiSii9125+-1Q)
This is an HDMI Rx, which converts the differential signals input from IC6004 into 8-bit RGBs of LVTTL.
HDMI Receiver
Pin No.
Pin Name
I/O
Pin Function
Digital Video Output Pins.
16, 15, 14, 13, 10, 9, 8, 7, 3, 2, 1, 
144, 141, 140, 139, 138, 135, 134, 
133, 132, 129, 128, 127, 126, 123, 
122, 121, 120, 117, 116, 115, 114, 
111, 110, 109, 108
Q[35:0]
O
36-bit Output Pixel Data Bus.
Q[35:0] is highly configurable using the VDD_CONFIG resister.
It supports a wide array of output formats, including multiple RGB and YCbCr bus for-
mats.
19
DE
O
Data enable.
20
HSYNC
O
Horizontal Sync Output control signal.
21
VSYNC
O
Vertical Sync Output control signal.
22
EVNODD
O
indicates Even or Odd Field for interlaced Formats.
5
ODCK
O
Output Data Clock.
Digital Audio Output Pins.
95
XTALIN
I
Crystal Clock Input. 26-28.5MHz
94
XTALOUT
O
Crystal Clock Output.
89
MCLK
O
Audio Master Clock Output.
86
SCK
O
I2S Serial Clock Output.
85
WS
O
I2S Word Select Output.
81
SD
O
I2S Serial Data Output.
78
SPDIF
O
S/PDIF Audio Output.
75
MUTEOUT
O
Mute Audio Output.
Configuration/Programming Pins.
102
INT
O
Interrupt Output.
100
RESET#
I
Reset Pin. Active LOW. 5V Tolerant.
34
DSCL0
I
DDCI2C Clock for Port 0. 5V Tolerant.
33
DSDA0
I/O
DDCI2C Data for Port 0. 5V Tolerant.
29
DSCL1
I
DDCI2C Clock for Port 1. 5V Tolerant.
28
DSDA1
I/O
DDCI2C Data for Port 1. 5V Tolerant.
27
CSCL
I
Configuration/Status I2C Clock. 5V Tolerant.
26
CSDA
I/O
Configuration/Status I2C Data. 5V Tolerant.
105
CI2CA
I
Local I2C Address Select. 5V Tolerant.
101
SCDT
O
Indicates active video at HDMI input port.
35
R0PWR5V
I
Port 0 Transmitter Detect. 5V Tolerant.
30
R1PWR5V
I
Port 1 Transmitter Detect. 5V Tolerant.
98,77,76,55,82,83,84
RSVDNC
 -
Reserved, must be left unconnected.
99
RSVDL
I
Reserved, must be tied to ground.
Differential Signal Data Pins.
40
R0XC+
I
TMDS input clock pair. HDMI Port 0.
39
R0XC-
I
44
R0X0+
I
TMDS input data pair.   HDMI Port 0.
43
R0X0-
I
48
R0X1+
I
TMDS input data pair.   HDMI Port 0.
47
R0X1-
I
52
R0X2+
I
TMDS input data pair.   HDMI Port 0.
51
R0X2-
I
58
R1XC+
I
TMDS input clock pair. HDMI Port 1.
57
R1XC-
I
62
R1X0+
I
TMDS input data pair.   HDMI Port 1.
61
R1X0-
I
66
R1X1+
I
TMDS input data pair.   HDMI Port 1.
65
R1X1-
I
70
R1X2+
I
TMDS input data pair.   HDMI Port 1.
69
R1X2-
I
Power and Ground Pins.
12, 24, 25, 80, 91, 107, 119, 131, 143
CVCC18
---
Digital Logic VCC. 1.8V
11, 23, 79, 90, 106, 118, 130, 142
CGND
---
Digital Logic ground.
6, 18, 32, 74, 88, 104, 113, 125, 137
IOVCC33
---
Input/Output Pin Supply. 3.3V
4, 17, 31, 73, 87, 103, 112, 124, 136
IOGND
---
Input/Output Pin ground.
38, 42, 46, 50, 56, 60, 64, 68
AVCC33
---
TMDS Analog VCC. 3.3V
36, 41, 45, 49, 53, 59, 63, 67, 71 
AGND
---
TMDS Analog ground.
37,54,72
AVCC18
---
TMDS Analog VCC 1.8V.
92
DVCC18
---
Audio clock regeneration PLL analog VCC. 1.8V
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  • Here you can View online or download the Service Manual for the Sharp LC-65XS1E (serv.man5) in PDF for free, which will help you to disassemble, recover, fix and repair Sharp LC-65XS1E (serv.man5) LCD. Information contained in Sharp LC-65XS1E (serv.man5) Service Manual (repair manual) includes:
  • Disassembly, troubleshooting, maintenance, adjustment, installation and setup instructions.
  • Schematics, Circuit, Wiring and Block diagrams.
  • Printed wiring boards (PWB) and printed circuit boards (PCB).
  • Exploded View and Parts List.