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Model
LC-37P55E (serv.man12)
Pages
24
Size
390.68 KB
Type
PDF
Document
Service Manual
Brand
Device
TV / LCD / MAJOR ICs INFORMATION
File
lc-37p55e-sm12.pdf
Date
PREV: Sharp LC-37P55E (serv.man11) Service Manual

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65
 LC-26GA5E
 LC-32GA5E
  LC-26P55E
  LC-32P55E
  LC-37P55E
2.4.2.  Pinning (Continued)
2003 Oct 02
9
Philips Semiconductors
Product specification
I
2
C-bus controlled single and multistandard
alignment-free IF-PLL demodulators
TDA9885; TDA9886
handbook, halfpage
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
TDA9885T
TDA9886T
MHC109
VIF1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
SIF2
SIF1
OP2
AFC
VP
VPLL
AGND
CVBS
VAGC
(1)
REF
TAGC
n.c.
Fig.2  Pin configuration for SO24.
(1) Not connected for TDA9885T.
handbook, halfpage
TDA9885TS
TDA9886TS
MHC110
VIF1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
SIF2
SIF1
OP2
AFC
VP
VPLL
AGND
CVBS
VAGC
(1)
REF
TAGC
n.c.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Fig.3  Pin configuration for SSOP24.
(1) Not connected for TDA9885TS.
handbook, halfpage
MHC111
TDA9885HN
TDA9886HN
OP2
FMPLL
OP1
AFC
DEEM
VP
AFD
VPLL
DGND
AGND
n.c.
n.c.
AUD
CVBS
TOP
VAGC
(1)
n.c.
VIF2
VIF1
n.c.
n.c.
SIF2
SIF1
n.c.
SDA
SCL
SIOMAD
n.c.
n.c.
n.c.
TAGC
REF
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
32
31
30
29
28
27
26
25
9
10
11
12
13
14
15
16
terminal 1
index area
Fig.4  Pin configuration for HVQFN32.
Bottom view.
(1) Not connected for TDA9885HN.
65
 LC-26GA5E
 LC-32GA5E
  LC-26P55E
  LC-32P55E
  LC-37P55E
2.4.2.  Pinning (Continued)
2003 Oct 02
9
Philips Semiconductors
Product specification
I
2
C-bus controlled single and multistandard
alignment-free IF-PLL demodulators
TDA9885; TDA9886
handbook, halfpage
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
TDA9885T
TDA9886T
MHC109
VIF1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
SIF2
SIF1
OP2
AFC
VP
VPLL
AGND
CVBS
VAGC
(1)
REF
TAGC
n.c.
Fig.2  Pin configuration for SO24.
(1) Not connected for TDA9885T.
handbook, halfpage
TDA9885TS
TDA9886TS
MHC110
VIF1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
SIF2
SIF1
OP2
AFC
VP
VPLL
AGND
CVBS
VAGC
(1)
REF
TAGC
n.c.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Fig.3  Pin configuration for SSOP24.
(1) Not connected for TDA9885TS.
handbook, halfpage
MHC111
TDA9885HN
TDA9886HN
OP2
FMPLL
OP1
AFC
DEEM
VP
AFD
VPLL
DGND
AGND
n.c.
n.c.
AUD
CVBS
TOP
VAGC
(1)
n.c.
VIF2
VIF1
n.c.
n.c.
SIF2
SIF1
n.c.
SDA
SCL
SIOMAD
n.c.
n.c.
n.c.
TAGC
REF
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
32
31
30
29
28
27
26
25
9
10
11
12
13
14
15
16
terminal 1
index area
Fig.4  Pin configuration for HVQFN32.
Bottom view.
(1) Not connected for TDA9885HN.
65
 LC-26GA5E
 LC-32GA5E
  LC-26P55E
  LC-32P55E
  LC-37P55E
2.4.2.  Pinning (Continued)
2003 Oct 02
9
Philips Semiconductors
Product specification
I
2
C-bus controlled single and multistandard
alignment-free IF-PLL demodulators
TDA9885; TDA9886
handbook, halfpage
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
TDA9885T
TDA9886T
MHC109
VIF1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
SIF2
SIF1
OP2
AFC
VP
VPLL
AGND
CVBS
VAGC
(1)
REF
TAGC
n.c.
Fig.2  Pin configuration for SO24.
(1) Not connected for TDA9885T.
handbook, halfpage
TDA9885TS
TDA9886TS
MHC110
VIF1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
SIF2
SIF1
OP2
AFC
VP
VPLL
AGND
CVBS
VAGC
(1)
REF
TAGC
n.c.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Fig.3  Pin configuration for SSOP24.
(1) Not connected for TDA9885TS.
handbook, halfpage
MHC111
TDA9885HN
TDA9886HN
OP2
FMPLL
OP1
AFC
DEEM
VP
AFD
VPLL
DGND
AGND
n.c.
n.c.
AUD
CVBS
TOP
VAGC
(1)
n.c.
VIF2
VIF1
n.c.
n.c.
SIF2
SIF1
n.c.
SDA
SCL
SIOMAD
n.c.
n.c.
n.c.
TAGC
REF
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
32
31
30
29
28
27
26
25
9
10
11
12
13
14
15
16
terminal 1
index area
Fig.4  Pin configuration for HVQFN32.
Bottom view.
(1) Not connected for TDA9885HN.
65
 LC-26GA5E
 LC-32GA5E
  LC-26P55E
  LC-32P55E
  LC-37P55E
2.4.2.  Pinning (Continued)
2003 Oct 02
9
Philips Semiconductors
Product specification
I
2
C-bus controlled single and multistandard
alignment-free IF-PLL demodulators
TDA9885; TDA9886
handbook, halfpage
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
TDA9885T
TDA9886T
MHC109
VIF1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
SIF2
SIF1
OP2
AFC
VP
VPLL
AGND
CVBS
VAGC
(1)
REF
TAGC
n.c.
Fig.2  Pin configuration for SO24.
(1) Not connected for TDA9885T.
handbook, halfpage
TDA9885TS
TDA9886TS
MHC110
VIF1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
SIF2
SIF1
OP2
AFC
VP
VPLL
AGND
CVBS
VAGC
(1)
REF
TAGC
n.c.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Fig.3  Pin configuration for SSOP24.
(1) Not connected for TDA9885TS.
handbook, halfpage
MHC111
TDA9885HN
TDA9886HN
OP2
FMPLL
OP1
AFC
DEEM
VP
AFD
VPLL
DGND
AGND
n.c.
n.c.
AUD
CVBS
TOP
VAGC
(1)
n.c.
VIF2
VIF1
n.c.
n.c.
SIF2
SIF1
n.c.
SDA
SCL
SIOMAD
n.c.
n.c.
n.c.
TAGC
REF
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
32
31
30
29
28
27
26
25
9
10
11
12
13
14
15
16
terminal 1
index area
Fig.4  Pin configuration for HVQFN32.
Bottom view.
(1) Not connected for TDA9885HN.
Page of 24
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