Sharp LC-37GA8EK (serv.man2) Service Manual ▷ View online
56
LC-26GA5E
LC-32GA5E
LC-32GA8/LC-32BV8
LC-37GA8/LC-37BV8
2.2.1. Pin Connections and Short Description
(Continued)
ADVANCE INFORMATION
VCT 69xyP
Volume 1: General Description
Micronas
November 3, 2004; 6251-644-1-1
AI
1-61
VCTP Pin No.
Pin Name
Type
Connection
Short Description
PLQFP
208-1
(If not used)
141
DGO1_4
DGO1_0
LVDSA_0N
OUT
LV
Channel 1 Digital 4 Green Output
1)
Channel 1 Digital 0 Green Output
1)
(LSB)
LVDS Channel 1 bit 0 Negative Output
2)
142
DGO1_5
DGO1_1
VSUP1.8LVDS
OUT
SUPPLY
LV
OBL
Channel 1 Digital 5 Green Output
1)
Channel 1 Digital 1 Green Output
1)
Supply Analog Voltage LVDS
2)
, 1.8 V
143
DGO1_6
DGO1_2
REXT
OUT
ANA
LV
OBL
Channel 1 Digital 6 Green Output
1)
Channel 1 Digital 2 Green Output
1)
LVDS External Resistor
2)
144
DGO1_7
DGO1_3
GND1.8LVDS
OUT
SUPPLY
LV
OBL
Channel 1 Digital 7 Green Output
1)
Channel 1 Digital 3 Green Output
1)
Ground Analog LVDS
2)
, 1.8 V
145
DGO1_8
DGO1_4
LVDSB_3P
OUT
LV
Channel 1 Digital 8 Green Output
1)
Channel 1 Digital 4 Green Output
1)
Dual-LVDS Channel 2 bit 3 Positive Output
2)
146
DGO1_9
DGO1_5
LVDSB_3N
OUT
LV
Channel 1 Digital 9 Green Output
1)
(MSB)
Channel 1 Digital 5 Green Output
1)
Dual-LVDS Channel 2 bit 3 Negative Output
2)
147
DRO1_0
DGO1_6
GND3.3LVDS
OUT
SUPPLY
LV
OBL
Channel 1 Digital 0 Red Output
1)
(LSB)
Channel 1 Digital 6 Green Output
1)
Ground Digital LVDS
2)
, 3.3 V
148
DRO1_1
DGO1_7
LVDSBCLKP
OUT
LV
Channel 1 Digital 1 Red Output
1)
Channel 1 Digital 7 Green Output
1)
(MSB)
Dual-LVDS Channel 2 Clock Positive Output
2)
149
GND3.3IO2
LVDSBCLKN
SUPPLY
OUT
OBL
LV
Ground Digital Output
1)
Port 2
Dual-LVDS Channel 2 Clock
Negative
Output
2)
150
VSUP3.3IO2
VSUP3.3LVDS
SUPPLY
OBL
Supply Voltage Output
1)
Port 2, 3.3 V
Supply Digital Voltage LVDS
2)
, 3.3 V
151
DRO1_2
DRO1_0
LVDSB_2P
OUT
LV
Channel 1 Digital 2 Red Output
1)
Channel 1 Digital 0 Red Output
1)
(LSB)
Dual-LVDS Channel 2 bit 2 Positive Output
2)
152
DRO1_3
DRO1_1
LVDSB_2N
OUT
LV
Channel 1 Digital 3 Red Output
1)
Channel 1 Digital 1 Red Output
1)
Dual-LVDS Channel 2 bit 2 Negative Output
2)
153
DRO1_4
DRO1_2
GND3.3LVDS
OUT
SUPPLY
LV
OBL
Channel 1 Digital 4 Red Output
1)
Channel 1 Digital 2 Red Output
1)
Ground Digital LVDS
2)
, 3.3 V
154
DRO1_5
DRO1_3
LVDSB_1P
OUT
LV
Channel 1 Digital 5 Red Output
1)
Channel 1 Digital 3 Red Output
1)
Dual-LVDS Channel 2 bit 1 Positive Output
2)
155
DRO1_6
DRO1_4
LVDSB_1N
OUT
LV
Channel 1 Digital 6 Red Output
1)
Channel 1 Digital 4 Red Output
1)
Dual-LVDS Channel 2 bit 1 Negative Output
2)
57
LC-26GA5E
LC-32GA5E
LC-32GA8/LC-32BV8
LC-37GA8/LC-37BV8
2.2.1. Pin Connections and Short Description
(Continued)
VCT 69xyP
ADVANCE INFORMATION
Volume 1: General Description
1-62
November 3, 2004; 6251-644-1-1
AI
Micronas
VCTP Pin No.
Pin Name
Type
Connection
Short Description
PLQFP
208-1
(If not used)
156
DRO1_7
DRO1_5
VSUP3.3LVDS
OUT
SUPPLY
LV
OBL
Channel 1 Digital 7 Red Output
1)
Channel 1 Digital 5 Red Output
1)
Supply Digital Voltage LVDS
2)
, 3.3 V
157
DRO1_8
DRO1_6
LVDSB_0P
OUT
LV
Channel 1 Digital 8 Red Output
1)
Channel 1 Digital 6 Red Output
1)
Dual-LVDS Channel 2 bit 0 Positive Output
2)
158
DRO1_9
DRO1_7
LVDSB_0N
OUT
LV
Channel 1 Digital 9 Red Output
1)
(MSB)
Channel 1 Digital 7 Red Output
1)
(MSB)
Dual-LVDS Channel 2 bit 0 Negative Output
2)
159
P1_7
TDO
IN/OUT
OBL
Port 1, Bit 7 Input/Output
JTAG Interface Data Output
160
P1_6
TCLK
IN/OUT
OBL
Port 1, Bit 6 Input/Output
JTAG Interface Clock Input
161
P1_5
IN/OUT
LV
Port 1, Bit 5 Input/Output
162
P1_4
IN/OUT
LV
Port 1, Bit 4 Input/Output
163
GND3.3DAC
SUPPLY
OBL
Ground DAC
164
VSUP3.3DAC
SUPPLY
OBL
Supply Voltage DAC, 3.3V
165
P1_3
ROUT
IN/OUT
LV
Port 1, Bit 3 Input/Output
Analog Red Output
166
P1_2
GOUT
IN/OUT
LV
Port 1, Bit 2 Input/Output
Analog Green Output
167
P1_1
BOUT
IN/OUT
LV
Port 1, Bit 1 Input/Output
Analog Blue Output
168
P1_0
SVMOUT
IN/OUT
LV
Port 1, Bit 0 Input/Output
Scan Velocity Modulation Output
169
VSUP1.8FE
SUPPLY
OBL
Supply Voltage Analog Video Frontend, 1.8 V
170
VSUP3.3FE
SUPPLY
OBL
Supply Voltage Analog Video Frontend, 3.3 V
171
VIN22
DHS
IN
GND
Analog Video 22 H-Sync Input
Digital Video H-Sync Input
172
VIN21
IN
GND
Analog Video 21 B HD Input
173
VIN20
IN
GND
Analog Video 20 G HD Input
174
VIN19
IN
GND
Analog Video 19 R HD Input
175
VIN18
IN
GND
Analog Video 18 Fast Blank 2 Input
176
VIN17
IN
GND
Analog Video 17 B HD Input
177
VIN16
IN
GND
Analog Video 16 G HD Input
178
VIN15
IN
GND
Analog Video 15 R HD Input
179
VIN13
IN
GND
Analog Video 13 B HD Input
58
LC-26GA5E
LC-32GA5E
LC-32GA8/LC-32BV8
LC-37GA8/LC-37BV8
2.2.1. Pin Connections and Short Description
(Continued)
ADVANCE INFORMATION
VCT 69xyP
Volume 1: General Description
Micronas
November 3, 2004; 6251-644-1-1
AI
1-63
VCTP Pin No.
Pin Name
Type
Connection
Short Description
PLQFP
208-1
(If not used)
180
VIN12
IN
GND
Analog Video 12 G HD Input
181
VIN11
IN
GND
Analog Video 11 R HD Input
182
VIN9
IN
GND
Analog Video 9 Y or B SD Input
183
VIN8
IN
GND
Analog Video 8 C or Fast Blank 1 Input
184
VIN7
IN
GND
Analog Video 7 Y or G SD Input
185
VSUP1.8FE
SUPPLY
OBL
Supply Voltage Analog Video Frontend, 1.8 V
186
GNDA
SUPPLY
OBL
Analog Video Frontend, Platform Ground
187
VIN6
IN
GND
Analog Video 6 C or R SD Input
188
VIN5
IN
GND
Analog Video 5 Y/CVBS Input
189
VIN3
IN
GND
Analog Video 3 CVBS Input
190
VIN2
IN
GND
Analog Video 2 CVBS Input
191
VIN1
IN
GND
Analog Video 1 CVBS Input
192
VSUP3.3VO
SUPPLY
OBL
Supply Voltage Analog Video Output, 3.3 V
193
VOUT3
OUT
LV
Analog cvbs Video 3 Output
194
VOUT2
OUT
OBL
Analog cvbs Video 2 Output
195
VOUT1
OUT
OBL
Analog cvbs Video 1 Output
196
GND3.3IO3
SUPPLY
OBL
Ground Digital Input/Output Port 1
197
VSUP3.3IO3
SUPPLY
OBL
Supply Voltage Input/Output Port 1, 3.3 V
198
656I0
P3_0
IN/OUT
LV
Digital 656 Bit 0 Input (LSB)
Port 3, Bit 0 Input/Output
199
656I1
P3_1
IN/OUT
LV
Digital 656 Bit 1 Input
Port 3, Bit 1 Input/Output
200
656I2
P3_2
IN/OUT
LV
Digital 656 Bit 2 Input
Port 3, Bit 2 Input/Output
201
656I3
P3_3
IN/OUT
LV
Digital 656 Bit 3 Input
Port 3, Bit 3 Input/Output
202
656I4
P3_4
IN/OUT
LV
Digital 656 Bit 4 Input
Port 3, Bit 4 Input/Output
203
656I5
P3_5
IN/OUT
LV
Digital 656 Bit 5 Input
Port 3, Bit 5 Input/Output
204
656I6
P3_6
IN/OUT
LV
Digital 656 Bit 6 Input
Port 3, Bit 6 Input/Output
205
656I7
P3_7
IN/OUT
LV
Digital 656 Bit 7 Input
Port 3, Bit 7 Input/Output
206
656CLKI
IN/OUT
GND
Digital 656 Clock Input
59
LC-26GA5E
LC-32GA5E
LC-32GA8/LC-32BV8
LC-37GA8/LC-37BV8
VCT 69xyP
ADVANCE INFORMATION
Volume 1: General Description
1-64
November 3, 2004; 6251-644-1-1
AI
Micronas
207
656CLKO
OUT
LV
Digital 656 Clock Output
208
656O7
P4_7
TCLKFW
IN/OUT
LV
Digital 656 Bit 7 Output
Port 4, Bit 7 Input/Output
JTAG Interface Clock Input (firmw. Controler)
1)
only in RGB output version
2)
only in LVDS output version
VCTP Pin No.
Pin Name
Type
Connection
Short Description
PLQFP
208-1
(If not used)
2.2.1. Pin Connections and Short Description
(Continued)
VCT 69xyP
ADVANCE INFORMATION
Volume 1: General Description
1-68
November 3, 2004; 6251-644-1-1
AI
Micronas
Table 3–10: Maximum Number of Ports
Display
CRT
FPD
Application
Analog RGB + SVMOUT + H + V
TTL (Single RGB),
LVDS (Dual or Single)
TTL (Dual RGB)
Panel
control
X
X
X
X
X
X
X
X
X
X
X
X
656IN
X
X
X
X
X
X
X
X
X
X
X
X
656OUT
X
X
X
X
X
X
X
X
X
X
OSD444
X
X
X
X
X
X
X
X
OSD222
X
X
X
X
Port 1
4
4
4
4
4
4
4
4
8
8
8
8
8
8
8
8
8
8
8
8
Port 2
8
8
8
8
8
8
8
8
6
6
6
6
6
6
6
6
6
6
6
6
Port 3
6
8
8
6
8
8
6
6
8
6
8
8
8
8
Port 4
2
2
2
2
8
8
8
8
8
8
8
8
8
8
Max Number
of Ports
14
20
22
22
20
26
28
28
14
20
20
22
22
28
30
30
14
22
22
30
Note: 24bit RGB input is always available
Maximum Number of Ports
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