Sharp LC-32SA1E (serv.man2) Service Manual ▷ View online
LC-26SA1E/RU, LC-32SA1E/RU
7 – 4
2.1.2 Pin Connections and short description
Pin No.
Pin Name
Type
Description
144
Q0
O
24-bit Output Pixel Data Bus.
143
Q1
O
24-bit Output Pixel Data Bus.
142
Q2
O
24-bit Output Pixel Data Bus.
141
Q3
O
24-bit Output Pixel Data Bus.
140
Q4
O
24-bit Output Pixel Data Bus.
137
Q5
O
24-bit Output Pixel Data Bus.
136
Q6
O
24-bit Output Pixel Data Bus.
133
Q7
O
24-bit Output Pixel Data Bus.
132
Q8
O
24-bit Output Pixel Data Bus.
131
Q9
O
24-bit Output Pixel Data Bus.
130
Q10
O
24-bit Output Pixel Data Bus.
129
Q11
O
24-bit Output Pixel Data Bus.
126
Q12
O
24-bit Output Pixel Data Bus.
125
Q13
O
24-bit Output Pixel Data Bus.
124
Q14
O
24-bit Output Pixel Data Bus.
123
Q15
O
24-bit Output Pixel Data Bus.
119
Q16
O
24-bit Output Pixel Data Bus.
118
Q17
O
24-bit Output Pixel Data Bus.
117
Q18
O
24-bit Output Pixel Data Bus.
116
Q19
O
24-bit Output Pixel Data Bus.
113
Q20
O
24-bit Output Pixel Data Bus.
112
Q21
O
24-bit Output Pixel Data Bus.
111
Q22
O
24-bit Output Pixel Data Bus.
110
Q23
O
24-bit Output Pixel Data Bus.
1
DE
O
Data enable.
2
HSYNC
O
Horizontal Sync Output control signal.
3
VSYNC
O
Vertical Sync Output control signal.
121
ODCK
O
Output Data Clock.
97
XTALIN
I
Crystal Clock Input.
96
XTALOUT
O
Crystal Clock Output.
88
MCLKOUT
O
Audio Master Clock Output.
87
MCLKIN
I
Audio Master Clock Input Reference.
86
SCK
O
I2S Serial Clock Output.
85
WS
O
I2S Word Select Output.
84
SDO
O
I2S Serial Data Output.
78
SPDIF
O
S/PDIF Audio Output.
77
MUTEOUT
O
Mute Audio Output.
104
INT
O
Interrupt Output.
102
RESET#
I
Reset Pin.Active LOW.
32
DSCLO
I
DDC I2C Clock for Port 0.
31
DSDAO
Bi-Di
DDC I2C Data for Port 0.
30
DSCL1
I
DDC I2C Clock for Port 1.
29
DSDA1
Bi-Di
DDC I2C Data for Port 1.
28
CSCL
I
Configuration I2C Clock.
27
CSDA
Bi-Di
Configuration I2C Data.
103
SCDT
O
Indicates active video at HDMI input port.
107
CLK48B
Bi-Di
Data Bus Latch Enable.
34
R0PWR5V
I
Port 0 Transmitter Detect.
33
R1PWR5V
I
Port 1 Transmitter Detect.
101
RSVDL
I
Reserved, must be tied LOW.
56
RSVD_A
Reserved Pin, leave unconnected.
93100
NC
–
No connect.
9
VREF
–
81,82,83
RSVD
O
14
AnRPr
O
Analog Video Red, Pr Output.
17
AnGY
O
Analog Video Green, Y Output.
20
AnBPb
O
Analog Video Blue, Pb Output.
11
COMP
–
Compensation. Provides compensation for the DAC's internal reference amplifier.
This pin should be connected through capacitors to DACVCC externally.
These capacitors must be close to the pin as possible to avoid any noise pick-up.
This pin should be connected through capacitors to DACVCC externally.
These capacitors must be close to the pin as possible to avoid any noise pick-up.
10
RSET
–
Full Scale Adjust Resistor. A precision(1%)resistor connected between this pin and DACGND controls
the magnitude of the full scale video signal/RESET may need to be ajusted for optimum gain.
This resistor must be as close to the pin as possible to avoid any noise pick-up.
the magnitude of the full scale video signal/RESET may need to be ajusted for optimum gain.
This resistor must be as close to the pin as possible to avoid any noise pick-up.
LC-26SA1E/RU, LC-32SA1E/RU
7 – 5
40
R0XC+
I
TMDS input clock pair. HDMI Port 0
39
R0XC-
I
TMDS input clock pair. HDMI Port 0
44
R0X0+
I
TMDS input data pair. HDMI Port 0
43
R0X0-
I
TMDS input data pair. HDMI Port 0
48
R0X1+
I
TMDS input data pair. HDMI Port 0
47
R0X1-
I
TMDS input data pair. HDMI Port 0
52
R0X2+
I
TMDS input data pair. HDMI Port 0
51
R0X2-
I
TMDS input data pair. HDMI Port 0
59
R1XC+
I
TMDS input clock pair. HDMI Port 1
58
R1XC-
I
TMDS input clock pair. HDMI Port 1
63
R1X0+
I
TMDS input data pair. HDMI Port 1
62
R1X0-
I
TMDS input data pair. HDMI Port 1
67
R1X1+
I
TMDS input data pair. HDMI Port 1
66
R1X1-
I
TMDS input data pair. HDMI Port 1
71
R1X2+
I
TMDS input data pair. HDMI Port 1
70
R1X2-
I
TMDS input data pair. HDMI Port 1
23,79,92,
105,114,
128,139
105,114,
128,139
CVCC18
–
Digital Logic VCC.
24,80,91,
106,115,
127,138
106,115,
127,138
CGND
–
Digital Logic GND.
5,26,76,89,
109,122,
134
109,122,
134
IOVCC
–
Input/Output Pin VCC.
4,25,75,
90,108,
120,135
90,108,
120,135
IOGND
–
Input/Output Pin GND.
38,42,46,
50,57,61,
65,69
50,57,61,
65,69
AVCC
–
TMDS Analog VCC.
41,45,49,
53,60,64,
68,72
53,60,64,
68,72
AGND
–
TMDS Analog GND.
37
PVCC0
–
TMDS Port 0 PLL VCC.
55
PVCC1
–
TMDS Port 1 PLL VCC.
54
TMDSPGND
–
TMDS PLL GND.
13
DACVCCR
–
DAC Red VDD.
12
DACGNDR
–
DAC Red GND.
16
DACVCCG
–
DAC Green VDD.
15
DACGNDG
–
DAC Green GND.
19
DACVCCB
–
DAC Blue VDD.
18
DACGNDB
–
DAC Blue GND.
6
DACOVCC
–
DAC Output VCC.
7
DACAVCC
–
DAC Analog VCC.
8
DACAGND
–
DAC Analog GND.
22
DACVCC18
–
DAC Digital VCC.
21
DACGND
–
DAC Digital GND.
94
AUDPVCC18
–
ACR PLL VCC.
95
AUDPGND
–
ACR PLL GND.
35,74
DVCC18
–
ACR PLL Digital VCC.
36,73
DGND
–
ACR PLL GND.
98
XTALVCC
–
ACR PLL Crystal Input VCC.
99
REGVCC
–
ACR PLL Regulator VCC.
Pin No.
Pin Name
Type
Description
LC-26SA1E/RU, LC-32SA1E/RU
7 – 6
2.2. IC2701 (VHITVHC153T-1Y)
2.2.1 Block Diagram
2.2.2 Pin Connections and short description
Pin No.
Pin Name
I/O
Pin Function
1
1G
I
Strobe input 1G.
2
B
I
Address input B.
3
1C3
I
Channel input 1C3.
4
1C2
I
Channel input 1C2.
5
1C1
I
Channel input 1C1.
6
1C0
I
Channel input 1C0.
7
1Y
O
Output signal 1Y.
8
GND
–
Ground.
9
2Y
O
Output signal 2Y.
10
2C0
I
Channel input 2C0.
11
2C1
I
Channel input 2C1.
12
2C2
I
Channel input 2C2.
13
2C3
I
Channel input 2C3.
14
A
I
Address input A.
15
2G
I
Strobe input 2G
16
VCC
–
Power Source.
LC-26SA1E/RU, LC-32SA1E/RU
7 – 7
2.3. IC3002 (RH-IXB624WJN1Q)
2.3.1 Block Diagram
2.3.2 Pin Connections and short description
Pin No.
Pin Name
I/O
Pin Function
Sheet Name
1
656O6
O
Digital 656 Bit 6 Output
FRCI [6]
2
656O5
O
Digital 656 Bit 5 Output
FRCI [5]
3
656O4
O
Digital 656 Bit 4 Output
FRCI [4]
4
656O3
O
Digital 656 Bit 3 Output
FRCI [3]
5
656O2
O
Digital 656 Bit 2 Output
FRCI [2]
6
656O1
O
Digital 656 Bit 1 Output
FRCI [1]
7
656O0
O
Digital 656 Bit 0 Output (LSB)
FRCI [0]
8
RESETQ
I/O
Reset Input/Output
RESET-N
9
AIN1R
I
Analog Audio 1 Input, Right
AUDIO2_R
10
AIN1L
I
Analog Audio 1 Input, Left
AUDIO2_L
11
AIN2R
I
Analog Audio 2 Input, Right
EXT2 A_IN_R
12
AIN2L
I
Analog Audio 2 Input, Left
EXT2_A_IN_L
13
AIN3R
I
Analog Audio 3 Input, Right
EXT1 A_IN_R
14
AIN3L
I
Analog Audio 3 Input, Left
EXT1 A_IN_L
15
AIN4R
I
Analog Audio 4 Input, Right
EXT3 A_IN_R
16
AIN4L
I
Analog Audio 4 Input, Left
EXT3 A_IN_L
17
VREFAU
–
Reference Voltage, Audio
–
18
VSUP8.0AU
–
Supply Voltage Analog Audio, 8.0 V
S8V
19
GNDA
–
Ground Analog Audio, Platform Ground
GND
20
SGND
–
Analog Signal GND
GND
21
AOUT2R
O
Analog Audio 2 Output, Right
OUT2_R
22
AOUT2L
O
Analog Audio 2 Output, Left
OUT2_L
23
AOUT1R
O
Analog Audio 1 Output, Right
OUT1_R
24
AOUT1L
O
Analog Audio 1 Output, Left
OUT1_L
25
HEADPHONER
O
Analog Headphone Output, Right
open
26
HEADPHONEL
O
Analog Headphone Output, Left
open
27
SPEAKERR
O
Analog Loudspeaker Output, Right
SPK_OUT_R
28
SPEAKERL
O
Analog Loudspeaker Output, Left
SOK_OUT_L
29
SUBWOOFER
I/O
Analog SUBWOOFER Output
SBW_TEST
30
VREFSIF
ANA
Reference Voltage, Audio SIF
–
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