Sharp LC-32GA9EK (serv.man9) Service Manual ▷ View online
64
LC-26GA5E
LC-32GA5E
LC-32GA9E/LC-32BV9E
LC-37GA9E/LC-37BV9E
2.4. IC201 (VHITDA9886+-1Y)
2.4.1. Block Diagram
2003 Oct 02
7
Philips Semiconductors
Product specification
I
2
C-bus controlled single and multistandard
alignment-free IF-PLL demodulators
TDA9885; TDA9886
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6
BLOCK DIAGRAM
handbook, full pagewidth
MHC108
DIGITAL VCO CONTROL
AFC DETECTOR
RC VCO
VIF-PLL
VIF-AGC
TUNER AGC
SUPPLY
SIF-AGC
AUDIO PROCESSING
AND SWITCHES
NARROW-BAND
FM-PLL DEMODULATOR
SINGLE REFERENCE QSS MIXER
INTERCARRIER MIXER
AND AM DEMODULATOR
SOUND CARRIER
TRAPS
4.5 to 6.5 MHz
TAGC
C
VAGC(pos)
C
AGC(neg)
C
BL
VAGC
(1)
TOP
14 (15)
VPLL
19 (21)
9 (8)
16 (17)
15 (16)
21 (23)
4 (2)
10 (9)
11 (10)
12 (11)
18 (20)
20 (22)
2 (31)
1 (30)
(18) 17
(7) 8
(3) 5
(4) 6
external reference signal
or 4 MHz crystal
REF
AFC
AUD
CVBS
audio output
video output
: 2 V (p-p)
[1.1 V (p-p) without trap]
C
AF
SIOMAD
SDA
SCL
MAD
V
P
C
AGC
(6, 12, 13, 14, 17,
19, 25, 28, 29, 32)
13
n.c.
AGND
7 (5)
DGND
OUTPUT
PORTS
I
2
C-BUS TRANSCEIVER
22 (24)
3 (1)
OP1
OP2
FMPLL
DEEM
AFD
sound intercarrier output
and MAD select
FM-PLL
filter
VIF-PLL
filter
de-emphasis
network
VIF2
VIF1
24 (27)
23 (26)
SIF2
SIF1
TDA9885
TDA9886
Fig.1 Block diagram.
(1)
Not connected for TDA9885.
Pin numbers for TDA9885HN and TDA9886HN in parenthesis.
65
LC-26GA5E
LC-32GA5E
LC-32GA9E/LC-32BV9E
LC-37GA9E/LC-37BV9E
2003 Oct 02
8
Philips Semiconductors
Product specification
I
2
C-bus controlled single and multistandard
alignment-free IF-PLL demodulators
TDA9885; TDA9886
7
PINNING
SYMBOL
PIN
DESCRIPTION
TDA9885T
TDA9885TS
TDA9886T
TDA9886TS
TDA9885HN TDA9886HN
VIF1
1
1
30
30
VIF differential input 1
VIF2
2
2
31
31
VIF differential input 2
n.c.
−
−
32
32
not connected
OP1
3
3
1
1
output port 1; open-collector
FMPLL
4
4
2
2
FM-PLL for loop filter
DEEM
5
5
3
3
de-emphasis output for capacitor
AFD
6
6
4
4
AF decoupling input for capacitor
DGND
7
7
5
5
digital ground
n.c.
−
−
6
6
not connected
AUD
8
8
7
7
audio output
TOP
9
9
8
8
tuner AGC TakeOver Point (TOP) for resistor
adjustment
adjustment
SDA
10
10
9
9
I
2
C-bus data input and output
SCL
11
11
10
10
I
2
C-bus clock input
SIOMAD
12
12
11
11
sound intercarrier output and MAD select with
resistor
resistor
n.c.
−
−
12
12
not connected
n.c.
13
13
13
13
not connected
n.c.
−
−
14
14
not connected
TAGC
14
14
15
15
tuner AGC output
REF
15
15
16
16
4 MHz crystal or reference signal input
VAGC
−
16
−
17
VIF-AGC for capacitor
n.c.
16
−
17
−
not connected
CVBS
17
17
18
18
composite video output
n.c.
−
−
19
19
not connected
AGND
18
18
20
20
analog ground
VPLL
19
19
21
21
VIF-PLL for loop filter
V
P
20
20
22
22
supply voltage
AFC
21
21
23
23
AFC output
OP2
22
22
24
24
output port 2; open-collector
n.c.
−
−
25
25
not connected
SIF1
23
23
26
26
SIF differential input 1 and MAD select with
resistor
resistor
SIF2
24
24
27
27
SIF differential input 2 and MAD select with
resistor
resistor
n.c.
−
−
28
28
not connected
n.c.
−
−
29
29
not connected
2.4.2. Pinning
66
LC-26GA5E
LC-32GA5E
LC-32GA9E/LC-32BV9E
LC-37GA9E/LC-37BV9E
2.4.2. Pinning (Continued)
2003 Oct 02
9
Philips Semiconductors
Product specification
I
2
C-bus controlled single and multistandard
alignment-free IF-PLL demodulators
TDA9885; TDA9886
handbook, halfpage
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
TDA9885T
TDA9886T
TDA9886T
MHC109
VIF1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
SIF2
SIF1
OP2
AFC
VP
VPLL
AGND
CVBS
VAGC
(1)
REF
TAGC
n.c.
Fig.2 Pin configuration for SO24.
(1) Not connected for TDA9885T.
handbook, halfpage
TDA9885TS
TDA9886TS
TDA9886TS
MHC110
VIF1
VIF2
OP1
FMPLL
DEEM
AFD
DGND
AUD
TOP
SDA
SCL
SIOMAD
SIF2
SIF1
OP2
AFC
VP
VPLL
AGND
CVBS
VAGC
(1)
REF
TAGC
n.c.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Fig.3 Pin configuration for SSOP24.
(1) Not connected for TDA9885TS.
handbook, halfpage
MHC111
TDA9885HN
TDA9886HN
TDA9886HN
OP2
FMPLL
OP1
AFC
DEEM
VP
AFD
VPLL
DGND
AGND
n.c.
n.c.
AUD
CVBS
TOP
VAGC
(1)
n.c.
VIF2
VIF1
n.c.
n.c.
SIF2
SIF1
n.c.
SDA
SCL
SIOMAD
n.c.
n.c.
n.c.
TAGC
REF
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
32
31
30
29
28
27
26
25
9
10
11
12
13
14
15
16
terminal 1
index area
Fig.4 Pin configuration for HVQFN32.
Bottom view.
(1) Not connected for TDA9885HN.
(1) Not connected for TDA9885HN.
67
LC-26GA5E
LC-32GA5E
LC-32GA9E/LC-32BV9E
LC-37GA9E/LC-37BV9E
ADVANCE INFORMATION
FRC 94xxA
Micronas
June 4, 2004; 6251-603-3AI
13
Fig. 1–5: Detailed Block Diagram of FRC 94xxA (package PMQFP144-4)
Divider
ITU656/ITU601
Decoder
648 MHz
clock
Free-running Clocks
Global
Motion-,
Still-,
Stock-
Detection
648 MHz
DTO
Xtal
Oscillator
24
23
XOUT
XIN
Divider
Line-locked Clocks
LL-PLL
ISM
17
AVI
Input Processing
Clock Sync Generation
105
106
114
111
115
113
TDI
SCL SDA
Test-controller,
Memory bist
TCLK TMS
TDO
RESET
Chip Control
Control
67
68
73
76
78
81
82
83
97
91
94
8:8:8
ITU656
ITU601
ITU601
Encoder
AVOUT
AUOUT
AYOUT
Pixel-
mixer
mixer
YOUT7
YOUT6
YOUT5
YOUT4
YOUT3
YOUT2
YOUT1
YOUT0
52
53
55
57
58
59
UVOUT2
UVOUT3
UVOUT4/INTR
UVOUT5
UVOUT6
UVOUT7
Display Processing
Delay Adjust
88
ASVMOUT
126
127
128
129
137
138
139
140
UVIN0
UVIN1
UVIN2
UVIN3
UVIN4
UVIN5
UVIN6
UVIN7
142
3
4
6
7
11
12
13
656I0/
YIN0
656I1/
YIN1
656I2/
YIN2
656I3/
YIN3
656I4/
YIN4
656I5/
YIN5
656I6/
YIN6
656I7/
YIN7
5
CLKIN
14
10
HIN
VIN
HDTV
Bypass
eDRAM
Memory
Controller
data b
uff
er
data b
uff
er
4:2:2
Output
Sync
Controller
FRC 9419A
FRC 9428A
FRC 9429A
FRC 9428A
FRC 9429A
FAMOUS
Output Processing
HOUT
VOUT
CLKOUT
36
34
35
33
AVO/INTR
Filmmode
Detection
ISS
Noise
Reduction
Local Motion
Detection
8:4:4
8:8:8
8:8:8
MUX
DCE
Contrast
LSE
CTE
CTE
Brightness
Curtain
Generator
Pattern
Generator
Frame
Generator
I
2
C
Interface
C800
Controller
SVM DAC
Y DAC
U DAC
V DAC
GAIN
GAIN
GAIN
GAIN
NCE
Bit
Reduction
Matrix
Saturation
Tint
SVM
H-panorama
Generator
V-panorama
Generator
H-postscaler
V-postscaler
2D LSE
MEX
Motion
Tracking
Vector
Memory
Block
Line
Converter
Frame
Rate
Interpolation
Line
Block
Converter
Output
Data
Controller
to pin 33/78
117
118
119
120
121
122
123
124
125
656I02
62
YOUT8
YOUT9
84
60
UVOUT0
46
45
UVOUT1
UVOUT8
44
UVOUT9
30
31
32
40
41
42
43
RGBOUT0
29
28
27
RGBOUT1
RGBOUT2
RGBOUT3
RGBOUT4
RGBOUT5
RGBOUT6
RGBOUT7
RGBOUT8
RGBOUT9
61
CLKF20
116
INTR
656I12
656I22
656I32
656I42
656I52
656I62
656I72
CLKIN2
H-/V-
Prescaler
39
2.5 IC3301 (RH-IXB064WJN1Q)
2.5.1 FRC Block Diagram
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