DOWNLOAD Sharp LC-32FH500 (serv.man9) Service Manual ↓ Size: 550.66 KB | Pages: 10 in PDF or view online for FREE

Model
LC-32FH500 (serv.man9)
Pages
10
Size
550.66 KB
Type
PDF
Document
Service Manual
Brand
Device
TV / LCD / Major ICs Information
File
lc-32fh500-sm9.pdf
Date
PREV: Sharp LC-32FH500 (serv.man8) Service Manual

Sharp LC-32FH500 (serv.man9) Service Manual ▷ View online

37
2.3.  IC 1001 
(MSD3303GX)
2.3.3. Pin Description (continued)
2. Detailed ICs Information
, DUNTKF470WE (Main Unit)
 (continued)
Common Interface 
Pin Name 
Pin Type 
Function 
Pin 
PCMDATA[7:0]/ 
CI_DATA[7:0] 
I/O PCMCIA 
Data[7:0] / 
Common Interface Data[7:0] 
AE14, AD14, 
AC14, AB14, 
AA14, AB20, 
AC20, AD20 
PCMADR[14:0]/ 
CI_A[14:0] 
Output 
PCMCIA Address[14:0] / 
Common Interface Address[14:0] 
AB11, AE12, 
AD12, AC12, 
AB12, AA12, 
AE13, AD13, 
AC13, AB13, 
AA13, AE19, 
AD19, AC19, 
AB19 
PCMIOR/ 
CI_RD 
Output PCMCIA 
Input/Output Read / 
Common Interface Read 
AA8 
PCMIOW/ 
CI_WR 
Output 
PCMCIA Input/Output Write / 
Common Interface Write 
AB8 
PCMOEN 
Output 
PCMCIA Output Enable 
AC6 
PCMWEN 
Output 
PCMCIA Write Enable 
AC11 
PCMREG/ 
CI_CLK 
Output 
PCMCIA Register / 
Common Interface Clock 
AE20 
PCMCEN/ 
CI_CS 
Output 
PCMCIA Card Enable / 
Common Interface Chip Select 
AA10 
PCMIRQ/ 
CI_INT 
Input 
PCMCIA Interrupt Request / 
Common Interface Interrupt 
AB7 
PCMWAIT/ 
CI_WACK 
Input 
PCMCIA Extend Bus Wait Cycle / 
Common Interface Wait Acknowledge 
AB10 
CI_RST 
Output 
Common Interface Reset 
AC18 
CI_CD 
Input 
Common Interface Card Detect 
AA20 
TS Input Interface 
Pin Name 
Pin Type 
Function 
Pin 
TS0CLK Input 
w/ 
5V-tolerant TS 
Clock 
AA5 
TS0DATA[7:0] 
Input w/ 5V-tolerant 
TS Data in Parallel; LSB (bit 0) is for serial TS data 
AB4, AA4, 
Y4, W4, V4, 
U4, T4, R4 
TS0VALID Input 
w/ 
5V-tolerant 
TS Data Valid 
W5 
TS0SYNC 
Input w/ 5V-tolerant 
TS Sync-Byte Indicator 
Y5 
TS1CLK Input 
w/ 
5V-tolerant 
2
nd
 TS Clock 
U22 
TS1DATA Input 
w/ 
5V-tolerant 
2
nd
 TS Data in Parallel 
V22 
TS1VALID Input 
w/ 
5V-tolerant 
2
nd
 TS Data Valid 
Y22 
TS1SYNC Input 
w/ 
5V-tolerant 
2
nd
 TS Sync-Byte Indicator 
W22 
LC-32FH500 
LC-32FH510
38
2.3.  IC 1001 
(MSD3303GX)
2.3.3. Pin Description (continued)
2. Detailed ICs Information
, DUNTKF470WE (Main Unit)
 (continued)
DVI/HDMI Interface 
Pin Name 
Pin Type 
Function 
Pin 
RXACKN 
DVI/HDMI Input 
Negative DVI/HDMI Input for A Link Clock Channel 
F2 
RXACKP DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for A Link Clock Channel 
F1 
RXA0N 
DVI/HDMI Input 
Negative DVI/HDMI Input for A Link Data Channel 0 
G3 
RXA0P DVI/HDMI 
Input 
Positive DVI/HDMI Input for A Link Data Channel 0 
G2 
RXA1N 
DVI/HDMI Input 
Negative DVI/HDMI Input for A Link Data Channel 1 
G1 
RXA1P DVI/HDMI 
Input 
Positive DVI/HDMI Input for A Link Data Channel 1 
H3 
RXA2N 
DVI/HDMI Input 
Negative DVI/HDMI Input for A Link Data Channel 2 
H2 
RXA2P DVI/HDMI 
Input 
Positive DVI/HDMI Input for A Link Data Channel 2 
H1 
RXBCKN 
DVI/HDMI Input 
Negative DVI/HDMI Input for B Link Clock Channel 
B1 
RXBCKP DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for B Link Clock Channel 
C3 
RXB0N 
DVI/HDMI Input 
Negative DVI/HDMI Input for B Link Data Channel 0 
C2 
RXB0P DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for B Link Data Channel 0 
C1 
RXB1N 
DVI/HDMI Input 
Negative DVI/HDMI Input for B Link Data Channel 1 
D3 
RXB1P DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for B Link Data Channel 1 
D2 
RXB2N 
DVI/HDMI Input 
Negative DVI/HDMI Input for B Link Data Channel 2 
D1 
RXB2P DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for B Link Data Channel 2 
E3 
RXCCKN 
DVI/HDMI Input 
Negative DVI/HDMI Input for C Link Clock Channel 
AC8 
RXCCKP DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for C Link Clock Channel 
AD8 
RXC0N DVI/HDMI 
Input 
Negative DVI/HDMI Input for C Link Data Channel 0 
AE8 
RXC0P DVI/HDMI 
Input 
Positive DVI/HDMI Input for C Link Data Channel 0 
AC9 
RXC1N DVI/HDMI 
Input 
Negative DVI/HDMI Input for C Link Data Channel 1 
AD9 
RXC1P DVI/HDMI 
Input 
Positive DVI/HDMI Input for C Link Data Channel 1 
AE9 
RXC2N DVI/HDMI 
Input 
Negative DVI/HDMI Input for C Link Data Channel 2 
AD10 
RXC2P DVI/HDMI 
Input 
Positive DVI/HDMI Input for C Link Data Channel 2 
AE10 
SOURCE OF DOCUMENTATION
IC201 (MSB1210)
MSTAR Semiconductor: Preliminary Data Sheet. Version 0.2.
Digital DVBT / VIF Demodulator.
Doc. No.: MSB1210_ds_v02. August 2009.
IC 306 (
MSH 9000-LF)
MSTAR Semiconductor;
 Preliminary Product Brief Version 0.3.
Power Management IC.
Doc. No.: MSH9000_pb_v03. April 2009.
IC1001 (MSD3303GX)
MSTAR Semiconductor; Preliminary Pin Diagram and Description. Version 0.2.
DVB LCD/PDP DTV Processor.
Doc. No.: MSD3303GX_pin_v02 . April 2009.
MSTAR Semiconductor; Block Diagram. Version 0.1.
All-in-one DTV Processor.
Doc. No.: MSD3303GX_bd_v01. April 2009.
LC-32FH500 
LC-32FH510
38
2.3.  IC 1001 
(MSD3303GX)
2.3.3. Pin Description (continued)
2. Detailed ICs Information
, DUNTKF470WE (Main Unit)
 (continued)
DVI/HDMI Interface 
Pin Name 
Pin Type 
Function 
Pin 
RXACKN 
DVI/HDMI Input 
Negative DVI/HDMI Input for A Link Clock Channel 
F2 
RXACKP DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for A Link Clock Channel 
F1 
RXA0N 
DVI/HDMI Input 
Negative DVI/HDMI Input for A Link Data Channel 0 
G3 
RXA0P DVI/HDMI 
Input 
Positive DVI/HDMI Input for A Link Data Channel 0 
G2 
RXA1N 
DVI/HDMI Input 
Negative DVI/HDMI Input for A Link Data Channel 1 
G1 
RXA1P DVI/HDMI 
Input 
Positive DVI/HDMI Input for A Link Data Channel 1 
H3 
RXA2N 
DVI/HDMI Input 
Negative DVI/HDMI Input for A Link Data Channel 2 
H2 
RXA2P DVI/HDMI 
Input 
Positive DVI/HDMI Input for A Link Data Channel 2 
H1 
RXBCKN 
DVI/HDMI Input 
Negative DVI/HDMI Input for B Link Clock Channel 
B1 
RXBCKP DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for B Link Clock Channel 
C3 
RXB0N 
DVI/HDMI Input 
Negative DVI/HDMI Input for B Link Data Channel 0 
C2 
RXB0P DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for B Link Data Channel 0 
C1 
RXB1N 
DVI/HDMI Input 
Negative DVI/HDMI Input for B Link Data Channel 1 
D3 
RXB1P DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for B Link Data Channel 1 
D2 
RXB2N 
DVI/HDMI Input 
Negative DVI/HDMI Input for B Link Data Channel 2 
D1 
RXB2P DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for B Link Data Channel 2 
E3 
RXCCKN 
DVI/HDMI Input 
Negative DVI/HDMI Input for C Link Clock Channel 
AC8 
RXCCKP DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for C Link Clock Channel 
AD8 
RXC0N DVI/HDMI 
Input 
Negative DVI/HDMI Input for C Link Data Channel 0 
AE8 
RXC0P DVI/HDMI 
Input 
Positive DVI/HDMI Input for C Link Data Channel 0 
AC9 
RXC1N DVI/HDMI 
Input 
Negative DVI/HDMI Input for C Link Data Channel 1 
AD9 
RXC1P DVI/HDMI 
Input 
Positive DVI/HDMI Input for C Link Data Channel 1 
AE9 
RXC2N DVI/HDMI 
Input 
Negative DVI/HDMI Input for C Link Data Channel 2 
AD10 
RXC2P DVI/HDMI 
Input 
Positive DVI/HDMI Input for C Link Data Channel 2 
AE10 
SOURCE OF DOCUMENTATION
IC201 (MSB1210)
MSTAR Semiconductor: Preliminary Data Sheet. Version 0.2.
Digital DVBT / VIF Demodulator.
Doc. No.: MSB1210_ds_v02. August 2009.
IC 306 (
MSH 9000-LF)
MSTAR Semiconductor;
 Preliminary Product Brief Version 0.3.
Power Management IC.
Doc. No.: MSH9000_pb_v03. April 2009.
IC1001 (MSD3303GX)
MSTAR Semiconductor; Preliminary Pin Diagram and Description. Version 0.2.
DVB LCD/PDP DTV Processor.
Doc. No.: MSD3303GX_pin_v02 . April 2009.
MSTAR Semiconductor; Block Diagram. Version 0.1.
All-in-one DTV Processor.
Doc. No.: MSD3303GX_bd_v01. April 2009.
LC-32FH500 
LC-32FH510
38
2.3.  IC 1001 
(MSD3303GX)
2.3.3. Pin Description (continued)
2. Detailed ICs Information
, DUNTKF470WE (Main Unit)
 (continued)
DVI/HDMI Interface 
Pin Name 
Pin Type 
Function 
Pin 
RXACKN 
DVI/HDMI Input 
Negative DVI/HDMI Input for A Link Clock Channel 
F2 
RXACKP DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for A Link Clock Channel 
F1 
RXA0N 
DVI/HDMI Input 
Negative DVI/HDMI Input for A Link Data Channel 0 
G3 
RXA0P DVI/HDMI 
Input 
Positive DVI/HDMI Input for A Link Data Channel 0 
G2 
RXA1N 
DVI/HDMI Input 
Negative DVI/HDMI Input for A Link Data Channel 1 
G1 
RXA1P DVI/HDMI 
Input 
Positive DVI/HDMI Input for A Link Data Channel 1 
H3 
RXA2N 
DVI/HDMI Input 
Negative DVI/HDMI Input for A Link Data Channel 2 
H2 
RXA2P DVI/HDMI 
Input 
Positive DVI/HDMI Input for A Link Data Channel 2 
H1 
RXBCKN 
DVI/HDMI Input 
Negative DVI/HDMI Input for B Link Clock Channel 
B1 
RXBCKP DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for B Link Clock Channel 
C3 
RXB0N 
DVI/HDMI Input 
Negative DVI/HDMI Input for B Link Data Channel 0 
C2 
RXB0P DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for B Link Data Channel 0 
C1 
RXB1N 
DVI/HDMI Input 
Negative DVI/HDMI Input for B Link Data Channel 1 
D3 
RXB1P DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for B Link Data Channel 1 
D2 
RXB2N 
DVI/HDMI Input 
Negative DVI/HDMI Input for B Link Data Channel 2 
D1 
RXB2P DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for B Link Data Channel 2 
E3 
RXCCKN 
DVI/HDMI Input 
Negative DVI/HDMI Input for C Link Clock Channel 
AC8 
RXCCKP DVI/HDMI 
Input 
Positive 
DVI/HDMI Input for C Link Clock Channel 
AD8 
RXC0N DVI/HDMI 
Input 
Negative DVI/HDMI Input for C Link Data Channel 0 
AE8 
RXC0P DVI/HDMI 
Input 
Positive DVI/HDMI Input for C Link Data Channel 0 
AC9 
RXC1N DVI/HDMI 
Input 
Negative DVI/HDMI Input for C Link Data Channel 1 
AD9 
RXC1P DVI/HDMI 
Input 
Positive DVI/HDMI Input for C Link Data Channel 1 
AE9 
RXC2N DVI/HDMI 
Input 
Negative DVI/HDMI Input for C Link Data Channel 2 
AD10 
RXC2P DVI/HDMI 
Input 
Positive DVI/HDMI Input for C Link Data Channel 2 
AE10 
SOURCE OF DOCUMENTATION
IC201 (MSB1210)
MSTAR Semiconductor: Preliminary Data Sheet. Version 0.2.
Digital DVBT / VIF Demodulator.
Doc. No.: MSB1210_ds_v02. August 2009.
IC 306 (
MSH 9000-LF)
MSTAR Semiconductor;
 Preliminary Product Brief Version 0.3.
Power Management IC.
Doc. No.: MSH9000_pb_v03. April 2009.
IC1001 (MSD3303GX)
MSTAR Semiconductor; Preliminary Pin Diagram and Description. Version 0.2.
DVB LCD/PDP DTV Processor.
Doc. No.: MSD3303GX_pin_v02 . April 2009.
MSTAR Semiconductor; Block Diagram. Version 0.1.
All-in-one DTV Processor.
Doc. No.: MSD3303GX_bd_v01. April 2009.
LC-32FH500 
LC-32FH510
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