Sharp LC-26SH330E Service Manual ▷ View online
2008-03-14
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· Four Selectable, Fixed Gain Settings
· Differential Inputs
· Thermal and Short-Circuit Protection With Auto Recovery Feature
· Speaker Protection Using Adjustable Power Limit
· DC Detect
· Surface Mount 28-pin TSSOP (PWP) Package
APPLICATIONS
· Televisions
· Consumer Audio Equipment
DESCRIPTION
The TPA3110D2 is a 15-W (per channel) efficient, Class-D audio power amplifier for driving bridged-tied stereo speakers. The TPA3110D2 can
drive stereo speakers as low as 4 Ω. The high efficiency of the TPA3110D2, 87%, eliminates the need for an external heat sink when playing music.
The gain of the amplifier is controlled by two gain select pins. The gain selections are 20, 26, 32, 36 dB.
The outputs are fully protected against shorts to GND, VCC, and output-to-output shorts with an auto recovery feature and monitor output.
Speakers may
be protected by an adjustable power limit circuit. Dc detect is also included to prevent speaker damage.
1.5. U602 (TPA6132A2RTER 25mW QFN-16)
FEATURES
· Patented DirectPath™ Technology Eliminates
Need for DC-Blocking Capacitors
– Outputs Biased at 0 V
– Excellent Low Frequency Fidelity
· Active Click and Pop Suppression
· 2.1 mA Typical Supply Current
· Fully Differential or Single-Ended Inputs
– Built-In Resistors Reduces Component Count
– Improves System Noise Performance
· Constant Maximum Output Power from 2.3 V to 5.5 V Supply
– Simplifies Design to Prevent Acoustic Shock
· Improved RF Noise Immunity
· Microsoft
TM
Windows Vista
TM
Compliant
· High Power Supply Noise Rejection
– 100 dB PSRR at 217 Hz
– 90 dB PSRR at 10 kHz
· Wide Power Supply Range: 2.3 V to 5.5 V
· Gain Settings: –6 dB, 0 dB, 3 dB, and 6 dB
· Short-Circuit and Thermal-Overload Protection
· ±8 kV HBM ESD Protected Outputs
· Small Package Available
– 16-Pin, 3 mm × 3 mm Thin QFN
APPLICATIONS
· Smart Phones / Cellular Phones
· Notebook Computers
· CD / MP3 Players
· Portable Gaming
DESCRIPTION
The TPA6132A2 (sometimes referred to as TPA6132) is a DirectPath™ stereo headphone amplifier that eliminates the need for external dc-
blocking output capacitors. Differential stereo inputs and built-in resistors set the device gain, further reducing external component count. Gain is
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selectable at –6 dB, 0 dB, 3 dB or 6 dB. The amplifier drives 25 mW into 16 Ω speakers from a single 2.3 V supply. The TPA6132A2 (TPA6132)
provides a constant maximum output power independent of the supply voltage, thus facilitating the design for prevention of acoustic shock.
The TPA6132A2 (TPA6132) features fully differential inputs to reduce system noise pickup between the audio source and the headphone amplifier.
The high power supply noise rejection performance and differential architecture provides increased RF noise immunity. For single-ended input
signals, connect
INL+ and INR+ to ground.
The device has built-in pop suppression circuitry to completely eliminate disturbing pop noise during turn-on and turn-off. The amplifier outputs have
short-circuit and thermal-overload protection along with ±8 kV HBM ESD protection, simplifying end equipment compliance to the IEC 61000-4-2
ESD standard.
The TPA6132A2 (TPA6132) operates from a single 2.3 V to 5.5 V supply with 2.1 mA of typical supply current. Shutdown mode reduces supply
current to
less than 1 mA.
1.6. U4051 (HY27US08281A-TPIB 128MB TSOP48)
FEATURES SUMMARY
HIGH DENSITY NAND FLASH MEMORIES
- Cost effective solutions for mass storage applications
NAND INTERFACE
- x8 or x16 bus width.
- Multiplexed Address/ Data
- Pinout compatibility for all densities
SUPPLY VOLTAGE
- 3.3V device: VCC = 2.7 to 3.6V : HY27USXX281A
Memory Cell Array
= (512+16) Bytes x 32 Pages x 1,024 Blocks
= (256+8) Words x 32 pages x 1,024 Blocks
PAGE SIZE
- x8 device : (512 + 16 spare) Bytes
: HY27US08281A
- x16 device: (256 + 8 spare) Words
: HY27US16281A
BLOCK SIZE
- x8 device: (16K + 512 spare) Bytes
- x16 device: (8K + 256 spare) Words
PAGE READ / PROGRAM
- Random access: 10us (max.)
- Sequential access: 3.3V device: 50ns (min.)
- Page program time: 200us (typ.)
COPY BACK PROGRAM MODE
- Fast page copy without external buffering
FAST BLOCK ERASE
- Block erase time: 2ms (Typ.)
STATUS REGISTER
ELECTRONIC SIGNATURE
- Manufacturer Code
- Device Code
CHIP ENABLE DON'T CARE OPTION
- Simple interface with microcontroller
AUTOMATIC PAGE 0 READ AT POWER-UP OPTION
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- Boot from NAND support
- Automatic Memory Download
SERIAL NUMBER OPTION
HARDWARE DATA PROTECTION
- Program/Erase locked during Power transitions
DATA INTEGRITY
- 100,000 Program/Erase cycles
- 10 years Data Retention
PACKAGE
- HY27US(08/16)281A-T(P)
: 48-Pin TSOP1 (12 x 20 x 1.2 mm)
- HY27US(08/16)281A-T (Lead)
- HY27US(08/16)281A-TP (Lead Free)
- HY27US(08/16)281A-S(P)
: 48-Pin USOP1 (12 x 17 x 0.65 mm)
- HY27US(08/16)281A-S (Lead)
- HY27US(08/16)281A-SP (Lead Free)
SUMMARY DESCRIPTION
The HYNIX HY27US(08/16)281A series is a 16Mx8bit with spare 4G bit capacity. The device is offered in 1.8V Vcc Power Supply and in 3.3V Vcc
Power Supply.
Its NAND cell provides the most cost-effective solution for the solid state mass storage market.
The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased.
The device contains 1024 blocks, composed by 32 pages consisting in two NAND structures of 16 series connected Flash cells.
A program operation allows to write the 512-byte page in typical 200us and an erase operation can be performed in typical 2ms on a 16K-byte(X8
device) block.
Data in the page mode can be read out at 50ns cycle time per byte. The I/O pins serve as the ports for address and data input/output as well as
command input. This interface allows a reduced pin count and easy migration towards different densities, without any rearrangement of footprint.
Commands, Data and Addresses are synchronously introduced using CE#, WE#, ALE and CLE input pin. The on-chip Program/Erase Controller
automates all program and erase functions including pulse repetition, where required, and internal verification and margining of data.
The modifying can be locked using the WP# input pin.
The output pin RB# (open drain buffer) signals the status of the device during each operation. In a system with multiple memories the RB# pins can
be connected all together to provide a global status signal.
Even the write-intensive systems can take advantage of the HY27US(08/16)281A extended reliability of 100K program/
erase cycles by providing ECC (Error Correcting Code) with real time mapping-out algorithm.
Optionally the chip could be offered with the CE# don’t care function. This option allows the direct download of the code from the NAND Flash
memory device by a microcontroller, since the CE# transitions do not stop the read operation.
The copy back function allows the optimization of defective blocks management: when a page program operation fails the data can be directly
programmed in another page inside the same array section without the time consuming serial data insertion phase.
This device includes also extra features like OTP/Unique ID area, Block Lock mechanism, Automatic Read at Power Up, Read ID2 extension.
The Hynix HY27US(08/16)281A series is available in 48 - TSOP1 12 x 20 mm, 48 - USOP1 12 x 17 mm.
1.7. U4053 (MAX3232EEUE TSSOP-16)
General Description
The MAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246E +3.0V-powered EIA/TIA-232 and V.28/V.24 communications interface devices
feature low power consumption, high data-rate capabilities, and enhanced electrostatic-discharge (ESD) protection. The enhanced ESD structure
protects all transmitter outputs and receiver inputs to ±15kV using IEC 1000-4-2 Air-Gap Discharge, ±8kV using IEC 1000-4-2 Contact Discharge
(±9kV for MAX3246E), and ±15kV using the Human Body Model. The logic and receiver I/O pins of the MAX3237E are protected to the above
standards, while the transmitter
output pins are protected to ±15kV using the Human Body Model.
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A proprietary low-dropout transmitter output stage delivers true RS-232 performance from a +3.0V to +5.5V power supply, using an internal dual
charge pump. The charge pump requires only four small 0.1µF capacitors for operation from a +3.3V supply. Each device guarantees operation at
data rates of 250kbps while maintaining RS-232 output levels. The MAX3237E guarantees operation at 250kbps in the normal operating mode and
1Mbps in the MegaBaud™ operating mode, while maintaining RS-232 compliant output levels.
The MAX3222E/MAX3232E have two receivers and two transmitters. The MAX3222E features a 1µA shutdown mode that reduces power
consumption in battery-powered portable systems. The MAX3222E receivers remain active in shutdown mode, allowing monitoring of external
devices while consuming only 1µA of supply current. The MAX3222E and MAX3232E are pin, package, and functionally compatible with the
industry-standard MAX242 and MAX232, respectively.
The MAX3241E/MAX3246E are complete serial ports (three drivers/five receivers) designed for notebook and subnotebook computers. The
MAX3237E (five drivers/three receivers) is ideal for peripheral applications that require fast data transfer. These devices feature a shutdown mode
in which all receivers remain active, while consuming only 1µA (MAX3241E/MAX3246E) or 10nA (MAX3237E).
The MAX3222E, MAX3232E, and MAX3241E are available in space-saving SO, SSOP, TQFN and TSSOP packages. The MAX3237E is offered in
an SSOP package. The MAX3246E is offered in the ultra-small 6 x 6 UCSP™ package.
Applications
Battery-Powered Equipment Printers
Cell Phones Smart Phones
Cell-Phone Data Cables xDSL Modems
Notebook, Subnotebook,
and Palmtop Computers
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