Sharp LC-26SB25E Service Manual ▷ View online
2008-03-14
LC-26SB25E/S/RU, LC-32SB25E/S/RU, LC-42SB55E/S/RU
65
2.8.2 Pin Connections and short description
Pin Numbers Symbol
Type Description
Transport Stream / I2C Address setting
9
TSDATA7
I/O
1. TS data output. In serial transport stream mode, TSDATA [7:0] are the same, you
can select one of them as serial transport stream data.
2. I2C chip address, SA2, HW strapping during reset, default internal pull low.
can select one of them as serial transport stream data.
2. I2C chip address, SA2, HW strapping during reset, default internal pull low.
10
TSDATA6
I/O
1. TS data output.
2. I2C chip address, SA1, HW strapping during reset, default internal pull low.
2. I2C chip address, SA1, HW strapping during reset, default internal pull low.
11
TSDATA5
I/O
1. TS data output.
2. I2C chip address, SA0, HW strapping during reset, default internal pull high.
2. I2C chip address, SA0, HW strapping during reset, default internal pull high.
13
TSDATA4
O
TS data output.
14
TSDATA3
O
TS data output.
15
TSDATA2
O
TS data output.
16
TSDATA1
O
TS data output.
17
TSDATA0
O
TS data output.
18
TSERR
O
TS packet error indicator
19
TSVAL
O
TS output valid signal
ADC&RF
Interface
Time Domain
Processing
Freq. Domain
Processing
FEC
System
Controller
Host
Interface
Interface
IF
TSIF
AGC
I2C
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
AGND
AGND
XTALI
XTALO
AVDD33
RSSI_IN
VDD12
DGND
TSDATA7
TSDATA6
TSDATA5
VDD33
TS
D
AT
A
4
TS
D
AT
A
3
TS
D
AT
A
2
TS
D
AT
A
1
TS
D
AT
A
0
T
SER
R
TS
VA
L
T
SSYN
C
TS
C
LK
VD
D
33
DG
N
D
VD
D
12
RF_AGC
IF_AGC
VDD33
GIO0
RESET_B
XTALCLK_SEL1
XTALCLK_SEL0
DGND
VDD33
VDD12
SDA
SCL
AV
D
D
33
RE
F
TO
P
VC
MEXT
RE
F
B
O
T
II
P
II
N
AV
D
D
33
AG
N
D
VD
D
12
DG
N
D
SC
LT
SD
AT
LC-26SB25E/S/RU, LC-32SB25E/S/RU, LC-42SB55E/S/RU
66
20
TSSYNC
O
TS packet start signal
21
TSCLK
O
TS output clock
Analog Signal
6
6
RSSI_IN
A
Received signal strength indicator input
43
IIN
A
Analog IF input (differential)
44
IIP
A
Analog IF input (differential)
47
REFTOP
A
ADC reference top voltage. Decouple with a capacitor to Analog ground plane.
45
REFBOT
A
ADC reference bottom voltage. Decouple with a capacitor to Analog ground plane.
46
VCMEXT
A
ADC common mode voltage
Clock Generation
3
3
XTALI
A
4
XTALO
A
Crystal input
Control Signals
33
33
GIO0
I/O
GIO 0
36
RF_AGC
I/O
1. GIO4
2. RF AGC control
2. RF AGC control
31
XTALCLK_SEL1 I
30
XTALCLK_SEL0 I
clock (crystal) frequency selection
25
SCL
I
Host processor serial clock input
26
SDA
I/O
Host processor serial data pin
38
SCLT
I
Tuner serial clock output, 5 volt compatible
37
SDAT
I/O
Tuner serial data pin, 5 volt compatible
35
IF_AGC
O
IF AGC output
32
RESET_B
I
Power reset pin, low active
Required reset timing is 15ms(after power stable), VIH=2.5V,VL=0.5V
Required reset timing is 15ms(after power stable), VIH=2.5V,VL=0.5V
Power Supply
12, 22, 28, 34 VDD33
12, 22, 28, 34 VDD33
P
Digital power supply, tie to 3.3V
7, 24, 27, 40
VDD12
P
Digital power supply, tie to 1.2V
8, 23, 29, 39
DGND
P
Digital ground, tie to digital ground plane
5, 42, 48
AVDD33
P
Analog power supply, tie to 3.3V
1, 2, 41
AGND
P
Analog ground, tie to analog ground plane
2.9. U602 (WM8521H9GED/RV SOIC-14)
2.9.1 Block Diagram
2.9.2 Pin Connections and short description
BCLK
LRCLK
DIN
FORMAT MUTE DEEMPH
CONTROL
INTERFACE
DIGITAL AUDIO
INTERFACE
&
DIGITAL FILTERS
SIGMA
DELTA
MODULATOR
RIGHT
DAC
SIGMA
DELTA
MODULATOR
LEFT
DAC
VOUTR
VOUTL
CAP
DVDD DGND AVDD AGND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
DGND
LRCLK
DIN
BCLK
MUTE
VOUTR
AGND
DVDD
MCLK
FORMAT
DEEMPH
VOUTL
AVDD
CAP
2008-03-14
LC-26SB25E/S/RU, LC-32SB25E/S/RU, LC-42SB55E/S/RU
67
PIN NAME
TYPE
DESCRIPTION
1
DGND
Supply
Digital Negative supply
2
LRCLK
Digital input
Sample rate clock input
3
DIN
Digital input
Serial audio data input
4
BCLK
Digital input
Bit clock input
5
MUTE
Digital input
Soft mute control, Internal pull down
High Impedance = Automute
High = Mute ON
Low = Mute OFF
High Impedance = Automute
High = Mute ON
Low = Mute OFF
6
VOUTR
Analogue output Right channel DAC output
7
AGND
Supply
Analogue Negative supply
8
CAP
Analogue output Analogue internal reference
9
AVDD
Supply
Analogue Positive supply
10
VOUTL
Analogue output Left channel DAC output
11
DEEMPH Digital input
De-emphasis select, Internal pull down
High = de-emphasis ON
Low = de-emphasis OFF
High = de-emphasis ON
Low = de-emphasis OFF
12
FORMAT Digital input
Data input format select, Internal pull up
Low = 16-bit right justified or 16bit DSP ‘late’
High = 16-32-bit I
Low = 16-bit right justified or 16bit DSP ‘late’
High = 16-32-bit I
2
S or 16bit DSP ‘early’
13
MCLK
Digital input
Master clock input
14
DVDD
Supply
Digital Positive supply
2.10. U401 (MT8295AE LQFP-128)
2.10.1 Block Diagram
2.10.2 Pin Connections and short description
Pin Number
M0 M1 M2
Symbol Type
Driving
Description
Note
Miscellaneous
107 RESETB
107 RESETB
I
N/A
Chip
reset
114 100 117 CI_INT
O
4~16mA Interrupt
1
NAND flash
116 102 115 CI_DATA0
116 102 115 CI_DATA0
I/O
4~16mA NAND Flash Data bit 0
1
115 101 114 CI_DATA1
I/O
4~16mA NAND Flash Data bit 1
1
95
96 106 CI_DATA2
I/O
4~16mA NAND Flash Data bit 2
1
102 117 105 CI_DATA3
I/O
4~16mA NAND Flash Data bit 3
1
101 116 103 CI_DATA4
I/O
4~16mA NAND Flash Data bit 4
1
100 115 102 CI_DATA5
I/O
4~16mA NAND Flash Data bit 5
1
99 95 101 CI_DATA6
I/O
4~16mA NAND Flash Data bit 6
1
98 94 100 CI_DATA7
I/O
4~16mA NAND Flash Data bit 7
1
94 99 116 CI_CEB
I
N/A
NAND Flash Chip enable
1
106 98
99
CI_RB
O
4~16mA NAND Flash Ready
1
96 114 94
CI_WEB
I
N/A
NAND Flash Write enable
1
103 105 95
CI_ALE
I
N/A
NAND Flash Address Latch enable
1
105 103 96
CI_CLE
I
N/A
NAND Flash Command Latch enable
1
117 106 98
CI_OEB
I
N/A
NAND Flash Output enable
1
CLK/Crystal
LC-26SB25E/S/RU, LC-32SB25E/S/RU, LC-42SB55E/S/RU
68
109 XTALO
O
N/A
Crystal
output
110 XTALI I
N/A
Crystal
input
Transport stream (TS)
6
6
T0CLK
I
N/A
Transport stream 1 input clock
7
T0SYNC
I
N/A
Transport stream 1 input sync.
8
T0VALID
I
N/A
Transport stream 1 input valid
9
T0DATA0
I
N/A
Transport stream 1 input data bit 0
11 T0DATA1
I
N/A
Transport stream 1 input data bit 1
Transport stream 2 input clock
Transport stream 2 input clock
2
12 T0DATA2
I
N/A
Transport stream 1 input data bit 2
Transport stream 2 input sync
Transport stream 2 input sync
2
13 T0DATA3
I
N/A
Transport stream 1 input data bit 3
Transport stream 2 input valid
Transport stream 2 input valid
2
14 T0DATA4
I
N/A
Transport stream 1 input data bit 4
Transport stream 2 input data
Transport stream 2 input data
2
16
T0DATA5
I
N/A
Transport stream 1 input data bit 5
17
T0DATA6
I
N/A
Transport stream 1 input data bit 6
18
T0DATA7
I
N/A
Transport stream 1 input data bit 7
123
TS_CKO
O
4~16mA Transport stream output clock
125
TS_SYNCO
O
4~16mA Transport stream output sync.
122
TS_VALIDO
O
4~16mA Transport stream output valid
124
TS_DATAO
O
4~16mA Transport stream output data
General Purpose Input and Output (GPIO)
1
1
GPIO0
I/O
4~16mA General purpose I/O bit 0
2
GPIO1
I/O
4~16mA General purpose I/O bit 1
3
GPIO2
I/O
4~16mA General purpose I/O bit 2
4
GPIO3
I/O
4~16mA General purpose I/O bit 3
19
GPIO4
I/O
4~16mA General purpose I/O bit 4
20
GPIO5
I/O
4~16mA General purpose I/O bit 5
21
GPIO6
I/O
4~16mA General purpose I/O bit 6
91
GPIO7
I/O
4~16mA General purpose I/O bit 7
92
GPIO8
I/O
4~16mA General purpose I/O bit 8
93
GPIO9
I/O
4~16mA General purpose I/O bit 9
118
GPIO10
I/O
4~16mA General purpose I/O bit 10
119
GPIO11
I/O
4~16mA General purpose I/O bit 11
120
GPIO12
I/O
4~16mA General purpose I/O bit 12
127
GPIO13
I/O
4~16mA General purpose I/O bit 13
128
GPIO14
I/O
4~16mA General purpose I/O bit 14
PCMCIA/CI
83
83
D0
I/O
4~16mA PCMCIA data bit 0
85
D1
I/O
4~16mA PCMCIA data bit 1
87
D2
I/O
4~16mA PCMCIA data bit 2
24
D3
I/O
4~16mA PCMCIA data bit 3
26
D4
I/O
4~16mA PCMCIA data bit 4
28
D5
I/O
4~16mA PCMCIA data bit 5
30
D6
I/O
4~16mA PCMCIA data bit 6
32
D7
I/O
4~16mA PCMCIA data bit 7
81
D8
I/O
4~16mA PCMCIA data bit 8
84
D9
I/O
4~16mA PCMCIA data bit 9
86
D10
I/O
4~16mA PCMCIA data bit 10
25
D11
I/O
4~16mA PCMCIA data bit 11
27
D12
I/O
4~16mA PCMCIA data bit 12
29
D13
I/O
4~16mA PCMCIA data bit 13
31
D14
I/O
4~16mA PCMCIA data bit 14
34
D15
I/O
4~16mA PCMCIA data bit 15
80
A0
O
4~16mA PCMCIA address bit 0
78
A1
O
4~16mA PCMCIA address bit 0
75
A2
O
4~16mA PCMCIA address bit 0
73
A3
O
4~16mA PCMCIA address bit 0
71
A4
O
4~16mA PCMCIA address bit 0
69
A5
O
4~16mA PCMCIA address bit 0
66
A6
O
4~16mA PCMCIA address bit 0
64
A7
O
4~16mA PCMCIA address bit 0
46
A8
O
4~16mA PCMCIA address bit 0
44
A9
O
4~16mA PCMCIA address bit 0
37
A10
O
4~16mA PCMCIA address bit 0
41
A11
O
4~16mA PCMCIA address bit 0
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