DOWNLOAD Sharp LC-26D44E (serv.man6) Service Manual ↓ Size: 1.64 MB | Pages: 24 in PDF or view online for FREE

Model
LC-26D44E (serv.man6)
Pages
24
Size
1.64 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / LCD / Major IC Informations
File
lc-26d44e-sm6.pdf
Date

Sharp LC-26D44E (serv.man6) Service Manual ▷ View online

LC-26D44E/S/RU-BK/GY
5 – 1
LC26D44E-BK
Service Manual
 
CHAPTER 5. 
MAJOR IC INFORMATIONS
[1] MAJOR IC INFORMATIONS
1. IC207 (RH-iXB964WJZZQ)
The STv0362 is a single-chip demodulator using COFDM (coded orthogonal frequency division Multiplexing) and is intended for digital terrestrial
receivers using compressed video, sound and data services. It converts IF or base band differential signals to MPEG-2 format by processing OFDM
carriers.
The STv0362 is fully compliant with the DVB-T specification (ETS 300 744) and Nor Dig Unified specification.
Pin No.
Pin Name
I/O
Pin Function
Clock and resets
32
NOT_RESET
I
Hardware reset, active low
15
XTAL_I
I
Analog Crystal oscillator input/external clock (2.5 V)
14
XTAL_O
O
Analog Crystal oscillator output
13
VDDA_2V5
---
Supply Analog oscillator supply (2.5 V)
16
VDDA_2V5
---
Supply Analog PLL supply (2.5 V)
Analog interface
1
RF_LEVEL
---
ADC 8 input for RF level monitoring
2
VDDA_2V5
---
Analog ADC 8 supply (2.5 V)
3
QP
---
Positive Q analog input for baseband configuration
4
QM
---
Negative Q analog input for baseband configuration
5
VDDA_ISO
---
Analog ISO nwell polarization (2.5 V)
6
VDDA_2V5
---
Analog ADC 12 supply (2.5 V)
7
REFP
---
Internal positive reference
8
REFM
---
Internal negative reference
9
INCM
---
Internal common mode
10
IM
---
Negative I analog input for IF and baseband configuration
11
IP
---
Positive I analog input for IF and baseband configuration
12
VDDA_1.0
---
Analog supply (1.0 V)
I2C interface
29
SDA
I/O
Serial data (open drain)
30
SCL
I
Serial clock (open drain)
21
SDAT
I/O
SDA tuner (open drain)
20
SCLT
I
SCL tuner
MPEG interface
43
D7
O
Serial MPEG data or parallel MPEG data (bit 7)
42
D6
O
Parallel MPEG data (bit 6)
40
D5
O
Parallel MPEG data (bit 5)
39
D4
O
Parallel MPEG data (bit 4)
37
D3
O
Parallel MPEG data (bit 3)
36
D2
O
Parallel MPEG data (bit 2)
35
D1
O
Parallel MPEG data (bit 1)
33
D0
O
Parallel MPEG data (bit 0)
44
CLK_OUT
O
MPEG byte or bit clock
46
STR_OUT
O
MPEG first byte sync
47
D/NOT_P
O
MPEG data valid/parity
48
ERROR
O
MPEG packet error
Front end controls
18
AGC_RF
I/O
RF AGC control 
 (5 V tolerant)
17
AGC_IF
I/O
IF AGC control 
 (5 V tolerant)
64
TEST
I/O
Reserved test mode, must be grounded.
27
GPIO0
I/O
General-purpose input/output port 0. Reserved test mode, must be grounded.
49
GPIO1
I/O
General-purpose input/output port 1
60
GPIO2
I/O
General-purpose input/output port 2 or lock indicator
59
GPIO3
I/O
General-purpose input/output port 3 or lock indicator
58
GPIO4
I/O
General-purpose input/output port 4
57
GPIO5
I/O
General-purpose input/output port 5
54
GPIO6
I/O
General-purpose input/output port 6
53
GPIO7
I/O
General-purpose input/output port 7
52
GPIO8
I/O
General-purpose input/output port 8. Reserved test mode, must be grounded.
61
GPIO9
I/O
General-purpose input/output port 9
23
AUX_CLK
I/O
Auxiliary clock
25
CS0
I
Chip select LSB
LC-26D44E/S/RU-BK/GY
5 – 2
2. IC1301 (VHINJM2750M-1Y)
The NJM2750 is a 4-input/1-output stereo audio selector. It contains a switch operational amplifier and shows lower noise, lower distortion and higher
channel separation than an ordinary multiplexer or analog switch.
Description:
• Operating voltage (4.7 - 13V)
• 4-input/1-output audio selector
• Stereo 2-channel
• Low output noise (-110dBV typ.)
• Low distortion (0.005% typ.)
3. IC1401 (VHISM5309AV-1Y)
The SM5309A is a 3ch video buffer with a built-in 5th-order low pass filter. The cutoff frequency of the low pass filter can be adjusted between 4MHz
and 40MHz in 256 steps. The low pass filter supports analog inputs/outputs of video signal device of 480i to 1080i format. When it is used as an input
system, it functions as an antialiasing filter of the rear-stage ADC system. If used as an output system, aliasing noise from the video DAC or exoge-
nous noise is eliminated, and the terminating resistance of up to 300
Ω can be driven. The cutoff frequency or signal input method can be controlled by
I2C-BUS.
Description:
• Supply voltage: Analog: 4.75 - 5.25V
                         Digital:  3.0 - 5.5V
• Low pass filter function where cutoff frequency can be adjusted in 256 steps
Cutoff frequency range: 4MHz - 40MHz (RISET = 1.8k
Ω)
• Filter bypath mode function supporting the resolution of SXGA
• Switchable to the half fc mode suitable for the component signal (CH-2, CH-3)
• 2-input multiplexer function (switchable by the I2C-BUS or MUXSEL terminal)
• For the video input terminal, the sync-tip clamp/bias/direct input can be selected per channel.
• Possible to drive the terminating resistance of up to 300
• Output gain: 0dB
• Power down function
– Consumption current at power down: 1mA or less
• Control by I2C-BUS interface
– Transfer rate: First mode (400kbit/s) supported
26
CS1
I
Chip select MSB
Power supply
19, 24, 31, 38, 45, 51, 55, 62
VDD_1V0
---
Digital core supply (1.0 V)
22, 28, 34, 41, 50, 56, 63
VDD_3V3
---
Digital I/O supply (3.3 V)
Pin No.
Pin Name
I/O
Pin Function
1
IN1a
I
A-ch input selector 1.
2
CNT1
I
control 1.
3
IN2a
I
A-ch input selector 2.
4
CNT2
I
control 2.
5
IN4a
I
A-ch input selector 4.
6
IN1b
I
B-ch input selector 1.
7
IN2b
I
B-ch input selector 2.
8
IN4b
I
B-ch input selector 4.
9
IN3b
I
B-ch input selector 3.
10
(N.C)
---
No connection.
11
OUTb
O
B-ch output.
12
Vref
I
Reference voltage.
13
IN3a
I
Ach input selector 3.
14
V+
---
Power supply.
15
OUTa
O
A-ch output.
16
GND
---
Ground.
Pin No.
Pin Name
I/O
Pin Function
1
IN1A
I
Video signal input terminal (CH-1, A input)
2
IN1B
I
Video signal input terminal (CH-1, B input)
3
GND
---
Ground.
4
ISET
---
Resister (RISET) connection terminal for internal current setting.
Pin No.
Pin Name
I/O
Pin Function
LC-26D44E/S/RU-BK/GY
5 – 3
4. IC1501 (VHIISL83220-1Y)
+/-15kV ESD Protected, +3V to +5.5V, 1Microamp, 250kbps, RS-232 Transmitters/Receivers.
The ISL83220E is a 3.0V to 5.5V powered RS-232 transmitter/ receiver which meets ElA/TIA-232 and V.28/ V.24 specifications, even at VCC = 3.0V.
Additionally, it provides  15kV ESD protection (IEC 1000-4-2 Air Gap and Human Body Model) on transmitter outputs and receiver inputs (RS-232
pins). Targeted applications are PDAs, Palmtops, and notebook and laptop computers where the low operational, and even lower standby, power
consumption is critical. Efficient on-chip charge pumps, coupled with a manual power down function, reduce the standby supply current to a 1 A
trickle. Small footprint packaging, and the use of small, low value capacitors ensure board space savings as well. Data rates greater than 250kbps are
guaranteed at worst case load conditions. This family is fully compatible with 3.3V only systems, mixed 3.3V and 5.0V systems, and 5.0V only sys-
tems.
5
NC
---
No connection.
6
IN2A
I
Video signal input terminal (CH-2, A input)
7
IN2B
I
Video signal input terminal (CH-2, B input)
8
VCC
---
Analog power supply.
9
IN3A
I
Video signal input terminal (CH-3, A input)
10
IN3B
I
Video signal input terminal (CH-3, B input)
11
MUXSEL
I
Input multiplexer select terminal.
12
SCL
I
I2C clock signal input.
13
SDA
I/O
I2C data signal in-output.
14
VDD
---
Digital power supply.
15
GND
---
Ground.
16
OUT3
O
Video signal output terminal (CH-3)
17
VCC
---
Analog power supply.
18
OUT2
O
Video signal output terminal (CH-2)
19
GND
---
Ground.
20
OUT1
O
Video signal output terminal (CH-1)
21
VCC
---
Analog power supply.
22
REF2
O
Internal reference voltage 2.
23
REF1
O
Internal reference voltage 1.
24
ADS
I
I2C slave address setting terminal (3 states).
Pin No.
Pin Name
I/O
Pin Function
1
EN
I
Active low receiver enable control; doesn't disable ROUTB outputs.
2
C1+
---
External capacitor (voltage doubler) is connected to this lead.
3
V+
---
Internally generated positive transmitter supply.
4
C1-
---
External capacitor (voltage doubler) is connected to this lead.
5
C2+
---
External capacitor (voltage inverter) is connected to this lead.
6
C2-
---
External capacitor (voltage inverter) is connected to this lead.
7
V-
---
Internally generated negative transmitter supply.
8
RIN
I
±15kV ESD Protected, RS-232 compatible receiver inputs.
9
ROUT
O
TTL/CMOS level receiver outputs.
10
N.C.
---
No connection.
11
TIN
I
TTL/CMOS compatible transmitter Inputs.
12
N.C.
---
No connection.
13
TOUT
O
±15kV ESD Protected, RS-232 level transmitter outputs.
14
GND
---
Ground.
15
VCC
---
System power supply input.
16
SHDN
I
Active low input shuts down transmitters and on-board power supply, to place device in low power 
mode.
Pin No.
Pin Name
I/O
Pin Function
LC-26D44E/S/RU-BK/GY
5 – 4
5. IC1702/1735/1745 (VHILV5805M+-1Y)
Step-down DC-DC converter
This is a 1ch step-down switching regulator. It incorporates 0.2
ΩFET on the upper side and realizes high-efficiency operation for large output current.
Since the current mode control method is adopted, good load current response and easy phase compensation are available.
The standby mode can be entered using the ON/OFF terminal. The load device is protected by the pulse-by-pulse or current protection and overheat
protection function. Soft start becomes possible by applying capacitance to the soft start terminal.
6. IC1951 (VHiSii9025+-1Q)
The Sii9025 is a compliant with the latest HDMI 1.2 (High Definition Multimedia Interface) specification.
Backward compatibility with DVI 1.0 allows HDMI systems to connect to existing DVI 1.0 hosts.
The SiI9025 is capable of receiving and outputting two channel digital audio at up to 192 kHz- an excellent solution for Digital TVs.
An S/PDIF port supports up to 192 kHz audio.
The SiI9025 also comes pre-programmed with HDCP keys, greatly simplifying the manufacturing process, while providing the highest level of HDCP
key security.
Description:
• Dual-Input HDMI 1.2, HDCP 1.1 and DVI 1.0 compliant receiver.
• Integrated TMDSR core.
• Digital video interface supports video processors:
24-bit RGB/YCbCr 4:4:4
16/20/24-bit YCbCr 4:2:2
8/10/12-bit YCbCr 4:2:2 (ITU BT.656)
12-bit DMO (Digital Multimedia Output) RGB/YCbCr 4:4:4 (clocked with rising & falling edges)
Color Space Conversion for both RGB-to-YCbCr and YCbCr-to-RGB (both 601 and 709)
Auto video mode configuration simplifies system firmware design.
• Digital audio interface supports high-end audio systems:
One programmable I2S output for connection to low-cost DACs at 32-192kHz.
S/PDIF output supports PCM, Dolby Digital, DTS digital audio transmission (32-192kHz Fs) using IEC60958 and IEC61937.
Auto audio error detection with programmable soft mute.
• Integrated HDCP decryption engine for receiving protected audio and video content.
Pin No.
Pin Name
I/O
Pin Function
1
BOOT
---
Upper part MOS transistor boot strap capacity connection terminal. 
2
VIN
I
Power voltage supply terminal.
3
SW
O
Power Switch terminal.
4
GND
---
Ground.
5
FB
I
Feedback terminal.
6
COMP
---
Phase amends terminal.
7
EN
I
Enable terminal.
8
SS
I
Soft start terminal.
Page of 24
Display

Sharp LC-26D44E (serv.man6) Service Manual ▷ Download

  • DOWNLOAD Sharp LC-26D44E (serv.man6) Service Manual ↓ Size: 1.64 MB | Pages: 24 in PDF or view online for FREE
  • Here you can View online or download the Service Manual for the Sharp LC-26D44E (serv.man6) in PDF for free, which will help you to disassemble, recover, fix and repair Sharp LC-26D44E (serv.man6) LCD. Information contained in Sharp LC-26D44E (serv.man6) Service Manual (repair manual) includes:
  • Disassembly, troubleshooting, maintenance, adjustment, installation and setup instructions.
  • Schematics, Circuit, Wiring and Block diagrams.
  • Printed wiring boards (PWB) and printed circuit boards (PCB).
  • Exploded View and Parts List.