Sharp LC-24DV250K (serv.man2) Service Manual ▷ View online
29
LC-24DV250 (C)
12
c.
Pin descriptions and functions:
Figure 3: Pin description
Table 4: Recommended operating conditions
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LC-24DV250 (C)
13
C. HEADPHONE AMPLIFIER STAGE
Headphone is a SoC (single on chip) configuration in mainboard, design scheme is shown
in figure 4.
Figure 4: Headphone
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LC-24DV250 (C)
14
4.
POWER STAGE
Figure 5: Power socket and power options
Power socket is used for taking voltages which are 3.3V, 12V, 5V and 24V(VDD_Audio).
These voltages are produced in power card. Also socket is used for giving dimming, backlight
and standbye signals with power card.
t is shown in figure 5.
24V(VDD_Audio) goes directly to the audio side, through power socket other incoming
voltages from power card are converted several voltages.
Figure 6: Power steps
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LC-24DV250 (C)
15
FDC642P
General Description and Features
TPS65251
a)
General Description
The TPS65251 features three synchronous wide input range high efficiency buck
converters. The converters are designed to simplify its application while giving the designer
the option to optimize their usage according to the target application.
The converters can operate in 5-, 9-, 12- or 15-V systems and have integrated power
transistors. The output voltage can be set externally using a resistor divider to any value
between 0.8 V and close to the input supply. Each converter features enable pin that allows a
delayed start-up for sequencing purposes, soft start pin that allows adjustable soft-start time
by choosing the soft-start capacitor, and a current limit (RLIMx) pin that enables designer to
adjust current limit by selecting an external resistor and optimize the choice of inductor. The
current mode control allows a simple RC compensation.
The switching frequency of the converters can either be set with an external resistor
connected to ROSC pin or can be synchronized to an external clock connected to SYNC pin if
needed. The switching regulators are designed to operate from 300 kHz to 2.2 MHz. 180° out
of phase operation between Buck 1 and Buck 2, 3 (Buck 2 and 3 run in phase) minimizes the
input filter requirements.
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