Sharp LC-19A1E (serv.man5) Service Manual ▷ View online
LC-19A1E-BK/WH
5 – 10
2.2. IC803 (VHiS24CS64A-1Y)
2.2.1 Block Diagram
2.2.2 Pin Connections and short description
M22
FVSS1
—
Ground for Flash memory
GND
N20
FVSS2
—
Ground for Flash memory
GND
A18
IVDD
—
Buffer power supply (3.3V) in an audio multiplex decoder I /O
B3.3V
B18
IVSS
—
Buffer ground in an audio multiplex decoder
GND
C18
DVDD
—
Digital core power supply (1.5V) in an audio multiplex decoder
B1.5V
D18
DVSS
—
Digital core ground for an audio multiplex decoder
GND
A22
AVDD_AD
—
A/D converter core power supply (3.3V) in an audio multiplex decoder
B3.3V
B21
AVSS_AD
—
A/D converter core ground in an audio multiplex decoder
GND
B22
AVDD_DA
—
D/A converter core power supply (3.3V) in an audio multiplex decoder
B3.3V
C21
AVSS_DA
—
D/A converter core ground in an audio multiplex decoder
GND
Pin No.
Pin Name
I/O
Pin Function
1
A0
I
Slave address input A0
2
A1
I
Slave address input A1
3
A2
I
Slave address input A2
4
GND
—
Ground.
5
SDA
I/O
Serial data input/output
6
SCL
I
Serial clock input.
7
WP
I
Write protect input
VCC Connection: Protect effective
GND Connection: Protect uneffective
VCC Connection: Protect effective
GND Connection: Protect uneffective
8
VCC
—
Power supply.
Pin No.
Pin Name
I/O
Pin Function
sheet name
LC-19A1E-BK/WH
5 – 11
2.3. IC2001 (VHiPST8229N-1Y)
2.3.1 Block Diagram
2.3.2 Pin Connections and short description
Pin No.
Pin Name
I/O
Pin Function
1
OUT
O
Reset Signal Output Pin.
2
VDD
—
VDD Pin / Voltage Detect Pin
3
GND
—
Ground.
4
N,C
—
No Connection.
5
N,C
—
No Connection.
LC-19A1E-BK/WH
5 – 12
2.4. IC2002 (RH-iXC165WJZZQ)
2.4.1 Block Diagram
2.4.2 Pin Connections and short description
Pin No.
Port
Pin Name
I/O
Pin Function
Seet Name
1
P3_3
SSI
I
System storage data input.
OPEN
2
P3_4
SDA1
I/O
I2C CH1 DATA (EEPROM)
SDA1
3
MODE
I
MODE selecting signal for update (Connecting with VCC through resistance)
MODE
4
P4_3
XCIN
I
XCIN Clock Input
OPEN
5
P4_4
XCOUT
O
XCIN Clock output
OPEN
6
RESET
I
Reset Input
RESET-IN
7
P4_7
XOUT
O
XOUT Clock output
XOUT
8
VSS
-
Ground
VSS
9
P4_6
XIN
I
XIN Clock Input
XIN
10
VCC
-
Power Supply Input
VCC
11
P5_4
CEC_O
O
CEC Output
OPEN
12
P5_3
CEC_I
I
CEC Input
OPEN
13
P5_2
AV_LINK_O
O
AV_LINK Output
OPEN
14
P5_1
AV_LINK_I
I
AV_LINK Input
OPEN
15
P5_0
MUTE_ALL
O
Audio MUTE signal
MUTE_ALL
16
P2_7
LED_R
O
LED Control (Power LED Red)
PowR-LED
17
P2_6
LED_G
O
LED Control (Power LED Green)
PowG-LED
18
P2_5
LED_OPC
O
LED Control (OPC LED)
LED-OPC
LC-19A1E-BK/WH
5 – 13
19
P2_4
L_R
O
Right and left reversing signal
OPEN
20
P2_3
U_D
O
Upper and lower reversing signal
OPEN
21
P2_2
SYNC_DET
O
PC Power Management Setting
OPEN
22
P2_1
PC-V
I
PC Signal Vertical Sync Frequency Judgement
PC-V
23
P2_0
PC-H
I
PC Signal Horizontal Sync Frequency Judgement
PC-H
24
P1_7
PC_WARKUP
I
Detecting Existence of PC Signal Vertical Signal
PC-WARKUP
25
P1_6
RS_ON
O
Power control signal for RS232C IC
RS-ON
26
P1_5
RXD0
I
no connection
OPEN
27
P1_4
TXD0
O
no connection
OPEN
28
P8_6
IR_PASS
O
Remote Control Signal External Through Switching
IREM_SW
29
P8_5
CTRL1 (POWout)
O
Power control signal (for Q701)
POW
30
P8_4
POWIN
I
DC/DC Startup Detection
B3.3V
31
P8_3
CTRL2
(DVP33_CTRL)
(DVP33_CTRL)
O
DVP3.3V Power Control signal Output
OPEN
32
P8_2
DVP15_IN
I
Detecting DVP1.5V Power Supply
B1.5V
33
P8_12
MRDY(L)
I
Bus Opening for Process (L=bus open)
OPEN
34
P8_0
EEP_STOP_O
O
Control signal that prohibits accessing common EEPROM
E2P-STOP
35
P6_0
AC_CTL
O
Power Unit Control signal (SLEEP Mode)
AC-CTL
36
P4_5
IREM1(RC)
I
Remote Control Input
R/C
37
P6_6
TXD1
O
Transmitted Data signal (at RS232C/includes for process)
TXD
38
P6_7
RXD1
I
Received Data signal (at RS232C/includes for process)
RXD
39
P6_5
DVP_CS
O
DVP-M2 Microcomputer Communication (Chip Enable)
DVP-INT
40
P6_4
DVP_TXD2
I
DVP-M2 Microcomputer Communication (DATA Signal Input)
DVP-TXD
41
P6_3
DVP_RXD2
O
Communication signal between DVP-M2 and microcomputer
(DATA Signal Output)
(DATA Signal Output)
DVP-RXD
42
P3_1
DDC_RESET
O
Image Relation IC Reset Output (DVP-M2)
DDC_RESET
43
P3_0
SDAO
I/O
I2C CH0 SDA (EEPROM (For POWER))
SDA
44
P3_6
SCLO
I
I2C CH0 SCL (EEPROM (For POWER))
SCL
45
P3_2
DVP_REQ
O
Communication signal between DVP-M2 and microcomputer
(Demands Communication)
(Demands Communication)
DVP-REQ
46
P1_3
POW_SW
I
Main power switch control signal
STB POW
47
P1_2
KEY 1
I
Main Unit Key Input 1
OPEN
48
P1_1
KEY 2
I
Main Unit Key Input 2
OPEM
49
P1_0
PSIZ_H
I
Mounting distinction (Panel size)
BU3.3V
50
P0_0
AREA
I
Mounting distinction (Destination)
REGION
51
P0_1
(QSTEMP)
I
Thermistor Input (Panel Temperature)
OPEN
52
P0_2
(FRAME)
O
QS Drive Bank Switching (50/60Hz)
OPEN
53
P0_3
(QS_ON)
O
QS Drive ON/OFF signal
OPEN
54
P0_4
(QS_TEMP 1)
O
QS Drive Temperature Control 1
OPEN
55
P6_2
(QS_TEMP 2)
O
QS Drive Temperature Control 2
OPEN
56
P6_1
(QS_TEMP 3)
O
QS Drive Temperature Control 3
OPEN
57
P0_5
(OPC)
I
Brightness Censer Input
OPEN
58
P0_6
VBRT
O
Dimming Control (Analogue Dimming)
VBRT
59
VSS
-
Ground.
Ground
60
P0_7
COM_BIAS
O
Output signal for common bias adjustment
CS_ADD
61
VREF
-
A/D,D/A Converter Standard Voltage Input signal
V REF
62
VCC
-
Power Supply Input
BU3.3V
63
P3_7
(U_D)
O
Upper and lower reversing signal
OPEN
64
P3_5
SCL 1
I
I2C CH1 clock (E2PROM)
SCL 1
Pin No.
Port
Pin Name
I/O
Pin Function
Seet Name
Click on the first or last page to see other LC-19A1E (serv.man5) service manuals if exist.