Sharp 21HT-15 (serv.man4) Service Manual ▷ View online
18
21HT-15H
ICs ADITIONAL INFORMATION:TDA9350(IC801)
QUICK REFERENCE DATA
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
Supply
V
P
supply voltages
−
8.0/3.3
−
V
I
P
supply current
−
135/60
−
mA
Input voltages
V
iVIFrms)
video IF amplifier sensitivity (RMS value)
−
75
−
µ
V
V
iSIF(rms)
QSS sound IF amplifier sensitivity (RMS value)
−
60
−
µ
V
V
iAUDIO(rms)
external audio input (RMS value)
−
500
−
mV
V
iCVBS(p-p)
external CVBS/Y input (peak-to-peak value)
−
1.0
−
V
V
iCHROMA(p-p)
external chroma input voltage (burst amplitude)
(peak-to-peak value)
(peak-to-peak value)
−
0.3
−
V
V
iRGB(p-p)
RGB inputs (peak-to-peak value)
−
0.7
−
V
V
iYIN(p-p)
luminance input signal (peak-to-peak value)
−
1.4
−
V
V
iUVIN(p-p)
U/V input signal (peak-to-peak value)
−
1.33/1.05
−
V
Output signals
V
o(IFVO)(p-p)
demodulated CVBS output (peak-to-peak value)
−
2.5
−
V
V
o(QSSO)(rms)
sound IF intercarrier output in QSS versions (RMS value)
−
100
−
mV
V
o(AMOUT)(rms)
demodulated AM sound output in QSS versions (RMS
value)
value)
−
500
−
mV
I
o(AGCOUT)
tuner AGC output current range
0
−
5
mA
V
oRGB(p-p)
RGB output signal amplitudes (peak-to-peak value)
−
2.0
−
V
I
oHOUT
horizontal output current
10
−
−
mA
I
oVERT
vertical output current (peak-to-peak value)
1
−
−
mA
I
oEWD
EW drive output current
1.2
−
−
mA
handbook, halfpage
XXX
MXXxxx
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
Pin configuration (SDIP 64)
TDA935X/6X/8X PS/N2
P1.3/T1
P1.6/SCL
P1.7/SD
A
P2.0/TPMW
P3.0/ADC0
P3.1/ADC1
P3.2/ADC2
P3.3/ADC3
VSSC/P
P0.5
P0.6
VSSA
SECPLL
VP2
DECDIG
HOUT
FBISO
PH2LF
PH1LF
GND3
A
VL/EWD
VDRB
VDRA
IFIN1
IFIN2
EHT
O
IREF
VSC
TUNERA
GC
A
UDEEM/SIFIN1
DECSDEM/SIFIN2
PLLIF
IFV
O/SV
O
DECBG
CVBSINT
VP1
CHR
OMA
CVBS/Y
GND1
A
UDOUT/AMOUT
A
VL/SNDIF/
BLKIN
BO
GO
RO
BCLIN
R2/VIN
B2/UIN
G2/YIN
INSSW2
VDD
A
VPE
VDDC
OSCGND
XT
ALIN
XT
ALOUT
RESET
VDDP
P1.0/INT1
P1.1/T0
P1.2/INT0
GND2
AMOUT
A
UDEXT/QSSO/
SNDPLL/SIFAGC
REFO/AMOUT
19
21HT-15H
ICs ADITIONAL INFORMATION:TDA9350(IC801)
BLOCK DIAGRAM
SOUND
TRAP
TUNERA
GC
+8V
HOUT
V
-DRIVE
RO
GO
B0
BCLIN
BLKIN
CVBS/Y
IFIN
AUDOUT
AUDEXT
Block diagram TDA935X/6X8X PS/N2 with mono intercarrier sound demodulator
CHR
OMA
SD
A
SCL
VISION IF
ALIGNMENT-FREE
PLL DEMOD.
AGC/AFC
VIDEO AMP.
VIDEO SWITCH
VIDEO IDENT.
VIDEO FILTERS
PAL/SECAM/NTSC
DECODER
DEEMPHASIS
AUDIO SWITCH
(AVL)
VOLUME CONTROL
BASE-BAND
DELAY LINE
H/V SYNC SEP.
H-OSC. + PLL
H-DRIVE
2
nd
LOOP
H-SHIFT
V-DRIVE +
CONTR/BRIGHTN
OSD/TEXT INSERT
CCC
WHITE-P. ADJ.
80C51 CPU
I
2
C-BUS
TRANSCEIVER
ROM/RAM
TELETEXT
ACQUISITION
1/10 PAGE
MEMORY
TELETEXT/OSD
DISPLAY
RG
B
BL
Y
U
V
H
V
REF
ENHANCED
VST PWM-DAC
VST OUT
I/O PORTS
I/O PORTS (4x)
+3.3 V
RESET
LED OUT (2x)
ADC IN (4x)
VPE
(EW GEOMETRY)
GEOMETRY
EHTO
EWD
R/V
G/Y
B/U
BL
RGB/YUV INSERT
R
GB
REF
CVBS
SYNC
H
V
COR
27
37
38
33
(20)
29
28
34
44
60
55
59
58
57
10/11
2
34
5-8
1+62-64
9
12
54
56
61
51
52
53
49
50
45
48
47
46
(20)
36
21
22
26
25
16
35
17
31
15
19
14
39
18
41
(32)
13
43
42
40
24
23
RGB/YUV MATRIX
SATURATION
YUV/RGB MATRIX
30
LUMA DELAY
PEAKING
BLACK STRETCH
AGC CIRCUIT
NARROW BAND
PLL
DEMODULATOR
(32)
(32)
SNDIF
20
21HT-15H
ICs ADITIONAL INFORMATION:TDA9350(IC801)
PINNING
SYMBOL
PIN
DESCRIPTION
P1.3/T1
1
port 1.3 or Counter/Timer 1 input
P1.6/SCL
2
port 1.6 or I
2
C-bus clock line
P1.7/SDA
3
port 1.7 or I
2
C-bus data line
P2.0/TPWM
4
port 2.0 or Tuning PWM output
P3.0/ADC0
5
port 3.0 or ADC0 input
P3.1/ADC1
6
port 3.1 or ADC1 input
P3.2/ADC2
7
port 3.2 or ADC2 input
P3.3/ADC3
8
port 3.3 or ADC3 input
VSSC/P
9
digital ground for
µ
-Controller core and periphery
P0.5
10
port 0.5 (8 mA current sinking capability for direct drive of LEDs)
P0.6
11
port 0.6 (8 mA current sinking capability for direct drive of LEDs)
VSSA
12
analog ground of Teletext decoder and digital ground of TV-processor
SECPLL
13
SECAM PLL decoupling
VP2
14
2
nd
supply voltage TV-processor (+8V)
DECDIG
15
decoupling digital supply of TV-processor
PH2LF
16
phase-2 filter
PH1LF
17
phase-1 filter
GND3
18
ground 3 for TV-processor
DECBG
19
bandgap decoupling
AVL/EWD
(1)
20
Automatic Volume Levelling /East-West drive output
VDRB
21
vertical drive B output
VDRA
22
vertical drive A output
IFIN1
23
IF input 1
IFIN2
24
IF input 2
IREF
25
reference current input
VSC
26
vertical sawtooth capacitor
TUNERAGC
27
tuner AGC output
AUDEEM/SIFIN1
(1)
28
audio deemphasis or SIF input 1
DECSDEM/SIFIN2
(1)
29
decoupling sound demodulator or SIF input 2
GND2
30
ground 2 for TV processor
SNDPLL/SIFAGC
(1)
31
narrow band PLL filter /AGC sound IF
AVL/SNDIF/REF0/
AMOUT
AMOUT
(1)
32
Automatic Volume Levelling / sound IF input / subcarrier reference output /AM output
(non controlled)
(non controlled)
HOUT
33
horizontal output
FBISO
34
flyback input/sandcastle output
AUDEXT/
QSSO/AMOUT
QSSO/AMOUT
(1)
35
external audio input /QSS intercarrier out /AM audio output (non controlled)
EHTO
36
EHT/overvoltage protection input
PLLIF
37
IF-PLL loop filter
IFVO/SVO
38
IF video output / selected CVBS output
VP1
39
main supply voltage TV-processor (+8 V)
CVBSINT
40
internal CVBS input
GND1
41
ground 1 for TV-processor
CVBS/Y
42
external CVBS/Y input
CHROMA
43
chrominance input (SVHS)
AUDOUT /AMOUT
(1)
44
audio output /AM audio output (volume controlled)
21
21HT-15H
ICs ADITIONAL INFORMATION:TDA9350(IC801)
Note
1. The function of pin 20, 28, 29, 31, 32, 35 and 44 is dependent on the IC version (mono intercarrier FM demodulator
/ QSS IF amplifier and East-West output or not) and on some software control bits. The valid combinations are given
in table 1.
in table 1.
2. The vertical guard function can be controlled via pin 49 or pin 50. The selection is made by means of the IVG bit in
subaddress 2BH.
Table 1
Pin functions for various versions
Note
1. When additional (external) selectivity is required for FM-PLL system pin 32 can be used as sound IF input. This
function is selected by means of SIF bit in subaddress 28H.
2. The reference output signal is only available for the CMB1/CMB0 setting of 0/1. For the other settings this pin is a
switch output (see also table 67).
INSSW2
45
2
nd
RGB / YUV insertion input
R2/VIN
46
2
nd
R input / V (R-Y) input
G2/YIN
47
2
nd
G input / Y input
B2/UIN
48
2
nd
B input / U (B-Y) input
BCLIN
49
beam current limiter input / (V-guard input, note 2)
BLKIN
50
black current input / (V-guard input, note 2)
RO
51
Red output
GO
52
Green output
BO
53
Blue output
VDDA
54
analog supply of Teletext decoder and digital supply of TV-processor (3.3 V)
VPE
55
OTP Programming Voltage
VDDC
56
digital supply to core (3.3 V)
OSCGND
57
oscillator ground supply
XTALIN
58
crystal oscillator input
XTALOUT
59
crystal oscillator output
RESET
60
reset
VDDP
61
digital supply to periphery (+3.3 V)
P1.0/INT1
62
port 1.0 or external interrupt 1 input
P1.1/T0
63
port 1.1 or Counter/Timer 0 input
P1.2/INT0
64
port 1.2 or external interrupt 0 input
IC version
FM-PLL version
QSS version
East-West Y/N
N
Y
N
Y
CMB1/CMB0 bits
00
01/10/11
00
01/10/11
00
01/10/11
00
01/10/11
AM bit
−
−
−
−
−
0
1
−
0
1
Pin 20
AVL
EWD
AVL
EWD
Pin 28
AUDEEM
SIFIN1
Pin 29
DECSDEM
SIFIN2
Pin 31
SNDPLL
SIFAGC
Pin 32
SNDIF
(1)
REFO
(2)
AVL/SNDIF
(1)
REFO
(2)
AMOUT
REFO
(2)
AMOUT
REFO
(2)
Pin 35
AUDEXT
AUDEXT QSSO AMOUT AUDEXT QSSO AMOUT
Pin 44
AUDOUT
controlled AM or audio out
SYMBOL
PIN
DESCRIPTION
Display
