Sharp MX-M850 (serv.man8) Service Manual ▷ View online
MX-M1100 BLOCK DIAGRAM / ブロック図 1 – 1
MX-M1100
Circuit Diagram
[1] BLOCK DIAGRAM / ブロック図
1. SYSTEM BLOCK DIAGRAM / システムブロック図
A. ENGINE / エンジン
FPGM
VPM
PCU
PWB
MM
FUM
DVM
DM
MM2
DSW
-F
CFM-DC1
CFM-DC2
CFM-DC3
TANSET
P
A
PER
FEED
u
n
3
C3LUD
C3PFD
C3SPD
C3PED
P
A
PER
FEED
u
n
4
C4PED
C4LUD
C4SPD
C4PFD
C4PWS
AC
PWB
DHSW
to
W-ICU
PWB
RTH1
TRM
C4SS1
-
4
DRIVER
PWB(T)
PAPER
FEED
un
2
C2LUM
C2PUS
C2SPD
C2LUD
C2PED
C1PPD1
C1PPD2
C1PFD
PAPER
FEED
u
n
1
RTH2
OPTION
COIN
VENDER
PNC
MANUALPAPER
FEED
un
MT
OP1
MPLD1
MT
OP2
MPFPWS
MFPUS
MPED
MPFD1
MPFGS
DSW
-R
TLS
TLS2
CFMCL1
CFMCL2
CFMCL3
CFMCL4
FM-DV1
CFM-DV1
MCCM
MCHPS1
MC
un
PROCESS
u
n
VFM-EX
LSU
LSU
C
NT
PWB
VFM-EX1
VFM-EX2
LD
PWB
BD
PWB
PGM
CFM-PO1
FUSING
un
HUS-RA/TH-RA
W
FEED
SENSORPWB
PDFS1
PDFS2
HVR2
PPD4
PPD3
PPD2
PSM
Transfer
un
FURM
AC
AC
POD
Delivery
un
POM
DRIVER
PWB(O)
C1SPD
C1PUS
C1LUD
C1PED
C1LUM
PRTH
LPFD1
TCS
DEVELOPER
u
n
DVCH
BOTTLE
un
CRUM
BOTD
BOTM
APPD1
APPD2
APPD3
ASRM
ADM1
ADM2
ADUCS
DSBD1
DSBD2
DCPS_1
(SUB)
to
HDD
to
MFPC/W
-ICU
WH
PWB
to
SCN
u
n
Te
r
P
W
B
AC
T
A
P
(OPTION)
DCPS_3
HL
PWB
DCPS_2
(MAIN)
TNF
TNBOX
MPFTC
TURS
PED
C
IS
CNT
PWB
CIS
u
n
CFMPS
DSW
-CS
Saddle
u
n
GBC
FINISHER
AC
AC
T
A
P
INSER
TER
WH-TRA
Y3
WH-TRA
Y4
WH-LCC
A3
LCC
A4
LCC
WH-LCC
WH-LCC
WH-LCC
Large
Capacity
Three
Trays
A4
A3
SBRM
CFM-ADU1a
CFM-ADU1b
CFM-ADU2a
CFM-ADU2b
Folding
un
Large
Capacity
Three
Trays
FDSBD
ADU
POIND
POSBC
ASBC
Transport
section
APFD1
APFD2
(Japan
&
E
urope
85ppm)
PS
un
CFM-PA1
DL1
HL1
HL2
HL3
HL4
(Jap
an
85ppm)
FPGHP
WEBM
WEBED
WEBSPD
MSW
CFM-PS
DESS
PSPS
PCS
TH-CL/HUS-CL
LCCPTC
VPPD
PPD1
VPTC3
VPTC2
C1PFC
C2PFC
C3PFC
C3LUM
C3PUS
VPTC1
C4PFC
C4LUM
C4PUS
C2PFD
C1PTC
POCS
BOTSW
HV(MAIN)
HV(SUB)
C3SS1
-
4
from
W
-ICU
P
WB
CFM-TR
(touch)
RTH1
110/95ppm
PTDL1
TM1
TM2
TFSD
HOPPER
un
FRS
INT
P
WB
INT
P
WB
MX-M1100 BLOCK DIAGRAM / ブロック図 1 – 2
B. CONTROL BOX, SCANNER UNIT, OPERATION UNIT, DSPF UNIT /
コントロールボックス、スキャナユニット、操作ユニット、
DSPF ユニット
LAN
USB
USB
HOST
FM-CTL1
SCANNER
u
nit
CL-SCN
SCN-INV
PWB
AFE
PWB
CCD
PWB
OPSW
SCN-MOTHER
PWB
K
EY
PWB
OCSW
MHPS
SCN-cnt
PWB
CCDFAN
MFP-OPE
PWB
LCD-BL
LCD-INV
PWB
LCD
TOUCH
PANEL
DSPF
unit
CL-DSPF
DSPF-cnt
PWB
DSPF-DFS
PWB
DSPF-Driver
PWB
SPFM
SPSM
SPFFAN1
SPFFAN2
SPUM
SRRM
SRPM
SPED
SPLS1
SPLS2
SPLS3
SPWS
SPWD
STUD
SPPD1
SPRDMD1
SPRDMD2
SPOM
SLUM
SDFS1
SDFS2
SRFM
W-ICU
PWB
FAX
Option
OPERATION
unit
CNT
BOX
INV
PWB
NIC
(OPTION)
HDD
Option
CARD
READER
MIM
CLFAN
SCLTH
CCD/AFE
PWB
SPPD5
SPPD3
SPPD4
SLCOV
SOCD
SPPD
7
SPPD
6
SCOV
SPPD2
STLD
SPOD
SRDPUD
STMPS1
from
WH-PWB
PD1
PD2
PD4
PD5
PD
6
PD
7
PD8
PD9
to
LSU
CNT
PWB
MFPC
PWB
AC
EFI
FM-HDD
PIC
PWB
WH-SCN
INFO-LED
G
PWB
INFO-LED
R
PWB
to
PCU
PWB
110/95ppm
EFI
I/F
PWB
(OPTION)
MX-M1100 CIRCUIT DIAGRAM / 回路図 2 – 1
MX-M1100
Circuit Diagram
[2] CIRCUIT DIAGRAM / 回路図
1. W-ICU PWB
ICU1_DDR1_CLK6_P
ICU1_DDR1_CLK6_N
ICU1_DDR1_CLK6_N
ICU1_DDR1_CLK1_P
ICU1_DDR1_CLK4_P
ICU1_DDR1_CLK4_N
ICU1_DDR1_CLK4_N
ICU1_DDR1_CLK1_N
ICU1_DDR1_CLK5_P
ICU1_DDR1_CLK2_P
ICU1_DDR1_CLK2_N
ICU1_DDR1_CLK2_N
ICU1_DDR1_CLK3_P
ICU1_DDR1_CLK3_N
ICU1_DDR1_CLK3_N
ICU1_DDR1_CLK5_N
ICU1_DDR1_CS2
ICU1_DDR1_CS4
ICU1_DDR1_CS3
ICU1_DDR1_CS1
ICU1_DDR1_CLK6_P
ICU1_DDR1_CLK6_N
ICU1_DDR1_CLK6_N
ICU1_DDR1_BA0
ICU1_DDR1_BA1
ICU1_DDR1_BA1
ICU1_DDR1_CLK1_P
ICU1_DDR1_CLK4_P
ICU1_DDR1_CLK4_N
ICU1_DDR1_CLK4_N
ICU1_DDR1_CLK1_N
ICU1_DDR1_CLK5_P
ICU1_DDR1_CLK2_P
ICU1_DDR1_CLK2_N
ICU1_DDR1_CLK2_N
ICU1_DDR1_CLK3_P
ICU1_DDR1_CLK3_N
ICU1_DDR1_CLK3_N
ICU1_DDR1_WE
ICU1_DDR1_CAS
ICU1_DDR1_RAS
ICU1_DDR1_CKE1
ICU1_DDR1_CKE2
ICU1_DDR1_CKE2
ICU1_DDR1_CKE4
ICU1_DDR1_CKE3
ICU1_DDR1_AD1
ICU1_DDR1_AD0
ICU1_DDR1_AD0
ICU1_DDR1_AD7
ICU1_DDR1_AD13
ICU1_DDR1_AD6
ICU1_DDR1_AD12
ICU1_DDR1_AD11
ICU1_DDR1_AD10
ICU1_DDR1_AD9
ICU1_DDR1_AD11
ICU1_DDR1_AD10
ICU1_DDR1_AD9
ICU1_DDR1_AD5
ICU1_DDR1_AD8
ICU1_DDR1_AD4
ICU1_DDR1_AD3
ICU1_DDR1_AD2
ICU1_DDR1_AD3
ICU1_DDR1_AD2
ICU1_DDR1_CLK5_N
ICU1_DDR1_CS2
ICU1_DDR1_CS4
ICU1_DDR1_CS4
ICU1_DDR1_CS3
ICU1_DDR1_CS1
ICU1_DDR1_BA0
ICU1_DDR1_BA1
ICU1_DDR1_WE
ICU1_DDR1_CAS
ICU1_DDR1_RAS
ICU1_DDR1_CAS
ICU1_DDR1_RAS
ICU1_DDR1_AD1
ICU1_DDR1_AD0
ICU1_DDR1_AD7
ICU1_DDR1_AD13
ICU1_DDR1_AD6
ICU1_DDR1_AD12
ICU1_DDR1_AD11
ICU1_DDR1_AD10
ICU1_DDR1_AD9
ICU1_DDR1_AD5
ICU1_DDR1_AD8
ICU1_DDR1_AD4
ICU1_DDR1_AD3
ICU1_DDR1_AD2
ICU1_DDR1_CKE1
ICU1_DDR1_CKE2
ICU1_DDR1_CKE2
ICU1_DDR1_CKE4
ICU1_DDR1_CKE3
ICU1_DDR1_CLK6_P
ICU1_DDR1_CLK6_N
ICU1_DDR1_CLK6_N
ICU1_DDR1_CLK1_P
ICU1_DDR1_CLK4_P
ICU1_DDR1_CLK4_N
ICU1_DDR1_CLK4_N
ICU1_DDR1_CLK1_N
ICU1_DDR1_CLK5_P
ICU1_DDR1_CLK2_P
ICU1_DDR1_CLK2_N
ICU1_DDR1_CLK2_N
ICU1_DDR1_CLK3_P
ICU1_DDR1_CLK3_N
ICU1_DDR1_CLK3_N
ICU1_DDR1_CLK5_N
GND
DDR1_VREF
+2.5V_ICU1DDR
GND
DDR1_CS1
(4)
DDR1_WE
(4)
DDR1_RAS
(4)
DDR1_CAS
(4)
DDR1_CKE1
(4)
DDR1_CS2
(4)
DDR1_CS3
(4)
DDR1_CS4
(4)
DDR1_CKE2
(4)
DDR1_CKE3
(4)
DDR1_CKE4
(4)
DDR1_BA0
(4)
DDR1_BA1
(4)
DDR1_AD1
(4)
DDR1_AD0
(4)
DDR1_AD2
(4)
DDR1_AD3
(4)
DDR1_AD4
(4)
DDR1_AD5
(4)
DDR1_AD6
(4)
DDR1_AD7
(4)
DDR1_AD8
(4)
DDR1_AD9
(4)
DDR1_AD10
(4)
DDR1_AD11
(4)
DDR1_AD12
(4)
DDR1_AD13
(4)
DDR1_CLK1_N
(4)
DDR1_CLK1_P
(4)
DDR1_CLK2_N
(4)
DDR1_CLK2_P
(4)
DDR1_CLK3_N
(4)
DDR1_CLK3_P
(4)
DDR1_CLK4_N
(4)
DDR1_CLK4_P
(4)
DDR1_CLK5_N
(4)
DDR1_CLK5_P
(4)
DDR1_CLK6_N
(4)
DDR1_CLK6_P
(4)
R1064
22J
R96
22J
C1111
8pF(CH)
R89
47J
CP135
C110
7
10000pF(F
))
AS1
W-ICU_PWB
R87
22J
R97
22J
R92
47J
C1115
8pF(CH)
R1043
10J
C65
8pF(CH)
R94
47J
R1041
10J
R1061
49.9F
8
1
7
2
6
3
5
4
BR54
10Jx4
C1116
8pF(CH)
C66
8pF(CH)
R88
22J
C1112
8pF(CH)
AS5
A_FIN_ICU
C110
6
0
.1uF(F
))
8
1
7
2
6
3
5
4
BR1035
47Jx4
C1119
10000pF(F
))
CP133
CP133
R1066
22J
C69
8pF(CH)
CP134
C1114
8pF(CH)
R1067
22J
C70
8pF(CH)
R91
22J
C1108
1000pF(B
))
C1118
1000pF(B
))
C1113
8pF(CH)
8
1
7
2
6
3
5
4
BR1036
10Jx4
CP138
R93
22J
C67
8pF(CH)
8
1
7
2
6
3
5
4
BR55
10Jx4
R90
47J
CP137
R1068
22J
R1065
22J
R1069
22J
C68
8pF(CH)
8
1
7
2
6
3
5
4
BR56
10Jx4
SDBA0
D18
SDBA1
E18
SDCAS_N
B19
SDCKE0
F15
SDCKE1
C12
SDCKE2
D11
SDCKE3
D20
SDCKE4
E21
SDCLK0
D13
SDCLK1
B18
SDCLK2
B17
SDCLK3
B16
SDCLK4
A15
SDCLK5
A14
SDCLK6
A13
SDCS_N0
F16
SDCS_N1
F14
SDCS_N2
F13
SDCS_N3
C19
SDCS_N4
D19
S
S
S
S
S
S
S
S
S
S
S
S
S
S
SDRAS_N
A19
SDWE_N
A20
S
S
SDCLK_N0
E13
SDCLK_N1
A18
SDCLK_N2
A17
SDCLK_N3
A16
SDCLK_N4
B15
SDCLK_N5
B14
SDCLK_N6
B13
PAD_DDR_VREF[1]
C2
PAD_DDR_VREF[0]
C29
PAD_BZVDD_DDR
D29
PAD_BZRST_DDR
D30
SDA13
F17
SDA12
B11
SDA11
A12
SDA10
E17
SDA9
B12
SDA8
D14
SDA7
E14
SDA6
C15
SDA5
D15
SDA4
E15
SDA3
C16
SDA2
D16
SDA1
E16
SDA0
D17
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
ICU ASIC 1/7
DDR
2004 11 17 fixed
Symbol Type-B
Symbol Type-B
IC20A
ICU_ASIC
IC20A
R1042
10J
C111
7
0
.1uF(F
))
8
8
7
7
6
6
5
5
D
C
B
A
W-ICU PWB (ICU1 (1) (DDR))
MX-M1100 CIRCUIT DIAGRAM / 回路図 2 – 2
ICU1_DDR_DQ62
ICU1_DDR_DQ61
ICU1_DDR_DQ60
ICU1_DDR_DQ59
ICU1_DDR_DQ58
ICU1_DDR_DQ57
ICU1_DDR_DQ56
ICU1_DDR_DQ61
ICU1_DDR_DQ60
ICU1_DDR_DQ59
ICU1_DDR_DQ58
ICU1_DDR_DQ57
ICU1_DDR_DQ56
ICU1_DDR_DQ63
ICU1_DDR_DQ47
ICU1_DDR_DQ46
ICU1_DDR_DQ45
ICU1_DDR_DQ44
ICU1_DDR_DQ43
ICU1_DDR_DQ42
ICU1_DDR_DQ41
ICU1_DDR_DQ40
ICU1_DDR_DM5
ICU1_DDR_DQS5
ICU1_DDR_DQ46
ICU1_DDR_DQ45
ICU1_DDR_DQ44
ICU1_DDR_DQ43
ICU1_DDR_DQ42
ICU1_DDR_DQ41
ICU1_DDR_DQ40
ICU1_DDR_DM5
ICU1_DDR_DQS5
ICU1_DDR_DQS2
ICU1_DDR_DM2
ICU1_DDR_DQ23
ICU1_DDR_DQ22
ICU1_DDR_DQ21
ICU1_DDR_DQ20
ICU1_DDR_DQ19
ICU1_DDR_DQ18
ICU1_DDR_DQ22
ICU1_DDR_DQ21
ICU1_DDR_DQ20
ICU1_DDR_DQ19
ICU1_DDR_DQ18
ICU1_DDR_DQ16
ICU1_DDR_DQ17
ICU1_DDR_DQ39
ICU1_DDR_DQ38
ICU1_DDR_DQ37
ICU1_DDR_DQ36
ICU1_DDR_DQ35
ICU1_DDR_DQ34
ICU1_DDR_DQ33
ICU1_DDR_DQ32
ICU1_DDR_DQ38
ICU1_DDR_DQ37
ICU1_DDR_DQ36
ICU1_DDR_DQ35
ICU1_DDR_DQ34
ICU1_DDR_DQ33
ICU1_DDR_DQ32
ICU1_DDR_DQS4
ICU1_DDR_DM4
ICU1_DDR_DQS1
ICU1_DDR_DQ12
ICU1_DDR_DQ11
ICU1_DDR_DQ11
ICU1_DDR_DM1
ICU1_DDR_DQ10
ICU1_DDR_DQ9
ICU1_DDR_DQ8
ICU1_DDR_DQ9
ICU1_DDR_DQ8
ICU1_DDR_DQ15
ICU1_DDR_DQ14
ICU1_DDR_DQ13
ICU1_DDR_DQ14
ICU1_DDR_DQ13
ICU1_DDR_DQ55
ICU1_DDR_DQ54
ICU1_DDR_DQ53
ICU1_DDR_DQ52
ICU1_DDR_DQ51
ICU1_DDR_DQ50
ICU1_DDR_DQ49
ICU1_DDR_DQ48
ICU1_DDR_DQ54
ICU1_DDR_DQ53
ICU1_DDR_DQ52
ICU1_DDR_DQ51
ICU1_DDR_DQ50
ICU1_DDR_DQ49
ICU1_DDR_DQ48
ICU1_DDR_DQS7
ICU1_DDR_DM7
ICU1_DDR_DQ6
ICU1_DDR_DQ5
ICU1_DDR_DQ4
ICU1_DDR_DQ3
ICU1_DDR_DQ2
ICU1_DDR_DQ1
ICU1_DDR_DQ0
ICU1_DDR_DQ5
ICU1_DDR_DQ4
ICU1_DDR_DQ3
ICU1_DDR_DQ2
ICU1_DDR_DQ1
ICU1_DDR_DQ0
ICU1_DDR_DQ7
ICU1_DDR_DM3
ICU1_DDR_DQS3
ICU1_DDR_DQS3
ICU1_DDR_DM0
ICU1_DDR_DQS0
ICU1_DDR_DQS0
ICU1_DDR_DQS6
ICU1_DDR_DM6
ICU1_DDR_DQ27
ICU1_DDR_DQ26
ICU1_DDR_DQ25
ICU1_DDR_DQ24
ICU1_DDR_DQ26
ICU1_DDR_DQ25
ICU1_DDR_DQ24
ICU1_DDR_DQ31
ICU1_DDR_DQ30
ICU1_DDR_DQ29
ICU1_DDR_DQ28
ICU1_DDR_DQ30
ICU1_DDR_DQ29
ICU1_DDR_DQ28
ICU1_DDR_DQ62
ICU1_DDR_DQ61
ICU1_DDR_DQ60
ICU1_DDR_DQ59
ICU1_DDR_DQ58
ICU1_DDR_DQ57
ICU1_DDR_DQ56
ICU1_DDR_DQ61
ICU1_DDR_DQ60
ICU1_DDR_DQ59
ICU1_DDR_DQ58
ICU1_DDR_DQ57
ICU1_DDR_DQ56
ICU1_DDR_DQ63
ICU1_DDR_DQ47
ICU1_DDR_DQ46
ICU1_DDR_DQ45
ICU1_DDR_DQ44
ICU1_DDR_DQ43
ICU1_DDR_DQ42
ICU1_DDR_DQ41
ICU1_DDR_DQ40
ICU1_DDR_DM5
ICU1_DDR_DQS5
ICU1_DDR_DQ46
ICU1_DDR_DQ45
ICU1_DDR_DQ44
ICU1_DDR_DQ43
ICU1_DDR_DQ42
ICU1_DDR_DQ41
ICU1_DDR_DQ40
ICU1_DDR_DM5
ICU1_DDR_DQS5
ICU1_DDR_DQS2
ICU1_DDR_DM2
ICU1_DDR_DQ23
ICU1_DDR_DQ22
ICU1_DDR_DQ21
ICU1_DDR_DQ20
ICU1_DDR_DQ19
ICU1_DDR_DQ18
ICU1_DDR_DQ22
ICU1_DDR_DQ21
ICU1_DDR_DQ20
ICU1_DDR_DQ19
ICU1_DDR_DQ18
ICU1_DDR_DQ16
ICU1_DDR_DQ17
ICU1_DDR_DQ39
ICU1_DDR_DQ38
ICU1_DDR_DQ37
ICU1_DDR_DQ36
ICU1_DDR_DQ35
ICU1_DDR_DQ34
ICU1_DDR_DQ33
ICU1_DDR_DQ32
ICU1_DDR_DQ38
ICU1_DDR_DQ37
ICU1_DDR_DQ36
ICU1_DDR_DQ35
ICU1_DDR_DQ34
ICU1_DDR_DQ33
ICU1_DDR_DQ32
ICU1_DDR_DQS4
ICU1_DDR_DM4
ICU1_DDR_DQS1
ICU1_DDR_DQ12
ICU1_DDR_DQ11
ICU1_DDR_DQ11
ICU1_DDR_DM1
ICU1_DDR_DQ10
ICU1_DDR_DQ9
ICU1_DDR_DQ8
ICU1_DDR_DQ9
ICU1_DDR_DQ8
ICU1_DDR_DQ15
ICU1_DDR_DQ14
ICU1_DDR_DQ13
ICU1_DDR_DQ14
ICU1_DDR_DQ13
ICU1_DDR_DQ55
ICU1_DDR_DQ54
ICU1_DDR_DQ53
ICU1_DDR_DQ52
ICU1_DDR_DQ51
ICU1_DDR_DQ50
ICU1_DDR_DQ49
ICU1_DDR_DQ48
ICU1_DDR_DQ54
ICU1_DDR_DQ53
ICU1_DDR_DQ52
ICU1_DDR_DQ51
ICU1_DDR_DQ50
ICU1_DDR_DQ49
ICU1_DDR_DQ48
ICU1_DDR_DQS7
ICU1_DDR_DM7
ICU1_DDR_DQ6
ICU1_DDR_DQ5
ICU1_DDR_DQ4
ICU1_DDR_DQ3
ICU1_DDR_DQ2
ICU1_DDR_DQ1
ICU1_DDR_DQ0
ICU1_DDR_DQ5
ICU1_DDR_DQ4
ICU1_DDR_DQ3
ICU1_DDR_DQ2
ICU1_DDR_DQ1
ICU1_DDR_DQ0
ICU1_DDR_DQ7
ICU1_DDR_DM3
ICU1_DDR_DQS3
ICU1_DDR_DQS3
ICU1_DDR_DM0
ICU1_DDR_DQS0
ICU1_DDR_DQS0
ICU1_DDR_DQS6
ICU1_DDR_DM6
ICU1_DDR_DQ27
ICU1_DDR_DQ26
ICU1_DDR_DQ25
ICU1_DDR_DQ24
ICU1_DDR_DQ26
ICU1_DDR_DQ25
ICU1_DDR_DQ24
ICU1_DDR_DQ31
ICU1_DDR_DQ30
ICU1_DDR_DQ29
ICU1_DDR_DQ28
ICU1_DDR_DQ30
ICU1_DDR_DQ29
ICU1_DDR_DQ28
DDR1_DQS7
(4)
DDR1_DM7
(4)
DDR1_DQS6
(4)
DDR1_DM6
(4)
DDR1_DQS5
(4)
DDR1_DM5
(4)
DDR1_DQS4
(4)
DDR1_DM4
(4)
DDR1_DQS3
(4)
DDR1_DM3
(4)
DDR1_DQS2
(4)
DDR1_DM2
(4)
DDR1_DQS1
(4)
DDR1_DM1
(4)
DDR1_DM0
(4)
DDR1_DQS0
(4)
DDR1_DQ1
(4)
DDR1_DQ2
(4)
DDR1_DQ3
(4)
DDR1_DQ4
(4)
DDR1_DQ5
(4)
DDR1_DQ6
(4)
DDR1_DQ7
(4)
DDR1_DQ0
(4)
DDR1_DQ8
(4)
DDR1_DQ9
(4)
DDR1_DQ10
(4)
DDR1_DQ11
(4)
DDR1_DQ12
(4)
DDR1_DQ13
(4)
DDR1_DQ14
(4)
DDR1_DQ15
(4)
DDR1_DQ16
(4)
DDR1_DQ17
(4)
DDR1_DQ18
(4)
DDR1_DQ19
(4)
DDR1_DQ20
(4)
DDR1_DQ21
(4)
DDR1_DQ22
(4)
DDR1_DQ23
(4)
DDR1_DQ24
(4)
DDR1_DQ25
(4)
DDR1_DQ26
(4)
DDR1_DQ27
(4)
DDR1_DQ28
(4)
DDR1_DQ29
(4)
DDR1_DQ30
(4)
DDR1_DQ31
(4)
DDR1_DQ32
(4)
DDR1_DQ33
(4)
DDR1_DQ34
(4)
DDR1_DQ35
(4)
DDR1_DQ36
(4)
DDR1_DQ37
(4)
DDR1_DQ38
(4)
DDR1_DQ39
(4)
DDR1_DQ41
(4)
DDR1_DQ42
(4)
DDR1_DQ43
(4)
DDR1_DQ44
(4)
DDR1_DQ45
(4)
DDR1_DQ46
(4)
DDR1_DQ47
(4)
DDR1_DQ40
(4)
DDR1_DQ48
(4)
DDR1_DQ49
(4)
DDR1_DQ50
(4)
DDR1_DQ51
(4)
DDR1_DQ52
(4)
DDR1_DQ53
(4)
DDR1_DQ54
(4)
DDR1_DQ55
(4)
DDR1_DQ56
(4)
DDR1_DQ57
(4)
DDR1_DQ58
(4)
DDR1_DQ59
(4)
DDR1_DQ60
(4)
DDR1_DQ61
(4)
DDR1_DQ62
(4)
DDR1_DQ63
(4)
R99
10J
R100
10J
R1044
10J
R86
10J
R1040
10J
R95
10J
R84
10J
8
1
7
2
6
3
5
4
BR1040
10Jx4
R1037
10J
8
1
7
2
6
3
5
4
BR50
10Jx4
8
1
7
2
6
3
5
4
BR52
10Jx4
8
1
7
2
6
3
5
4
BR57
10Jx4
8
1
7
2
6
3
5
4
BR1039
10Jx4
8
1
7
2
6
3
5
4
BR59
10Jx4
8
1
7
2
6
3
5
4
BR53
10Jx4
R83
10J
8
1
7
2
6
3
5
4
BR1038
10Jx4
8
1
7
2
6
3
5
4
BR1037
10Jx4
R98
10J
8
1
7
2
6
3
5
4
BR58
10Jx4
R1046
10J
8
1
7
2
6
3
5
4
BR1034
10Jx4
8
1
7
2
6
3
5
4
BR60
10Jx4
8
1
7
2
6
3
5
4
BR1033
10Jx4
R1039
10J
8
1
7
2
6
3
5
4
BR1032
10Jx4
R1047
10J
8
1
7
2
6
3
5
4
BR1031
10Jx4
R1038
10J
8
1
7
2
6
3
5
4
BR51
10Jx4
R1045
10J
R85
10J
SDDM2
A9
SDDM3
B10
SDDM4
C20
SDDM5
B22
SDDM6
F22
SDDM7
B27
SDQS0
B4
SDQS1
C5
SDQS2
E8
SDQS3
D8
SDQS4
D22
SDQS5
E23
SDQS6
A25
SDQS7
A27
SDDM0
A4
SDDM1
B7
SDQ0
F6
SDQ1
B3
SDQ2
A3
SDQ3
F7
SDQ4
B5
SDQ5
F8
SDQ6
A5
SDQ7
C7
SDQ8
D5
SDQ9
B6
SDQ10
F9
SDQ11
A6
SDQ12
E6
SDQ13
A7
SDQ14
C6
SDQ15
F10
SDQ16
E7
SDQ17
B8
SDQ18
D6
SDQ19
A8
SDQ20
D7
SDQ21
F11
SDQ22
E9
SDQ23
B9
SDQ24
D9
SDQ25
C10
SDQ26
A10
SDQ27
F12
SDQ28
D10
SDQ29
C11
SDQ30
E10
SDQ31
A11
SDQ32
D21
SDQ33
F18
SDQ34
D23
SDQ35
B20
SDQ36
A21
SDQ37
E22
SDQ38
F19
SDQ39
B21
SDQ40
D24
SDQ41
C21
SDQ42
A22
SDQ43
F20
SDQ44
A23
SDQ45
B23
SDQ46
D25
SDQ47
F21
SDQ48
E24
SDQ49
A24
SDQ50
C25
SDQ51
B24
SDQ52
E25
SDQ53
B25
SDQ54
C26
SDQ55
C24
SDQ56
D26
SDQ57
A26
SDQ58
F23
SDQ59
B26
SDQ60
F24
SDQ61
A28
SDQ62
B28
SDQ63
E26
1/7
ixed
e-B
4
4
3
3
2
2
1
1
D
C
B
A
(3) 1/33
