Sharp MX-M266N / MX-M316N / MX-M356N (serv.man7) Service Manual ▷ View online
MX-M266 CIRCUIT DIAGRAM AND PARTS LAYOUT / 回路図 と 部品配置図 2 – 12
3
3
2
2
1
1
D
C
B
A
・EN
H： Enabled
L： Disabled
0R75V_DDR_R_VREF
5V_IN
DGND
DGND
DGND
0R75V_DDR_R_VTT
1R5V_ECO
DGND
DGND
1R5V_ECO
DGND
DGND
DGND
DGND
3R3V_ECO
DGND
R_DDR_DQS2P {9}
R_DDR_DQS2N
R_DDR_DQS2N
{9}
R_DDR_DQS6N
{9}
R_DDR_DQS6P {9}
R_DDR_DQS3P {9}
R_DDR_DQS3N
R_DDR_DQS3N
{9}
R_DDR_DQS4N
{9}
R_DDR_DQS4P {9}
R_DDR_DQS7N
{9}
R_DDR_DQS7P {9}
R_DDR_DQS0P {9}
R_DDR_DQS0N
R_DDR_DQS0N
{9}
R_DDR_DQS5N
{9}
R_DDR_DQS5P {9}
R_DDR_DQS1P {9}
R_DDR_DQS1N
R_DDR_DQS1N
{9}
R_DDR_DQ[63:0]
{9}
R_DDR_DM[7:0]
{9}
RB_GPO_nPD_RDDR_VTT {6}
R825
22J
C880
1uF(1608:B)
C891
22uF(2012:B:6.3V)
CP489
CP499
CP488
CP493
IC59
MP2007DH
DDQ
1
VTT
2
GND
3
VTTSEN
4
VTTREF
8
EN
7
REF
6
VDRV
5
EPa
d
GND1
R826
10KJ
C8
9
7
22uF(2012:B:6.3V)
C896
1uF(1608:B)
C886
0.1uF(B)
C8
9
9
X
_10uF(2012:F)
CP509
C8
9
8
22uF(2012:B:6.3V)
C878
10uF(2012:F)
C9
0
0
X
_10uF(2012:F)
C895
1000pF(B)
R852
100J
C879
0.1uF(B)
1
: ‘15/Aug.
1
MX-M266 CIRCUIT DIAGRAM AND PARTS LAYOUT / 回路図 と 部品配置図 2 – 13
5
5
4
4
3
3
D
C
B
A
CHIP1
CHIP2
CHIP4
CHIP3
EEPROM
for ON BOARD DDR3 SPD
SA "1010_000X"
R_DDR_AD3
R_DDR_AD10
R_DDR_AD13
R_DDR_AD6
R_DDR_AD2
R_DDR_AD1
R_DDR_AD9
R_DDR_AD12
R_DDR_AD5
R_DDR_AD8
R_DDR_AD4
R_DDR_AD7
R_DDR_AD5
R_DDR_AD2
R_DDR_BA2
R_DDR_AD4
R_DDR_AD1
R_DDR_AD13
R_DDR_BA1
R_DDR_CKE0
R_DDR_CAS
R_DDR_CAS
R_DDR_AD10
R_DDR_WE
R_DDR_AD11
R_DDR_ODT0
R_DDR_CS0
R_DDR_CS0
R_DDR_AD8
R_DDR_AD3
R_DDR_AD0
R_DDR_RAS
R_DDR_AD9
R_DDR_AD6
R_DDR_BA0
R_DDR_D_DQS0N
R_DDR_D_DQS0P
R_DDR_RESET_N
R_DDR_AD14
R_DDR_RESET_N
R_DDR_AD11
R_DDR_BA0
R_DDR_DQ7
R_DDR_D_DQ7
R_DDR_D_DQ31
R_DDR_DQ31
R_DDR_D_DQ35
R_DDR_DQ35
R_DDR_DQ13
R_DDR_D_DQ43
R_DDR_DQ43
R_DDR_DQ16
R_DDR_D_DQ16
R_DDR_D_DQ61
R_DDR_DQ61
R_DDR_DQ63
R_DDR_DQ63
R_DDR_D_DQ63
R_DDR_DQ10
R_DDR_D_DQ10
R_DDR_DQ21
R_DDR_D_DQ38
R_DDR_DQ38
R_DDR_D_DQ46
R_DDR_DQ46
R_DDR_DQ49
R_DDR_D_DQ49
R_DDR_DQ9
R_DDR_D_DQ9
R_DDR_DQ20
R_DDR_D_DQ20
R_DDR_D_DQ56
R_DDR_D_DQ37
R_DDR_DQ37
R_DDR_DQ45
R_DDR_D_DQ45
R_DDR_DQ50
R_DDR_D_DQ50
R_DDR_D_DQ1
R_DDR_DQ1
R_DDR_DQ56
R_DDR_DQ19
R_DDR_D_DQ19
R_DDR_DQ29
R_DDR_D_DQ29
R_DDR_D_DQ34
R_DDR_DQ34
R_DDR_DQ42
R_DDR_D_DQ42
R_DDR_D_DQ59
R_DDR_DQ59
R_DDR_DQ8
R_DDR_D_DQ8
R_DDR_D_DQ44
R_DDR_DQ44
R_DDR_DQ51
R_DDR_D_DQ51
R_DDR_DQ4
R_DDR_D_DQ4
R_DDR_D_DQ23
R_DDR_DQ23
R_DDR_DQ14
R_DDR_DQ33
R_DDR_D_DQ33
R_DDR_DQ41
R_DDR_D_DQ41
R_DDR_DQ54
R_DDR_D_DQ54
R_DDR_DQ15
R_DDR_D_DQ15
R_DDR_D_DQ27
R_DDR_DQ27
R_DDR_DQ32
R_DDR_D_DQ32
R_DDR_DQ40
R_DDR_D_DQ40
R_DDR_DQ0
R_DDR_D_DQ0
R_DDR_D_DQ58
R_DDR_DQ58
R_DDR_D_DQ30
R_DDR_DQ30
R_DDR_DQ39
R_DDR_D_DQ39
R_DDR_D_DQ47
R_DDR_DQ47
R_DDR_D_DQ14
R_DDR_D_DQ13
R_DDR_DQ5
R_DDR_D_DQ5
R_DDR_D_DQ17
R_DDR_DQ17
R_DDR_DQ52
R_DDR_D_DQ52
R_DDR_DQ22
R_DDR_D_DQ22
R_DDR_D_DQ57
R_DDR_DQ57
R_DDR_DQ18
R_DDR_D_DQ18
R_DDR_D_DQ36
R_DDR_DQ36
R_DDR_DQ6
R_DDR_D_DQ6
R_DDR_D_DQ62
R_DDR_DQ62
R_DDR_DQ11
R_DDR_D_DQ11
R_DDR_D_DQ28
R_DDR_DQ28
R_DDR_D_DQ21
R_DDR_DQ48
R_DDR_D_DQ48
R_DDR_D_DQ25
R_DDR_DQ25
R_DDR_DQ55
R_DDR_D_DQ55
R_DDR_DQ2
R_DDR_D_DQ2
R_DDR_DQ12
R_DDR_D_DQ12
R_DDR_D_DQ3
R_DDR_DQ3
R_DDR_D_DQ26
R_DDR_DQ26
R_DDR_D_DQ24
R_DDR_DQ24
R_DDR_DQ53
R_DDR_D_DQ53
R_DDR_D_DQ60
R_DDR_DQ60
R_DDR_RESET_N
R_DDR_CK0N
R_DDR_D_DQS1N
R_DDR_D_DQS1P
R_DDR_CK0P
CK0_TERM
R_DDR_RESET_N
R_DDR_BA1
R_DDR_BA2
R_DDR_BA2
R_DDR_D_DQS3N
R_DDR_D_DQS3P
R_DDR_RESET_N
R_DDR_RESET_N
R_DDR_D_DM1
R_DDR_D_DM3
R_DDR_DM5
R_DDR_DM5
R_DDR_D_DQS4N
R_DDR_D_DQS5N
R_DDR_D_DQS5P
R_DDR_D_DQS4P
R_DDR_D_DQS6N
R_DDR_D_DQS7P
R_DDR_D_DQS7N
R_DDR_D_DQS6P
R_DDR_DM7
R_DDR_DM6
R_DDR_DM6
R_DDR_D_DQ25
R_DDR_D_DQ26
R_DDR_D_DQ26
R_DDR_D_DQ31
R_DDR_D_DQ29
R_DDR_D_DQ24
R_DDR_D_DQ28
R_DDR_D_DQ30
R_DDR_D_DQ27
R_DDR_D_DQS0N
R_DDR_DM1
R_DDR_DM1
R_DDR_DM3
R_DDR_DM3
R_DDR_DM2
R_DDR_DM2
R_DDR_DM0
R_DDR_DM0
R_DDR_D_DQ9
R_DDR_D_DQ10
R_DDR_D_DQ10
R_DDR_D_DQ15
R_DDR_D_DQ13
R_DDR_D_DQ8
R_DDR_DM4
R_DDR_DM4
R_DDR_D_DQ12
R_DDR_D_DQ14
R_DDR_D_DQ11
R_DDR_D_DM1
R_DDR_D_DM2
R_DDR_D_DM3
R_DDR_D_DM4
R_DDR_D_DM5
R_DDR_D_DM6
R_DDR_D_DM7
R_DDR_D_DM2
R_DDR_D_DM3
R_DDR_D_DM4
R_DDR_D_DM5
R_DDR_D_DM6
R_DDR_D_DM7
R_DDR_D_DM0
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DDR_D_DQS1N
R_DDR_D_DQS1P
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DDR_D_DQS2N
R_DDR_D_DQS2P
R_DDR_D_DQS0P
R_DDR_D_DQS0P
R_DDR_D_DQS2N
R_DDR_D_DQS3P
R_DDR_D_DQS3N
R_DDR_D_DQS2P
CK0_TERM
R_DD
R_DD
R_DD
R_DDR_D_DM0
R_DD
R_DD
R_DD
R_DDR_D_DM2
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DDR_D_DQ17
R_DDR_D_DQ18
R_DDR_D_DQ18
R_DDR_D_DQ23
R_DDR_D_DQ21
R_DDR_D_DQ16
R_DDR_D_DQ20
R_DDR_D_DQ22
R_DDR_D_DQ19
R_DDR_CK0P
R_DDR_CK0N
R_DDR_CKE0
R_DDR_ODT0
R_DDR_ODT0
R_DDR_CS0
R_DDR_CAS
R_DDR_WE
R_DDR_RAS
R_DDR_D_DQ1
R_DDR_D_DQ2
R_DDR_D_DQ2
R_DDR_D_DQ7
R_DDR_D_DQ5
R_DDR_D_DQ0
R_DDR_D_DQ4
R_DDR_D_DQ6
R_DDR_D_DQ3
R_DDR_AD0
R_DDR_AD12
R_DDR_AD7
R_DDR_AD14
R_DDR_AD15
R_DDR_AD15
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DD
R_DDR_AD3
R_DDR_AD10
R_DDR_AD13
R_DDR_AD6
R_DDR_AD2
R_DDR_AD0
R_DDR_AD1
R_DDR_AD1
R_DDR_AD9
R_DDR_AD12
R_DDR_AD5
R_DDR_AD8
R_DDR_AD4
R_DDR_AD7
R_DDR_AD14
R_DDR_AD11
R_DDR_BA0
R_DDR_BA1
R_DDR_BA2
R_DDR_BA1
R_DDR_BA2
R_DDR_CAS
R_DDR_WE
R_DDR_RAS
R_DD
R_DD
R_DD
R_DD
R_DDR_CKE0
R_DDR_ODT0
R_DDR_ODT0
R_DDR_CS0
DGND
DGND
1R5V_ECO
DGND
1R5V_ECO
DGND
DGND
1R5V_ECO
DGND
DGND
0R75V_
DDR_
R
_VREF
CA1
0R75V_
DDR_
R
_
VREF
DQ1
DGND
DGND
1R5V_ECO
DGND
1R5V_ECO
DGND
DGND
1R5V_ECO
DGND
DGND
0R75V
_
DDR_R_VREFCA2
0
R
75
V_DDR_
R
_VREF
DQ2
DGND
1R5V_ECO
DGND
DGND
1R5V_ECO
DGND
DGND
0R75V
_
DDR_R_VREFCA4
0
R
75
V_DDR_
R
_VREF
DQ4
DGND
1R5V_ECO
DGND
DGND
1R5V_ECO
DGND
DGND
0R75V_
DDR_
R
_VREF
CA3
0R75V_
DDR_
R
_
VREF
DQ3
3R3V_ECO
DGND
DGND
DGND
DGND
1
R_DDR_CK0N
{8}
R_DDR_CAS
{8}
R_DDR_ODT0
{8}
R_DDR_WE
{8}
R_DDR_CKE0
{8}
R_DDR_CS0
{8}
R_DDR_BA[2:0]
{8}
R_DDR_RAS
{8}
R_DDR_AD[15:0]
{8}
R_DDR_DQ[63:0]
{8}
R_DDR_DM[7:0]
{8}
R_DDR_CK0P
{8}
R_DDR_RESET_N
{8}
R_DDR_DQS3N
{8}
R_DDR_DQS3P
{8}
R_
R_
R_DDR_DQS4N
{8}
R_DDR_DQS4P
{8}
R_DDR_DQS0N
{8}
R_DDR_DQS0P
{8}
R_DDR_DQS5N
{8}
R_DDR_DQS5P
{8}
R_DDR_DQS1N
{8}
R_DDR_DQS1P
{8}
R_DDR_DQS6N
{8}
R_DDR_CK0P {8}
R_DDR_CK0N
{8}
R_DDR_DQS6P
{8}
R_DDR_DQS7N
{8}
R_DDR_DQS7P
{8}
R_DDR_DQS2N
{8}
R_DDR_DQS2P
{8}
R_
R_
R_DDR_CK0P {8}
R_DDR_CK0N
{8}
RA_I2C_SDA1
RA_I2C_SCL1
CP865
DP4
R1096
15J
R1073
82F
C
BR33
15Jx4
8
1
7
2
6
3
5
4
R1084
82F
DP14
C1116
0.1uF(B)
C1080
0.1uF(B)
R1125
15J
C1120
0.1uF(B)
R1076
82F
R1116
15J
C1073
0.1uF(B)
BR31
15Jx4
8
1
7
2
6
3
5
4
C
R1104
15J
DP21
C
C1084
0.1uF(B)
C1072
0.1uF(B)
R1099
15J
CP864
R1100
82F
R1077
82F
R1093
82F
R1110
15J
DP17
R1126
15J
DP8
C
C1089
0.1uF(B)
C1180
0.1uF(B
C1140
0.1uF(B)
BR30
15Jx4
8
1
7
2
6
3
5
4
R1121
82F
C1117
0.1uF(B)
R1103
15J
DP6
BR43
15Jx4
8
1
7
2
6
3
5
4
C1103
0.1uF(B)
DP11
DP10
R1085
82F
BR35
15Jx4
8
1
7
2
6
3
5
4
DP20
DP1
DP2
R1097
82F
C
C1158
D_0.1uF(B)
D_0.1uF(B)
C1100
0.1uF(B)
C1069
0.1uF(B)
C
R1119
82F
CP845
C
R1081
82F
BR37
15Jx4
8
1
7
2
6
3
5
4
IC92
DDR3chip_2Gbit(x8)(N)
VDD
A3
VSS
D9
VDDQ
B10
VSSQ
D10
VDDQ
C2
VDDQ
E10
VSSQ
B9
VSSQ
C10
VDD
A10
VSSQ
B3
DQ6
D3
VSSQ
D2
DQ7
E8
DQ1
C8
DQ0
B4
DQ4
E4
DQ3
C9
DQ2
C3
DQ5
E9
VREFDQ
E2
VSS
A9
CK
F8
VDD
D8
CKE
G10
WE#
H4
RAS#
F4
CK#
G8
ODT
G2
BA0
J3
BA1
K9
CAS#
G4
CS#
H3
A10
H8
A1
L8
A2
L4
A0
K4
VDD
G3
VSS
B2
A3
K3
A5
L3
A6
M9
A4
L9
A7
M3
A9
M4
A11
M8
A8
N9
VSS
A2
A12
K8
BA2
J4
DM/TDQS
B8
DQS
C4
NF/TDQS
A8
DQS#
D4
NC
F2
NC
A4
A13
N4
VREFCA
J9
VSS
F3
VSS
F9
ZQ
H9
A14
N8
RESET#
N3
VSS
J2
VSS
J10
VSS
L2
VSS
L10
VSS
N2
VSS
N10
VDDQ
E3
VDD
G9
VDD
K2
VDD
K10
VDD
M2
VDD
M10
NC
F10
NC
H2
NC
H10
NC
J8
NC
A1
NC
N1
NC
A11
NC
N11
R1129
15J
C1104
10uF(2012:F)
R1194
30J
C1112
0.1uF(B)
R1117
15J
C
DP7
DP5
IC94
D_BR24T02FVT-WE2
VCC
8
A2
3
WP
7
VSS
4
SDA
5
A1
2
A0
1
SCL
6
R1111
82F
BR32
15Jx4
8
1
7
2
6
3
5
4
DP16
C
BR41
15Jx4
8
1
7
2
6
3
5
4
IC90
DDR3chip_2Gbit(x8)(N)
VDD
A3
VSS
D9
VDDQ
B10
VSSQ
D10
VDDQ
C2
VDDQ
E10
VSSQ
B9
VSSQ
C10
VDD
A10
VSSQ
B3
DQ6
D3
VSSQ
D2
DQ7
E8
DQ1
C8
DQ0
B4
DQ4
E4
DQ3
C9
DQ2
C3
DQ5
E9
VREFDQ
E2
VSS
A9
CK
F8
VDD
D8
CKE
G10
WE#
H4
RAS#
F4
CK#
G8
ODT
G2
BA0
J3
BA1
K9
CAS#
G4
CS#
H3
A10
H8
A1
L8
A2
L4
A0
K4
VDD
G3
VSS
B2
A3
K3
A5
L3
A6
M9
A4
L9
A7
M3
A9
M4
A11
M8
A8
N9
VSS
A2
A12
K8
BA2
J4
DM/TDQS
B8
DQS
C4
NF/TDQS
A8
DQS#
D4
NC
F2
NC
A4
A13
N4
VREFCA
J9
VSS
F3
VSS
F9
ZQ
H9
A14
N8
RESET#
N3
VSS
J2
VSS
J10
VSS
L2
VSS
L10
VSS
N2
VSS
N10
VDDQ
E3
VDD
G9
VDD
K2
VDD
K10
VDD
M2
VDD
M10
NC
F10
NC
H2
NC
H10
NC
J8
NC
A1
NC
N1
NC
A11
NC
N11
R1127
15J
R1102
15J
C1088
0.1uF(B)
C1124
0.1uF(B)
BR34
15Jx4
8
1
7
2
6
3
5
4
C1231
3pF(CH)
3pF(CH)
C1152
10uF(2012:F)
C1113
0.1uF(B)
C
R1105
15J
R1106
15J
C1107
0.1uF(B)
C1068
0.1uF(B)
R1112
82F
C1160
47pF(CH)
47pF(CH)
C1128
0.1uF(B)
BR38
15Jx4
8
1
7
2
6
3
5
4
C1144
0.1uF(B)
C
R1137
X_1KJ
X_1KJ
C1149
0.1uF(B)
DP18
BR29
15Jx4
8
1
7
2
6
3
5
4
R1120
15J
R1118
15J
C1094
0.1uF(B)
BR42
15Jx4
8
1
7
2
6
3
5
4
R1130
15J
C
C
CP848
R1069
240F
CP849
BR40
15Jx4
8
1
7
2
6
3
5
4
IC88
DDR3chip_2Gbit(x8)(N)
VDD
A3
VSS
D9
VDDQ
B10
VSSQ
D10
VDDQ
C2
VDDQ
E10
VSSQ
B9
VSSQ
C10
VDD
A10
VSSQ
B3
DQ6
D3
VSSQ
D2
DQ7
E8
DQ1
C8
DQ0
B4
DQ4
E4
DQ3
C9
DQ2
C3
DQ5
E9
VREFDQ
E2
VSS
A9
CK
F8
VDD
D8
CKE
G10
WE#
H4
RAS#
F4
CK#
G8
ODT
G2
BA0
J3
BA1
K9
CAS#
G4
CS#
H3
A10
H8
A1
L8
A2
L4
A0
K4
VDD
G3
VSS
B2
A3
K3
A5
L3
A6
M9
A4
L9
A7
M3
A9
M4
A11
M8
A8
N9
VSS
A2
A12
K8
BA2
J4
DM/TDQS
B8
DQS
C4
NF/TDQS
A8
DQS#
D4
NC
F2
NC
A4
A13
N4
VREFCA
J9
VSS
F3
VSS
F9
ZQ
H9
A14
N8
RESET#
N3
VSS
J2
VSS
J10
VSS
L2
VSS
L10
VSS
N2
VSS
N10
VDDQ
E3
VDD
G9
VDD
K2
VDD
K10
VDD
M2
VDD
M10
NC
F10
NC
H2
NC
H10
NC
J8
NC
A1
NC
N1
NC
A11
NC
N11
DP9
BR39
15Jx4
8
1
7
2
6
3
5
4
CP868
CP852
C1133
0.1uF(B)
DP15
R1090
240F
R1131
15J
R1115
15J
CP853
BR36
15Jx4
8
1
7
2
6
3
5
4
R1108
15J
C1076
0.1uF(B)
DP13
C1096
0.1uF(B)
CP861
IC87
DDR3chip_2Gbit(x8)(N)
VDD
A3
VSS
D9
VDDQ
B10
VSSQ
D10
VDDQ
C2
VDDQ
E10
VSSQ
B9
VSSQ
C10
VDD
A10
VSSQ
B3
DQ6
D3
VSSQ
D2
DQ7
E8
DQ1
C8
DQ0
B4
DQ4
E4
DQ3
C9
DQ2
C3
DQ5
E9
VREFDQ
E2
VSS
A9
CK
F8
VDD
D8
CKE
G10
WE#
H4
RAS#
F4
CK#
G8
ODT
G2
BA0
J3
BA1
K9
CAS#
G4
CS#
H3
A10
H8
A1
L8
A2
L4
A0
K4
VDD
G3
VSS
B2
A3
K3
A5
L3
A6
M9
A4
L9
A7
M3
A9
M4
A11
M8
A8
N9
VSS
A2
A12
K8
BA2
J4
DM/TDQS
B8
DQS
C4
NF/TDQS
A8
DQS#
D4
NC
F2
NC
A4
A13
N4
VREFCA
J9
VSS
F3
VSS
F9
ZQ
H9
A14
N8
RESET#
N3
VSS
J2
VSS
J10
VSS
L2
VSS
L10
VSS
N2
VSS
N10
VDDQ
E3
VDD
G9
VDD
K2
VDD
K10
VDD
M2
VDD
M10
NC
F10
NC
H2
NC
H10
NC
J8
NC
A1
NC
N1
NC
A11
NC
N11
C1150
0.1uF(B)
R1109
15J
R1072
82F
R1128
15J
BR28
15Jx4
8
1
7
2
6
3
5
4
C
C1136
0.1uF(B)
DP19
R1124
15J
R1193
30J
DP12
R1107
15J
DP3
CP860
CP857
R1080
82F
C1134
0.1uF(B)
R1092
82F
1
: ‘15/Aug.
1
MX-M266 CIRCUIT DIAGRAM AND PARTS LAYOUT / 回路図 と 部品配置図 2 – 14
3
3
2
2
1
1
D
C
B
A
CHIP5
CHIP6
CHIP7
CHIP8
R_DDR_RESET_N
R_DDR_RESET_N
R_DDR_D_DQS4N
R_DDR_D_DQS4P
R_DDR_D_DQS5N
R_DDR_D_DQS5P
R_DDR_D_DQS6N
R_DDR_D_DQS6P
R_DDR_D_DM4
R_DDR_D_DQS7N
R_DDR_D_DQS7P
R_DDR_D_DM6
R_DDR_D_DQ49
R_DDR_D_DQ50
R_DDR_D_DQ50
R_DDR_D_DQ55
R_DDR_D_DQ53
R_DDR_D_DQ48
R_DDR_D_DQ52
R_DDR_D_DQ54
R_DDR_D_DQ51
R_DDR_D_DQ33
R_DDR_D_DQ34
R_DDR_D_DQ34
R_DDR_D_DQ39
R_DDR_D_DQ37
R_DDR_D_DQ32
R_DDR_D_DQ36
R_DDR_D_DQ38
R_DDR_D_DQ35
R_DDR_D_DM5
R_DDR_D_DM7
R_DDR_D_DQ57
R_DDR_D_DQ58
R_DDR_D_DQ58
R_DDR_D_DQ63
R_DDR_D_DQ61
R_DDR_D_DQ56
R_DDR_D_DQ60
R_DDR_D_DQ62
R_DDR_D_DQ59
R_DDR_CKE0
R_DDR_ODT0
R_DDR_ODT0
R_DDR_CS0
R_DDR_D_DQ41
R_DDR_D_DQ42
R_DDR_D_DQ42
R_DDR_D_DQ47
R_DDR_D_DQ45
R_DDR_D_DQ40
R_DDR_D_DQ44
R_DDR_D_DQ46
R_DDR_D_DQ43
R_DDR_AD3
R_DDR_AD10
R_DDR_AD13
R_DDR_AD6
R_DDR_AD0
R_DDR_AD2
R_DDR_AD1
R_DDR_AD9
R_DDR_AD12
R_DDR_AD5
R_DDR_AD8
R_DDR_AD4
R_DDR_AD7
R_DDR_AD14
R_DDR_AD11
R_DDR_BA0
R_DDR_BA1
R_DDR_BA2
R_DDR_BA1
R_DDR_BA2
R_DDR_CKE0
R_DDR_ODT0
R_DDR_ODT0
R_DDR_CS0
R_DDR_CAS
R_DDR_WE
R_DDR_RAS
R_DDR_RESET_N
R_DDR_AD0
R_DDR_AD1
R_DDR_AD2
R_DDR_AD1
R_DDR_AD2
R_DDR_AD9
R_DDR_AD10
R_DDR_AD11
R_DDR_AD10
R_DDR_AD11
R_DDR_AD3
R_DDR_AD12
R_DDR_AD4
R_DDR_AD13
R_DDR_AD5
R_DDR_AD6
R_DDR_AD7
R_DDR_AD6
R_DDR_AD7
R_DDR_AD8
R_DDR_BA1
R_DDR_BA0
R_DDR_BA2
R_DDR_CS0
R_DDR_CS0
R_DDR_RESET_N
R_DDR_AD14
R_DDR_RAS
R_DDR_CAS
R_DDR_CAS
R_DDR_CKE0
R_DDR_ODT0
R_DDR_ODT0
R_DDR_WE
R_DDR_AD15
R_DDR_AD3
R_DDR_AD10
R_DDR_AD13
R_DDR_AD6
R_DDR_AD2
R_DDR_AD0
R_DDR_AD1
R_DDR_AD1
R_DDR_AD9
R_DDR_AD12
R_DDR_AD5
R_DDR_AD8
R_DDR_AD4
R_DDR_AD7
R_DDR_AD14
R_DDR_AD11
R_DDR_BA0
R_DDR_BA1
R_DDR_BA2
R_DDR_BA1
R_DDR_BA2
R_DDR_CAS
R_DDR_WE
R_DDR_RAS
R_DDR_AD3
R_DDR_AD10
R_DDR_AD13
R_DDR_AD6
R_DDR_AD2
R_DDR_AD0
R_DDR_AD1
R_DDR_AD1
R_DDR_AD9
R_DDR_AD12
R_DDR_AD5
R_DDR_AD8
R_DDR_AD4
R_DDR_AD7
R_DDR_AD14
R_DDR_AD11
R_DDR_BA0
R_DDR_BA1
R_DDR_BA2
R_DDR_BA1
R_DDR_BA2
R_DDR_CAS
R_DDR_WE
R_DDR_RAS
R_DDR_AD3
R_DDR_AD10
R_DDR_AD13
R_DDR_AD6
R_DDR_AD2
R_DDR_AD0
R_DDR_AD1
R_DDR_AD1
R_DDR_AD9
R_DDR_AD12
R_DDR_AD5
R_DDR_AD8
R_DDR_AD4
R_DDR_AD7
R_DDR_AD14
R_DDR_AD11
R_DDR_BA0
R_DDR_BA1
R_DDR_BA2
R_DDR_BA1
R_DDR_BA2
R_DDR_CAS
R_DDR_WE
R_DDR_RAS
R_DDR_AD3
R_DDR_AD10
R_DDR_AD13
R_DDR_AD2
R_DDR_AD1
R_DDR_AD9
R_DDR_AD12
R_DDR_AD5
R_DDR_AD8
R_DDR_AD4
R_DDR_AD7
R_DDR_AD14
R_DDR_AD11
R_DDR_BA0
R_DDR_BA1
R_DDR_BA2
R_DDR_BA1
R_DDR_BA2
R_DDR_CAS
R_DDR_WE
R_DDR_RAS
R_DDR_AD6
R_DDR_AD0
R_DDR_AD3
R_DDR_AD10
R_DDR_AD13
R_DDR_AD6
R_DDR_AD2
R_DDR_AD0
R_DDR_AD1
R_DDR_AD1
R_DDR_AD9
R_DDR_AD12
R_DDR_AD5
R_DDR_AD8
R_DDR_AD4
R_DDR_AD7
R_DDR_AD14
R_DDR_AD11
R_DDR_BA0
R_DDR_BA1
R_DDR_BA2
R_DDR_BA1
R_DDR_BA2
R_DDR_CAS
R_DDR_WE
R_DDR_RAS
R_DDR_CKE0
R_DDR_ODT0
R_DDR_ODT0
R_DDR_CS0
R_DDR_CKE0
R_DDR_ODT0
R_DDR_ODT0
R_DDR_CS0
R_DDR_CKE0
R_DDR_ODT0
R_DDR_ODT0
R_DDR_CS0
R_DDR_CKE0
R_DDR_ODT0
R_DDR_ODT0
R_DDR_CS0
DGND
DGND
DGND
DGND
DGND
1R5V_ECO
DGND
DGND
1R5V_ECO
DGND
DGND
0R75V
_
DDR_R_VREFCA5
0
R
75
V_DDR_
R
_VREF
DQ5
DGND
1R5V_ECO
DGND
DGND
1R5V_ECO
DGND
1R5V_ECO
DGND
DGND
1R5V_ECO
DGND
DGND
1R5V_ECO
DGND
DGND
0R75V_
DDR_
R
_VREF
CA6
0R75V_
DDR_
R
_
VREF
DQ6
1R5V_ECO
DGND
DGND
DGND
0R75V
_
DDR_R_VREFCA7
0
R
75
V_DDR_
R
_VREF
DQ7
DGND
1R5V_ECO
DGND
1R5V_ECO
DGND
DGND
1R5V_ECO
DGND
DGND
0R75V_
DDR_
R
_VREF
CA8
0R75V_
DDR_
R
_
VREF
DQ8
1R5V_ECO
DGND
1R5V_ECO
DGND
DGND
DGND
0R75V_DDR_R_VTT
DGND
1R5V_ECO
1R5V_ECO
DGND
1R5V_ECO
DGND
DGND
1R5V_ECO
R_DDR_CK0P {8}
R_DDR_CK0N
{8}
R_DDR_CK0P {8}
R_DDR_CK0N
{8}
R_DDR_CK0P {8}
R_DDR_CK0N
{8}
R_DDR_CK0P {8}
R_DDR_CK0N
{8}
R_DDR_CK0P {8}
R_DDR_CK0N
{8}
RA_I2C_SDA1 {6,7,10}
RA_I2C_SCL1
{6,7,10}
R_DDR_CK0P {8}
R_DDR_CK0N
{8}
C1070
0.1uF(B)
IC86
DDR3chip_2Gbit(x8)(N)
VDD
A3
VSS
D9
VDDQ
B10
VSSQ
D10
VDDQ
C2
VDDQ
E10
VSSQ
B9
VSSQ
C10
VDD
A10
VSSQ
B3
DQ6
D3
VSSQ
D2
DQ7
E8
DQ1
C8
DQ0
B4
DQ4
E4
DQ3
C9
DQ2
C3
DQ5
E9
VREFDQ
E2
VSS
A9
CK
F8
VDD
D8
CKE
G10
WE#
H4
RAS#
F4
CK#
G8
ODT
G2
BA0
J3
BA1
K9
CAS#
G4
CS#
H3
A10
H8
A1
L8
A2
L4
A0
K4
VDD
G3
VSS
B2
A3
K3
A5
L3
A6
M9
A4
L9
A7
M3
A9
M4
A11
M8
A8
N9
VSS
A2
A12
K8
BA2
J4
DM/TDQS
B8
DQS
C4
NF/TDQS
A8
DQS#
D4
NC
F2
NC
A4
A13
N4
VREFCA
J9
VSS
F3
VSS
F9
ZQ
H9
A14
N8
RESET#
N3
VSS
J2
VSS
J10
VSS
L2
VSS
L10
VSS
N2
VSS
N10
VDDQ
E3
VDD
G9
VDD
K2
VDD
K10
VDD
M2
VDD
M10
NC
F10
NC
H2
NC
H10
NC
J8
NC
A1
NC
N1
NC
A11
NC
N11
C1086
0.1uF(B)
C1151
0.1uF(B)
C1131
0.1uF(B)
R1150
36J
C1092
0.1uF(B)
R1142
36J
C1098
0.1uF(B)
C1141
0.1uF(B)
R1135
36J
C1110
0.1uF(B)
C1163
22uF(2012:B:6.3V)
DP43
C1109
0.1uF(B)
DP41
DP27
CP866
R1141
36J
C1186
0.1uF(B)
R1114
82F
C1188
22uF(2012:B:6.3V)
DP26
C1091
0.1uF(B)
DP33
DP40
C1127
0.1uF(B)
C1156
22uF(2012:B:6.3V)
C1177
0.1uF(B)
R1088
240F
C1118
0.1uF(B)
C1095
0.1uF(B)
C1097
0.1uF(B)
R1101
82F
C1142
0.1uF(B)
R1089
240F
DP24
C1079
0.1uF(B)
C1125
0.1uF(B)
C1106
10uF(2012:F)
C1166
22uF(2012:B:6.3V)
C1122
0.1uF(B)
C1135
0.1uF(B)
IC89
DDR3chip_2Gbit(x8)(N)
VDD
A3
VSS
D9
VDDQ
B10
VSSQ
D10
VDDQ
C2
VDDQ
E10
VSSQ
B9
VSSQ
C10
VDD
A10
VSSQ
B3
DQ6
D3
VSSQ
D2
DQ7
E8
DQ1
C8
DQ0
B4
DQ4
E4
DQ3
C9
DQ2
C3
DQ5
E9
VREFDQ
E2
VSS
A9
CK
F8
VDD
D8
CKE
G10
WE#
H4
RAS#
F4
CK#
G8
ODT
G2
BA0
J3
BA1
K9
CAS#
G4
CS#
H3
A10
H8
A1
L8
A2
L4
A0
K4
VDD
G3
VSS
B2
A3
K3
A5
L3
A6
M9
A4
L9
A7
M3
A9
M4
A11
M8
A8
N9
VSS
A2
A12
K8
BA2
J4
DM/TDQS
B8
DQS
C4
NF/TDQS
A8
DQS#
D4
NC
F2
NC
A4
A13
N4
VREFCA
J9
VSS
F3
VSS
F9
ZQ
H9
A14
N8
RESET#
N3
VSS
J2
VSS
J10
VSS
L2
VSS
L10
VSS
N2
VSS
N10
VDDQ
E3
VDD
G9
VDD
K2
VDD
K10
VDD
M2
VDD
M10
NC
F10
NC
H2
NC
H10
NC
J8
NC
A1
NC
N1
NC
A11
NC
N11
C1078
0.1uF(B)
C1193
0.1uF(B)
CP856
IC91
DDR3chip_2Gbit(x8)(N)
VDD
A3
VSS
D9
VDDQ
B10
VSSQ
D10
VDDQ
C2
VDDQ
E10
VSSQ
B9
VSSQ
C10
VDD
A10
VSSQ
B3
DQ6
D3
VSSQ
D2
DQ7
E8
DQ1
C8
DQ0
B4
DQ4
E4
DQ3
C9
DQ2
C3
DQ5
E9
VREFDQ
E2
VSS
A9
CK
F8
VDD
D8
CKE
G10
WE#
H4
RAS#
F4
CK#
G8
ODT
G2
BA0
J3
BA1
K9
CAS#
G4
CS#
H3
A10
H8
A1
L8
A2
L4
A0
K4
VDD
G3
VSS
B2
A3
K3
A5
L3
A6
M9
A4
L9
A7
M3
A9
M4
A11
M8
A8
N9
VSS
A2
A12
K8
BA2
J4
DM/TDQS
B8
DQS
C4
NF/TDQS
A8
DQS#
D4
NC
F2
NC
A4
A13
N4
VREFCA
J9
VSS
F3
VSS
F9
ZQ
H9
A14
N8
RESET#
N3
VSS
J2
VSS
J10
VSS
L2
VSS
L10
VSS
N2
VSS
N10
VDDQ
E3
VDD
G9
VDD
K2
VDD
K10
VDD
M2
VDD
M10
NC
F10
NC
H2
NC
H10
NC
J8
NC
A1
NC
N1
NC
A11
NC
N11
C1236
0.1uF(B)
C1169
0.1uF(B)
DP28
R1079
82F
C1129
0.1uF(B)
80
0.1uF(B)
R1147
36J
C1233
0.1uF(B)
R1158
36J
CP859
C1138
0.1uF(B)
R1159
36J
DP42
R1071
240F
DP38
R1160
36J
C1099
0.1uF(B)
DP30
C1173
22uF(2012:B:6.3V)
CP851
R1157
36J
C1077
0.1uF(B)
C1165
22uF(2012:B:6.3V)
C1158
D_0.1uF(B)
D_0.1uF(B)
R1068
240F
R1146
36J
C1081
0.1uF(B)
DP31
R1075
82F
DP37
C1148
10uF(2012:F)
CP858
C1132
0.1uF(B)
R1136
36J
C1239
0.1uF(B)
C1114
0.1uF(B)
C1083
0.1uF(B)
C1126
0.1uF(B)
CP850
IC93
DDR3chip_2Gbit(x8)(N)
VDD
A3
VSS
D9
VDDQ
B10
VSSQ
D10
VDDQ
C2
VDDQ
E10
VSSQ
B9
VSSQ
C10
VDD
A10
VSSQ
B3
DQ6
D3
VSSQ
D2
DQ7
E8
DQ1
C8
DQ0
B4
DQ4
E4
DQ3
C9
DQ2
C3
DQ5
E9
VREFDQ
E2
VSS
A9
CK
F8
VDD
D8
CKE
G10
WE#
H4
RAS#
F4
CK#
G8
ODT
G2
BA0
J3
BA1
K9
CAS#
G4
CS#
H3
A10
H8
A1
L8
A2
L4
A0
K4
VDD
G3
VSS
B2
A3
K3
A5
L3
A6
M9
A4
L9
A7
M3
A9
M4
A11
M8
A8
N9
VSS
A2
A12
K8
BA2
J4
DM/TDQS
B8
DQS
C4
NF/TDQS
A8
DQS#
D4
NC
F2
NC
A4
A13
N4
VREFCA
J9
VSS
F3
VSS
F9
ZQ
H9
A14
N8
RESET#
N3
VSS
J2
VSS
J10
VSS
L2
VSS
L10
VSS
N2
VSS
N10
VDDQ
E3
VDD
G9
VDD
K2
VDD
K10
VDD
M2
VDD
M10
NC
F10
NC
H2
NC
H10
NC
J8
NC
A1
NC
N1
NC
A11
NC
N11
CP855
C1184
0.1uF(B)
R1087
82F
R1156
36J
C1085
0.1uF(B)
R1151
36J
CP863
C1102
0.1uF(B)
C1154
10uF(2012:F)
C1146
0.1uF(B)
C1155
0.1uF(B)
C1153
10uF(2012:F)
C1087
0.1uF(B)
A3
B10
C2
C2
E10
A10
F8
D8
G10
H4
F4
G8
G2
J3
K9
K9
G4
H3
H8
L8
L4
L4
K4
G3
K3
L3
M9
M9
L9
M3
M4
M8
N9
K8
J4
N4
H9
N8
E3
G9
K2
K10
M2
M10
K2
K10
M2
M10
A11
N11
N11
R1149
36J
R1094
82F
CP844
R1086
82F
C1082
0.1uF(B)
R1139
36J
CP854
C1130
0.1uF(B)
CP867
R1083
82F
C1192
22uF(2012:B:6.3V)
C1234
0.1uF(B)
R1144
36J
R1095
82F
C1147
0.1uF(B)
C1145
0.1uF(B)
C1139
0.1uF(B)
C1237
0.1uF(B)
C1171
22uF(2012:B:6.3V)
R1082
82F
C1115
0.1uF(B)
C1179
0.1uF(B)
R1148
36J
C1170
22uF(2012:B:6.3V)
C1105
10uF(2012:F)
C1119
0.1uF(B)
C1137
0.1uF(B)
R1070
240F
C1074
0.1uF(B)
C1157
22uF(2012:B:6.3V)
CP847
C1093
0.1uF(B)
C1071
0.1uF(B)
C1101
0.1uF(B)
C1090
0.1uF(B)
C1162
0.1uF(B)
R1122
82F
C1164
0.1uF(B)
R1140
36J
C1167
0.1uF(B)
A3
B10
C2
C2
E10
A10
F8
D8
G10
H4
F4
G8
G2
J3
K9
K9
G4
H3
H8
L8
L4
L4
K4
G3
K3
L3
M9
M9
L9
M3
M4
M8
N9
K8
J4
N4
H9
N8
E3
G9
K2
K10
M2
M10
K2
K10
M2
M10
A11
N11
N11
R1078
82F
R1154
36J
C1123
0.1uF(B)
C1172
0.1uF(B)
C1191
0.1uF(B)
R1098
82F
C1176
22uF(2012:B:6.3V)
C1159
0.1uF(B)
C1178
22uF(2012:B:6.3V)
C1181
22uF(2012:B:6.3V)
R1153
36J
DP35
C1108
0.1uF(B)
DP23
R1155
36J
R1074
82F
DP32
CP862
R1113
82F
C1143
0.1uF(B)
C1185
22uF(2012:B:6.3V)
C1235
0.1uF(B)
R1152
36J
CP846
DP39
DP22
R1143
36J
C1121
0.1uF(B)
C1075
0.1uF(B)
DP29
R1123
82F
DP36
DP34
C1174
0.1uF(B)
R1091
240F
C1161
0.1uF(B)
R1145
36J
C1111
10uF(2012:F)
DP25
R1138
36J
C1238
0.1uF(B)
1
: ‘15/Aug.
1
MX-M266 CIRCUIT DIAGRAM AND PARTS LAYOUT / 回路図 と 部品配置図 2 – 15
5
5
4
4
3
3
D
C
B
A
DIF_STOP#
H
G
I
H
W
O
L
OE_x LOW
HIGH
Clock Output Stop(H or L)
Clock Output Stop(H or L) Clkout = enable
Clkout = Hi-Z+PD = LOW
25MHz
←
→
←
PCL BOARD
CONNECTOR
PCL C
→
→
←
REUS_PCIE4_TX0P_OUT
REUS_PCIE4_TX0N_OUT
REUS_PCIE4_TX0N_OUT
REUS_PCIE4_TX1P_OUT
REUS_PCIE4_TX1N_OUT
REUS_PCIE4_TX1N_OUT
REUS_PCIE4_TX2P_OUT
REUS_PCIE4_TX2N_OUT
REUS_PCIE4_TX2N_OUT
REUS_PCIE4_TX3P_OUT
REUS_PCIE4_TX3N_OUT
REUS_PCIE4_TX3N_OUT
REUS_PCIE4_RX0N
REUS_PCIE4_RX1N
REUS_PCIE4_RX2N
REUS_PCIE4_RX3N
REUS_PCIE4_TX0P
REUS_PCIE4_TX0N
REUS_PCIE4_TX0N
REUS_PCIE4_TX1P
REUS_PCIE4_TX1N
REUS_PCIE4_TX1N
REUS_PCIE4_TX2P
REUS_PCIE4_TX2N
REUS_PCIE4_TX2N
REUS_PCIE4_TX3P
REUS_PCIE4_TX3N
REUS_PCIE4_TX3N
REUS_PCIE4_RX0P
REUS_PCIE4_RX1P
REUS_PCIE4_RX2P
REUS_PCIE4_RX3P
REUS_PCIE4_CLKN
REUS_PCIE4_CLKP
REUS_PCIE4_CLKP
REUS_PCIE4_CLKN
REUS_PCIE4_CLKN
PCIE_CLK5P
PCIE_CLK5N
SATA_CLK4P
SATA_CLK4N
SATA_CLK4N
SOC_SD1_REF_CLKN
SOC_SD1_REF_CLKP
REUS_PCIE4_TX1P
REUS_PCIE4_TX0P
REUS_PCIE4_TX0N
REUS_PCIE4_TX3N
REUS_PCIE4_TX3P
REUS_PCIE4_TX2N
REUS_PCIE4_TX2P
REUS_PCIE4_TX1N
REUS_PCIE4_TX3P
REUS_PCIE4_TX2N
REUS_PCIE4_TX2P
REUS_PCIE4_TX1N
REUS_PCIE4_RX1N
REUS_PCIE4_RX2P
REUS_PCIE4_RX0N
REUS_PCIE4_RX1P
REUS_PCIE4_RX3N
REUS_PCIE4_RX0P
REUS_PCIE4_RX2N
REUS_PCIE4_RX3P
DGND
DGND
DGND
DGND
DGND
DGND
DGND
3R3V_ECO
DGND
DGND
DGND
DGND
DGND
3R3V_ECO
DGND
DGND
DGND
DGND
DGND
3R3V_ECO
DGND
RA_I2C_SDA1
{6,7,9}
RA_I2C_SCL1
{6,7,9}
SATA_REFCLKP
{11}
SATA_REFCLKN
{11}
9FG108_CLK
{5}
RB_INTOUT1_N
{6}
SOC_IRQ_OUT_N
{6}
RC_GPI_PCL_READY
{13}
R1208
0J
CP230
R147
49.9F
49.9F
CP231
R145
49.9F
49.9F
R1209
X_0J
R134
49.9F
49.9F
R346
X_47KJ
X_47KJ
R146
49.9F
49.9F
CP213
R349
0J
R132
33J
RJ4
X_PADSHORT
C120
X_0.1uF(B)
CN31
X_FX18-40S-
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
MF_A1
A1
B
MF_B1
B1
MF_A1
A1
A
MF_B2
B2
MF_A2
A2
B
MF_A2
A2
A
2
2
1
1
R130
33J
CP229
C106
0.1uF(B)
C119
X_0.1uF(B)
X3
X_S3225A_25MHz_16/50
#1
1
#2
2
#3
3
#4
4
CP225
C113
X_0.1uF(B)
C122
X_0.1uF(B)
GP6
C93
X_22pF(CH)
CP228
C104
0.1uF(B)
GP5
C112
X_0.1uF(B)
C121
X_0.1uF(B)
CP237
R111
X_1.5KJ
IC10
ICS9FG108EG-LFT
XIN/CLKIN
1
X2
2
VDD
3
GND
4
REFOUT
5
FS2 (PD)
6
OE_7 (PD)
7
DIF_7
8
DIF_7#
9
VDD
10
DIF_6
11
DIF_6#
12
OE_6 (PU)
13
VDD
14
GND
15
OE_5 (PU)
16
DIF_5
17
DIF_5#
18
VDD
19
DIF_4
20
DIF_4#
21
OE_4 (PD)
22
SDATA
23
SCLK
24
CP224
C99
X_22pF(CH)
R133
33J
R131
33J
C115
X_0.1uF(B)
CP724
PCI-E x1
PCI-E x4
REUS ASIC
IC23D
PCIE1_ANAMON_O
F29
PCIE1_REFCLKP_I
F32
PCIE1_REFCLKM_I
F33
PCIE1_RX0M_I
G30
PCIE1_RX0P_I
G31
PCIE1_TX0M_O
G32
PCIE1_TX0P_O
G33
PCIE4_RX3M_I
J30
PCIE4_RX3P_I
J31
PCIE4_TX3M_O
J32
PCIE4_TX3P_O
J33
PCIE4_RX2M_I
K30
PCIE4_RX2P_I
K31
PCIE4_TX2M_O
K32
PCIE4_TX2P_O
K33
PCIE4_REFCLKP_I
M32
PCIE4_REFCLKM_I
M33
PCIE4_RX1M_I
P30
PCIE4_RX1P_I
P31
PCIE4_TX1M_O
P32
PCIE4_TX1P_O
P33
PCIE4_ANAMON_O
R29
PCIE4_RX0M_I
R30
PCIE4_RX0P_I
R31
PCIE4_TX0M_O
R32
PCIE4_TX0P_O
R33
CP723
C114
X_0.1uF(B)
CP240
C98
0.1uF(B)
C105
0.1uF(B)
1
: ‘15/Aug.
1
Click on the first or last page to see other MX-M266N / MX-M316N / MX-M356N (serv.man7) service manuals if exist.