Sharp MX-M1055 / MX-M1205 (serv.man3) Service Manual ▷ View online
MX-M1205 CIRCUIT DIAGRAM AND PARTS LAYOUT 2 – 46
3
3
2
2
1
1
D
C
B
A
R2_LB_A23
R2_LB_A2
R2_LBAD8
R2_LBAD9
R2_LBAD9
R2_LBAD11
R2_LBAD10
R2_LB_A3
R2_LBAD23
R2_LBAD21
R2_LBAD20
R2_LBAD22
R2_LB_A6
R2_LB_A9
FLASH_D3
FLASH_D6
FLASH_D9
R2_LB_A12
FLASH_D15
FLASH_D18
FLASH_D21
R2_LB_A15
FLASH_D27
FLASH_D30
R2_LB_A18
FLASH_A8
FLASH_A4
FLASH_A12
FLASH_A16
FLASH_A21
FLASH_A20
FLASH_D12
FLASH_D20
FLASH_D8
FLASH_D4
FLASH_D16
FLASH_D24
FLASH_2CE#
FLASH_WP#
FLASH_D0
FLASH_RYnBY
FLASH_OE#
FLASH_A6
FLASH_A9
FLASH_A15
FLASH_A19
FLASH_A7
FLASH_A5
FLASH_A18
FLASH_A3
FLASH_A10
FLASH_A2
FLASH_A14
FLASH_A17
FLASH_A23
FLASH_A11
FLASH_A13
FLASH_A1
FLASH_D28
FLASH_1CE#
R2_LB_A25
R2_LBAD2
R2_LBAD0
R2_LBAD1
R2_LBAD1
R2_LBAD3
R2_LBAD13
R2_LBAD15
R2_LBAD12
R2_LBAD14
R2_LB_A4
R2_LBAD27
R2_LBAD26
R2_LBAD25
R2_LB_A7
R2_LBAD24
R2_LB_A10
FLASH_D1
FLASH_D7
FLASH_D10
FLASH_D13
R2_LB_A13
FLASH_D19
FLASH_D22
FLASH_D25
R2_LB_A16
FLASH_D31
R2_LB_A22
R2_LBAD5
R2_LBAD4
R2_LBAD7
R2_LBAD6
R2_LBAD17
R2_LBAD16
R2_LBAD18
R2_LBAD19
R2_LBAD19
R2_LB_A5
R2_LB_A8
R2_LBAD31
R2_LBAD30
R2_LBAD28
R2_LBAD29
R2_LBAD29
FLASH_D2
FLASH_D5
R2_LB_A11
FLASH_D11
FLASH_D14
FLASH_D17
R2_LB_A14
FLASH_D23
FLASH_D26
FLASH_D29
R2_LB_A17
R2_LBLCS0
R2_LB_A19
R2_LB_A20
R2_LB_A21
R2_LB_A20
R2_LB_A21
R2_LB_A24
FLASH_A0
FLASH_A0
FLASH_A1
FLASH_A2
FLASH_A3
FLASH_A4
FLASH_A5
FLASH_A6
FLASH_A7
FLASH_A8
FLASH_A9
FLASH_A10
FLASH_A11
FLASH_A12
FLASH_A13
FLASH_A14
FLASH_A15
FLASH_A16
FLASH_A17
FLASH_A18
FLASH_A19
FLASH_A20
FLASH_A21
FLASH_A1
FLASH_A2
FLASH_A3
FLASH_A4
FLASH_A5
FLASH_A6
FLASH_A7
FLASH_A8
FLASH_A9
FLASH_A10
FLASH_A11
FLASH_A12
FLASH_A13
FLASH_A14
FLASH_A15
FLASH_A16
FLASH_A17
FLASH_A18
FLASH_A19
FLASH_A20
FLASH_A21
FLASHON_WE#
FLASH_WP#
FLASHON_OE#
FLASHON_CE#
FLASH_D0
FLASH_D1
FLASH_D2
FLASH_D3
FLASH_D4
FLASH_D5
FLASH_D6
FLASH_D7
FLASH_D8
FLASH_D9
FLASH_D10
FLASH_D11
FLASH_D12
FLASH_D13
FLASH_D14
FLASH_D15
FLASH_D1
FLASH_D2
FLASH_D3
FLASH_D4
FLASH_D5
FLASH_D6
FLASH_D7
FLASH_D8
FLASH_D9
FLASH_D10
FLASH_D11
FLASH_D12
FLASH_D13
FLASH_D14
FLASH_D15
FLASH_RYnBY
FLASH_DIMM_EN#
FLASH_A12
FLASH_D30
FLASH_A15
FLASH_A18
FLASH_RYnBY
FLASH_A21
FLASH_A0
FLASH_D19
FLASH_D22
FLASH_A4
FLASH_A7
FLASH_D25
FLASH_A10
FLASH_D28
FLASH_A13
FLASH_A16
FLASH_D31
FLASH_A19
FLASHON_WE#
FLASH_A1
FLASHON_CE#
FLASH_D17
FLASH_D20
FLASH_A2
FLASH_D23
FLASH_A5
FLASH_A8
FLASH_D26
FLASH_A11
FLASH_D29
FLASH_A14
FLASH_A17
FLASH_A20
FLASH_WP#
FLASH_D16
FLASH_D18
FLASH_D21
FLASH_A3
FLASH_A6
FLASH_D24
FLASH_A9
FLASH_D27
FLASHON_CE#
FLASHON_OE#
FLASH_WE#
FLASHON_OE#
FLASHON_WE#
DGND
RS_3R3V_ECO
DGND
DGND
_ECO
RS_3R3V_ECO
DGND
DGND
RS_3R3V_ECO
DGND
RS_3R3V_ECO
DGND
RS_3R3V_ECO
DGND
DGND
DGND
RS_3R3V_ECO
RS_3R3V_ECO
RS_3R3V_ECO
WP_FROM_N
ST_FROM_N
R2_PLD_RST_FROM_N
{13}
R2_PLD_RST_FROM_N
{13}
BR26
33Jx4
8
1
7
2
6
3
5
4
BR18
33Jx4
8
1
7
2
6
3
5
4
R1684
33J
CP1345
CP965
C1929
D_0.1uF(B:10V)
CP613
CP615
IC129
D_74LVC1G32GW
D_74LVC1G32GW
1
2
4
5
3
CP787
C1927
D_0.1uF(B:10V)
C280
0.1uF(B:10V)
CP1332
BR21
33Jx4
8
1
7
2
6
3
5
4
CP1330
CP878
CP1327
R1716
D_33J
D_33J
CP791
CP796
CP614
CP1354
CP786
CP792
R1715
D_33J
D_33J
R1713
D_33J
D_33J
C279
0.1uF(B:10V)
CP722
CP1347
C751
1000pF(B:50V)
R1711
D_4.7KJ
D_4.7KJ
CP721
CP1341
R1067
10J
10K
47K
Q46
D_DTC014YUB
D_DTC014YUB
E
B
C
CP662
BR28
33Jx4
8
1
7
2
6
3
5
4
CP1343
C349
0.1uF(B:10V)
CP618
CP795
C1931
D_0.1uF(B:10V)
D_0.1uF(B:10V)
BR17
33Jx4
8
1
7
2
6
3
5
4
CP1344
R1120
33J
R1065
10J
R1066
4.7KJ
CN12
29 6401 072 013 856+
D15/A_1
12
A0
13
A1
14
A2
15
A3
16
A4
17
A5
18
A6
28
A7
31
A8
32
A9
29
A10
33
A11
34
A12
36
A13
65
A14
66
A15
67
A16
68
A17
69
A18
70
A19
71
D0
2
D1
3
D2
4
D3
5
D4
6
D5
7
D6
8
D7
9
D8
21
D9
22
D10
23
D11
24
D12
25
D13
26
D14
27
D15/A_1
35
D16
37
D17
38
D18
49
D19
50
D20
51
D21
52
D22
53
D23
54
D24
56
D25
57
D26
58
D27
60
D28
59
D29
62
D30
63
D31
64
RP
19
RY/BY
45
A22
48
VPP
55
1CE
40
A20
41
2CE
42
4chip_CE2
43
OE
44
WP
46
WE
47
A21
11
VCC
10
GND
30
VCC
61
GND
1
GND
20
GND
39
A23
72
CP660
CP879
CP888
R1026
33J
CP881
R1685
33J
CP963
CP1346
R1063
X_33J
CP720
R1683
33J
CP719
CP1328
CP788
CP793
CP794
R1714
D_33J
D_33J
CP663
CP1331
CP790
C1928
D_1000pF(B:50V)
CP1342
BR36
33Jx4
8
1
7
2
6
3
5
4
CP1329
CP1349
CP664
CP1353
C1926
D_1000pF(B:50V)
BR22
33Jx4
8
1
7
2
6
3
5
4
BR27
33Jx4
8
1
7
2
6
3
5
4
CP1350
R1727
D_4.7KJ
D_4.7KJ
C1930
D_0.1uF(B:10V)
D_0.1uF(B:10V)
R1027
10J
IC127
D_EN29LV800CB
A0
25
A1
24
A2
23
A3
22
A4
21
A5
20
A6
19
A7
18
A8
8
A9
7
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
48
A17
17
A18
16
A19
9
A20
10
D0
29
D1
31
D2
33
D3
35
D4
38
D5
40
D6
42
D7
44
D8
30
D9
32
D10
34
D11
36
D12
39
D13
41
D14
43
D15/A-1
45
CE
26
OE
28
WE
11
WP/ACC
14
BYTE
47
RY/BY
15
RST
12
GND
46
Vcc
37
A21
13
GND
27
BR39
33Jx4
8
1
7
2
6
3
5
4
BR32
33Jx4
8
1
7
2
6
3
5
4
CP964
CP1355
R1064
33J
CP1348
CP880
R1692
10J
CP789
C348
0.1uF(B:10V)
BR37
33Jx4
8
1
7
2
6
3
5
4
R1686
33J
CP661
BR38
33Jx4
8
1
7
2
6
3
5
4
IC126
D_EN29LV800CB
A0
25
A1
24
A2
23
A3
22
A4
21
A5
20
A6
19
A7
18
A8
8
A9
7
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
48
A17
17
A18
16
A19
9
A20
10
D0
29
D1
31
D2
33
D3
35
D4
38
D5
40
D6
42
D7
44
D8
30
D9
32
D10
34
D11
36
D12
39
D13
41
D14
43
D15/A-1
45
CE
26
OE
28
WE
11
WP/ACC
14
BYTE
47
RY/BY
15
RST
12
GND
46
Vcc
37
A21
13
GND
27
IC128
D_74LVC1G08GW
D_74LVC1G08GW
B
1
A
2
G
3
Y
4
V
5
R1068
47KJ
MX-M1205 CIRCUIT DIAGRAM AND PARTS LAYOUT 2 – 47
5
5
4
4
3
3
D
C
B
A
R2_DDR_AD0
R2_DDR_AD1
R2_DDR_AD2
R2_DDR_AD1
R2_DDR_AD2
R2_DDR_AD9
R2_DDR_AD10
R2_DDR_AD11
R2_DDR_AD10
R2_DDR_AD11
R2_DDR_AD3
R2_DDR_AD12
R2_DDR_AD4
R2_DDR_AD13
R2_DDR_AD5
R2_DDR_AD6
R2_DDR_AD7
R2_DDR_AD8
R2_DDR_AD6
R2_DDR_AD7
R2_DDR_AD8
R2_DDR_BA1
R2_DDR_BA0
R2_DDR_BA2
R2_DDR_DM2
R2_DDR_DM6
R2_DDR_DM3
R2_DDR_DM4
R2_DDR_DM7
R2_DDR_DM0
R2_DDR_DQ53
R2_DDR_DQ51
R2_DDR_DQ48
R2_DDR_DQ52
R2_DDR_DQ50
R2_DDR_DQ55
R2_DDR_DQ49
R2_DDR_DQ18
R2_DDR_DQ16
R2_DDR_DQ21
R2_DDR_DQ19
R2_DDR_DQ20
R2_DDR_DQ20
R2_DDR_DQ23
R2_DDR_DQ22
R2_DDR_DQ17
R2_DDR_DQ56
R2_DDR_DQ63
R2_DDR_DQ60
R2_DDR_DQ59
R2_DDR_DQ58
R2_DDR_DQ57
R2_DDR_DQ62
R2_DDR_DQ61
R2_DDR_DQ3
R2_DDR_DQ7
R2_DDR_DQ6
R2_DDR_DQ2
R2_DDR_DQ5
R2_DDR_DQ0
R2_DDR_DQ4
R2_DDR_DQ1
R2_DDR_DQ9
R2_DDR_DQ15
R2_DDR_DQ8
R2_DDR_DQ13
R2_DDR_DQ10
R2_DDR_DQ54
R2_DDR_DQ14
R2_DDR_DM5
R2_DDR_DQ11
R2_DDR_DQ12
R2_DDR_DQ12
R2_DDR_DQ36
R2_DDR_DQ35
R2_DDR_DQ34
R2_DDR_DQ32
R2_DDR_DQ37
R2_DDR_DQ33
R2_DDR_DQ39
R2_DDR_DQ38
R2_DDR_DQ44
R2_DDR_DQ45
R2_DDR_DQ46
R2_DDR_DQ45
R2_DDR_DQ46
R2_DDR_DQ40
R2_DDR_DQ43
R2_DDR_DQ42
R2_DDR_DQ47
R2_DDR_DQ41
R2_DDR_DQ31
R2_DDR_DQ25
R2_DDR_DQ24
R2_DDR_DQ27
R2_DDR_DQ26
R2_DDR_DQ28
R2_DDR_DQ30
R2_DDR_DQ29
R2_DDR_DM1
R2_DDR_AD14
R2_DDR_AD15
R2_DDR_AD15
R2_DDR_RESET_N_O
DGND
DGND
0R75V_DDR_R2_VREF1
DGND
R2_1R5V_ECO
DGND
R2_1R5V_ECO
DGND
R2_1R5V_ECO
DGND
0R75V_DDR_R2_VREF0
R2_1R5V_ECO
DGND
DGND
DGND
DGND
R2_DDR_AD[15:0]
{27}
R2_DDR_BA[2:0]
{27}
R2_DDR_CKE0
{27}
R2_DDR_CS0
{27}
R2_DDR_ODT0
{27}
R2_DDR_DM[7:
R2_DDR_RAS
{27}
R2_DDR_CAS
{27}
R2_DDR_WE
{27}
R2_DDR_CK0P
{27}
R2_DDR_CK0N
{27}
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQS
R2_DDR_DQ[63
R2_DDR_RESET_N
{27}
C1057
0.1uF(B:10V)
C1500
10pF(CH:50V)
C1077
0.1uF(B:10V)
DDR I/F
REUS ASIC
IC42B
DDR_VREF3
F6
DDR_VREF2
J6
DDR_ODT1_IO
M2
DDR_ODT0_IO
M3
DDR_A13_IO
M4
DDR_CS_N0_IO
M5
DDR_ODT3_IO
N1
DDR_CS_N3_IO
N2
DDR_CAS_N_IO
N3
DDR_CS_N2_IO
N4
DDR_ODT2_IO
N5
DDR_CS_N1_IO
N6
DDR_WE_N_IO
P1
DDR_BA0_IO
P2
DDR_A10_IO
P3
DDR_RAS_N_IO
P4
DDR_BA1_IO
P5
DDR_CK1_IO
T1
DDR_CK_N1_IO
T2
DDR_CK_N3_IO
T4
DDR_CK3_IO
T5
DDR_VREF_CA
T7
DDR_CK_N0_IO
U1
DDR_CK0_IO
U2
DDR_CK2_IO
U4
DDR_CK_N2_IO
U5
DDR_A5_IO
W1
DDR_A3_IO
W2
DDR_A1_IO
W3
DDR_A2_IO
W4
DDR_A0_IO
W5
DDR_A12_IO
Y1
DDR_A9_IO
Y2
DDR_A8_IO
Y3
DDR_A4_IO
Y4
DDR_A7_IO
Y5
DDR_CKE2_IO
AA1
DDR_A14_IO
AA2
DDR_BA2_IO
AA3
DDR_A11_IO
AA4
DDR_A15_IO
AA5
DDR_A6_IO
AA6
DDR_CKE0_IO
AB2
DDR_CKE3_IO
AB3
DDR_CKE1_IO
AB4
DDR_RESET_N_IO
AB5
DDR_VREF1
AE6
DDR_VREF0
AH6
DDR_ZQ_IO
AN8
DDR_DQ56_IO
A4
DDR_DQ58_IO
A7
DDR_DQ55_IO
B2
DDR_DQ61_IO
B4
DDR_DQS_N7_IO
B5
DDR_DQ57_IO
B6
DDR_DQ59_IO
B7
DDR_DQ51_IO
C2
DDR_DQ50_IO
C3
DDR_DQS7_IO
C5
DDR_DDM7_IO
C6
DDR_DQ63_IO
C7
DDR_DQS6_IO
D1
DDR_DQS_N6_IO
D2
DDR_DDM6_IO
D3
DDR_DQ54_IO
D4
DDR_DQ60_IO
D6
DDR_DQ62_IO
D7
DDR_DQ49_IO
E2
DDR_DQ48_IO
E3
DDR_DQ53_IO
E4
DDR_DQ52_IO
E5
DDR_DQ47_IO
F2
DDR_DQ43_IO
F3
DDR_DQ46_IO
F4
DDR_DQ42_IO
G1
DDR_DDM5_IO
G2
DDR_DQS_N5_IO
G4
DDR_DQS5_IO
G5
DDR_DQ41_IO
H2
DDR_DQ40_IO
H3
DDR_DQ45_IO
H4
DDR_DQ44_IO
H5
DDR_DQ35_IO
J2
DDR_DQ34_IO
J3
DDR_DQ39_IO
J4
DDR_DQS4_IO
K1
DDR_DQS_N4_IO
K2
DDR_DDM4_IO
K4
DDR_DQ38_IO
K5
DDR_DQ33_IO
L2
DDR_DQ32_IO
L3
DDR_DQ37_IO
L4
DDR_DQ36_IO
L5
DDR_DQ26_IO
AC2
DDR_DQ27_IO
AC3
DDR_DQ30_IO
AC4
DDR_DQ31_IO
AC5
DDR_DQ29_IO
AD1
DDR_DDM3_IO
AD2
DDR_DQS3_IO
AD4
DDR_DQS_N3_IO
AD5
DDR_DQ24_IO
AE2
DDR_DQ25_IO
AE3
DDR_DQ28_IO
AE4
DDR_DQ18_IO
AF2
DDR_DQ19_IO
AF3
DDR_DQ22_IO
AF4
DDR_DQ23_IO
AF5
DDR_DQS_N2_IO
AG1
DDR_DQS2_IO
AG2
DDR_DDM2_IO
AG4
DDR_DQ21_IO
AG5
DDR_DQ16_IO
AH2
DDR_DQ17_IO
AH3
DDR_DQ20_IO
AH4
DDR_DQ10_IO
AJ2
DDR_DQ11_IO
AJ3
DDR_DQ14_IO
AJ4
DDR_DQ15_IO
AJ5
DDR_DQS_N1_IO
AK1
DDR_DQS1_IO
AK2
DDR_DDM1_IO
AK3
DDR_DQ13_IO
AK4
DDR_DQ7_IO
AK6
DDR_DQ6_IO
AK7
DDR_DQ8_IO
AL2
DDR_DQ9_IO
AL3
DDR_DQS0_IO
AL5
DDR_DDM0_IO
AL6
DDR_DQ5_IO
AL7
DDR_DQ12_IO
AM2
DDR_DQ3_IO
AM4
DDR_DQS_N0_IO
AM5
DDR_DQ1_IO
AM6
DDR_DQ0_IO
AM7
DDR_DQ2_IO
AN4
DDR_DQ4_IO
AN7
R1105
82F
R1100
82F
C1496
10pF(CH:50V)
R1274
510J
CP899
C1498
10pF(CH:50V)
R1103
10KJ
R1106
120F
CP898
R1104
82F
R1687
10J
C1079
0.1uF(B:10V)
R1688
10J
CP900
R1101
82F
R1439
10KJ
R1102
10KJ
C1055
0.1uF(B:10V)
MX-M1205 CIRCUIT DIAGRAM AND PARTS LAYOUT 2 – 48
3
3
2
2
1
1
D
C
B
A
0R75V_DDR_R2_VREF
DGND
DGND
DGND
DGND
DGND
DGND
R2_1R5V_ECO
0R75V_DDR_R2_VTT
DGND
RS_3R3V_ECO
5V_IN
DGND
DGND
R2_1R5V_ECO
DGND
R2_DDR_DM[7:0]
{27}
R2_DDR_DQS2P
{27}
R2_DDR_DQS2N
{27}
R2_DDR_DQS6N
{27}
R2_DDR_DQS6P
{27}
R2_DDR_DQS3P
{27}
R2_DDR_DQS3N
{27}
R2_DDR_DQS4N
{27}
R2_DDR_DQS4P
{27}
R2_DDR_DQS7N
{27}
R2_DDR_DQS7P
{27}
R2_DDR_DQS0P
{27}
R2_DDR_DQS0N
{27}
R2_DDR_DQS5N
{27}
R2_DDR_DQS5P
{27}
R2_DDR_DQS1P
{27}
R2_DDR_DQS1N
{27}
R2B_PD_RDDR_VTT_N
{24}
R2_DDR_DQ[63:0]
{27}
IC90
MP2007DH
DDQ
1
VTT
2
GND
3
VTTSEN
4
VTTREF
8
EN
7
REF
6
VDRV
5
EPad
EP
R1174
10KJ
C
1350
22uF(
2012:
B:
6.
3V)
C1327
1uF(1608:B:10V)
R1173
22J
C
1354
X_10U
F(
2012:
F:
10V)
CP1087
CP1086
C1325
10uF(2012:F:10V)
C1351
22uF(2012:B:6.3V)
C
1353
X_10U
F(
2012:
F:
10V)
C1347
1000pF(B:50V)
1000pF(B:50V)
R1175
100J
C1349
0.1uF(B:10V)
CP1054
C1326
0.1uF(B:10V)
CP1053
CP1052
C1348
1uF(1608:B:10V)
C
1352
22uF(
2012:
B:
6.
3V)
MX-M1205 CIRCUIT DIAGRAM AND PARTS LAYOUT 2 – 49
5
5
4
4
3
3
D
C
B
A
15
‵›※⁂‣
35
‵›※⁂․
33
11
25
13
1
6
R2_DDR_D_DQ56
R2_DDR_DQ56
R2_DDR_DQ13
R2_DDR_DQ13
R2_DDR_D_DQ13
R2_DDR_D_DQ46
R2_DDR_DQ46
R2_DDR_DQ54
R2_DDR_D_DQ54
R2_DDR_DQ34
R2_DDR_D_DQ34
R2_DDR_D_DQ25
R2_DDR_DQ25
R2_DDR_DQ36
R2_DDR_D_DQ36
R2_DDR_D_DQ47
R2_DDR_DQ47
R2_DDR_DQ2
R2_DDR_D_DQ2
R2_DDR_DQ21
R2_DDR_D_DQ21
R2_DDR_DQ23
R2_DDR_D_DQ23
R2_DDR_D_DQ33
R2_DDR_DQ33
R2_DDR_DQ48
R2_DDR_D_DQ48
R2_DDR_D_DQ27
R2_DDR_DQ27
R2_DDR_D_DQ62
R2_DDR_DQ62
R2_DDR_DQ9
R2_DDR_DQ9
R2_DDR_D_DQ9
R2_DDR_DQ51
R2_DDR_D_DQ51
R2_DDR_DQ15
R2_DDR_DQ15
R2_DDR_D_DQ15
R2_DDR_AD12
R2_DDR_RAS
R2_DDR_CAS
R2_DDR_WE
R2_DDR_BA0
R2_DDR_AD0
R2_DDR_AD6
R2_DDR_AD15
R2_DDR_AD3
R2_DDR_AD10
R2_DDR_AD13
R2_DDR_AD2
R2_DDR_AD1
R2_DDR_AD9
R2_DDR_AD5
R2_DDR_AD8
R2_DDR_AD4
R2_DDR_AD7
R2_DDR_AD14
R2_DDR_AD11
R2_DDR_DQ11
R2_DDR_DQ11
R2_DDR_D_DQ11
R2_DDR_CKE0
R2_DDR_ODT0
R2_DDR_ODT0
R2_DDR_CS0
R2_DDR_BA1
R2_DDR_BA2
R2_DDR_BA2
R2_DDR_DQ42
R2_DDR_D_DQ42
R2_DDR_RESET_N
R2_DDR_DQ6
R2_DDR_D_DQ6
R2_DDR_D_DM3
R2_DDR_DQ5
R2_DDR_D_DQ5
R2_DDR_D_DQS2N
R2_DDR_D_DQS2P
R2_DDR_DQ31
R2_DDR_D_DQ31
R2_DDR_DQ0
R2_DDR_D_DQ0
R2_DDR_D_DQ17
R2_DDR_D_DQ18
R2_DDR_D_DQ18
R2_DDR_D_DQ23
R2_DDR_D_DQ21
R2_DDR_D_DQ16
R2_DDR_D_DQ20
R2_DDR_D_DQ22
R2_DDR_D_DQ19
R2_DDR_DQ26
R2_DDR_D_DQ26
R2_DDR_DQ4
R2_DDR_D_DQ4
R2_DDR_DQ39
R2_DDR_D_DQ39
R2_DDR_D_DQS1N
R2_DDR_D_DQS1P
R2_DDR_D_DM1
R2_DDR_D_DQ9
R2_DDR_D_DQ10
R2_DDR_D_DQ10
R2_DDR_D_DQ15
R2_DDR_D_DQ13
R2_DDR_D_DQ8
R2_DDR_D_DQ12
R2_DDR_D_DQ14
R2_DDR_D_DQ11
R2_DDR_DQ60
R2_DDR_D_DQ60
R2_DDR_DQ19
R2_DDR_D_DQ19
R2_DDR_DQ61
R2_DDR_D_DQ61
R2_DDR_DQ17
R2_DDR_D_DQ17
R2_DDR_DQ63
R2_DDR_D_DQ63
R2_DDR_DQ49
R2_DDR_D_DQ49
R2_DDR_DQ12
R2_DDR_DQ12
R2_DDR_D_DQ12
R2_DDR_DQ50
R2_DDR_D_DQ50
R2_DDR_DQ14
R2_DDR_D_DQ14
R2_DDR_DQ53
R2_DDR_D_DQ53
R2_DDR_DQ8
R2_DDR_DQ8
R2_DDR_D_DQ8
R2_DDR_DQ40
R2_DDR_D_DQ40
R2_DDR_DQ41
R2_DDR_D_DQ41
R2_DDR_D_DQS3N
R2_DDR_D_DQS3P
R2_DDR_DQ1
R2_DDR_D_DQ1
R2_DDR_DQ44
R2_DDR_D_DQ44
R2_DDR_D_DQ25
R2_DDR_D_DQ26
R2_DDR_D_DQ26
R2_DDR_D_DQ31
R2_DDR_D_DQ29
R2_DDR_D_DQ24
R2_DDR_D_DQ28
R2_DDR_D_DQ30
R2_DDR_D_DQ27
R2_DDR_DQ3
R2_DDR_D_DQ3
R2_DDR_D_DM2
R2_DDR_DQ45
R2_DDR_D_DQ45
R2_DDR_DQ29
R2_DDR_D_DQ29
R2_DDR_D_DQ7
R2_DDR_DQ7
R2_DDR_D_DQ32
R2_DDR_DQ32
R2_DDR_DQ24
R2_DDR_D_DQ24
R2_DDR_DQ20
R2_DDR_D_DQ20
R2_DDR_CAS
R2_DDR_RAS
R2_DDR_RAS
R2_DDR_D_DQ59
R2_DDR_DQ59
R2_DDR_RESET_N
R2_DDR_AD1
R2_DDR_AD3
R2_DDR_AD1
R2_DDR_AD1
R2_DDR_AD2
R2_DDR_AD1
R2_DDR_AD9
R2_DDR_AD5
R2_DDR_AD8
R2_DDR_AD4
R2_DDR_AD7
R2_DDR_AD1
R2_DDR_AD1
R2_DDR_CKE
R2_DDR_ODT
R2_DDR_ODT
R2_DDR_CS0
R2_DDR_DQ57
R2_DDR_D_DQ57
R2_DDR_BA1
R2_DDR_BA2
R2_DDR_BA2
R2_DDR_BA0
R2_DDR_AD0
R2_DDR_AD6
R2_DDR_AD1
R2_DDR_WE
R2_DDR_DQ22
R2_DDR_D_DQ22
R2_DDR_D_DQS0N
R2_DDR_D_DQS0P
R2_DDR_D_DM0
R2_DDR_D_DQ1
R2_DDR_D_DQ2
R2_DDR_D_DQ2
R2_DDR_D_DQ7
R2_DDR_D_DQ5
R2_DDR_D_DQ0
R2_DDR_D_DQ4
R2_DDR_D_DQ6
R2_DDR_D_DQ3
R2_DDR_DQ55
R2_DDR_D_DQ55
R2_DDR_D_DQ30
R2_DDR_DQ30
R2_DDR_DQ18
R2_DDR_D_DQ18
R2_DDR_D_DQ58
R2_DDR_DQ58
R2_DDR_D_DQ35
R2_DDR_DQ35
R2_DDR_D_DQ43
R2_DDR_DQ43
R2_DDR_DQ52
R2_DDR_D_DQ52
R2_DDR_DQ16
R2_DDR_D_DQ16
R2_DDR_D_DQ37
R2_DDR_DQ37
R2_DDR_DQ10
R2_DDR_D_DQ10
R2_DDR_DQ28
R2_DDR_D_DQ28
R2_DDR_D_DQ38
R2_DDR_DQ38
R2_DDR_AD5
R2_DDR_AD2
R2_DDR_BA2
R2_DDR_AD4
R2_DDR_AD1
R2_DDR_AD13
R2_DDR_BA1
R2_DDR_CKE0
R2_DDR_CAS
R2_DDR_CAS
R2_DDR_AD10
R2_DDR_WE
R2_DDR_AD11
R2_DDR_ODT0
R2_DDR_CS0
R2_DDR_CS0
R2_DDR_AD8
R2_DDR_AD3
R2_DDR_AD0
R2_DDR_RAS
R2_DDR_AD9
R2_DDR_AD6
R2_DDR_BA0
R2_DDR_CK0N
R2_DDR_CK0P
R2_DDR_RESET_N
R2_DDR_RESET_N
R2_DDR_DM5
R2_DDR_DM5
R2_DDR_D_DQS4N
R2_DDR_D_DQS5N
R2_DDR_D_DQS5P
R2_DDR_D_DQS4P
R2_DDR_D_DQS6N
R2_DDR_D_DQS7P
R2_DDR_D_DQS7N
R2_DDR_D_DQS7P
R2_DDR_D_DQS7N
R2_DDR_D_DQS6P
R2_DDR_DM7
R2_DDR_DM6
R2_DDR_DM6
R2_DDR_D_DQS0N
R2_DDR_DM1
R2_DDR_DM1
R2_DDR_DM3
R2_DDR_DM3
R2_DDR_DM2
R2_DDR_DM2
R2_DDR_DM0
R2_DDR_DM0
R2_DDR_DM4
R2_DDR_DM4
R2_DDR_D_DM1
R2_DDR_D_DM2
R2_DDR_D_DM3
R2_DDR_D_DM4
R2_DDR_D_DM5
R2_DDR_D_DM6
R2_DDR_D_DM7
R2_DDR_D_DM2
R2_DDR_D_DM3
R2_DDR_D_DM4
R2_DDR_D_DM5
R2_DDR_D_DM6
R2_DDR_D_DM7
R2_DDR_D_DM0
R2_DDR_D_DQS1N
R2_DDR_D_DQS1P
R2_DDR_D_DQS0P
R2_DDR_D_DQS2N
R2_DDR_D_DQS3P
R2_DDR_D_DQS3N
R2_DDR_D_DQS3P
R2_DDR_D_DQS3N
R2_DDR_D_DQS2P
R2_CK0_TERM
R2_DDR_CK0P
R2_DDR_CK0N
R2_DDR_AD12
R2_DDR_AD7
R2_DDR_AD14
R2_DDR_AD15
R2_DDR_AD15
R2_1R5V_ECO
DGND
DGND
DGND
R2_1R5V_ECO
DGND
DGND
R2_1R5V_ECO
DGND
DGND
R2_VREFCA1
R2_VREFDQ
1
DGND
DGND
R2_1R5V_ECO
DGND
DGND
R2_1R5V_ECO
DGND
DGND
R2_VREFCA2
R2_VREFDQ
2
DGND
R2_1R5V_
R2_DDR_CK0P
{26}
R2_DDR_CK0N
{26}
R2_DDR_DQ[63:0]
{26}
R2_DDR_CK0N
{26}
R2_DDR_CAS
{26}
R2_DDR_ODT0
{26}
R2_DDR_WE
{26}
R2_DDR_CKE0
{26}
R2_DDR_CS0
{26}
R2_DDR_BA[2:0]
{26}
R2_DDR_RAS
{26}
R2_DDR_AD[15:0]
{26}
R2_DDR_DM[7:0]
{26}
R2_DDR_CK0P
{26}
R2_DDR_RESET_N
{26}
R2_DDR_DQS3N
{26}
R2_DDR_DQS3P
{26}
R2_DDR_DQS4N
{26}
R2_DDR_DQS4P
{26}
R2_DDR_DQS0N
{26}
R2_DDR_DQS0P
{26}
R2_DDR_DQS5N
{26}
R2_DDR_DQS5P
{26}
R2_DDR_DQS1N
{26}
R2_DDR_DQS1P
{26}
R2_DDR_DQS6N
{26}
R2_DDR_DQS6P
{26}
R2_DDR_DQS7N
{26}
R2_DDR_DQS7P
{26}
R2_DDR_DQS2N
{26}
R2_DDR_DQS2P
{26}
C1632
0.1UF(B:10V)
R1463
15J
R1456
82F
R1479
15J
BR64
15Jx4
8
1
7
2
6
3
5
4
C1634
BR73
15Jx4
8
1
7
2
6
3
5
4
C1643
C1682
47pF(CH:50V)
47pF(CH:50V)
DP13
R1464
15J
C1674
0.1uF(B:10V)
BR76
15Jx4
8
1
7
2
6
3
5
4
C1655
C1668
0.1UF(B:10V)
R1484
30J
C1626
0.1UF(B:10V)
R1470
15J
BR67
15Jx4
8
1
7
2
6
3
5
4
C1622
0.1UF(B:10V)
0.1UF(B:10V)
R1483
15J
DP11
C1646
0.1UF(B:10V)
C1627
R1473
15J
C1662
0.1UF(B:10V)
BR71
15Jx4
8
1
7
2
6
3
5
4
R1467
15J
R1444
82F
C1642
0.1UF(B:10V)
BR66
15Jx4
8
1
7
2
6
3
5
4
BR68
15Jx4
8
1
7
2
6
3
5
4
R1462
15J
BR72
15Jx4
8
1
7
2
6
3
5
4
C1663
R1482
15J
C1633
0.1UF(B:10V)
0.1UF(B:10V)
R1465
15J
C1651
R1475
15J
R1485
30J
R1450
82F
BR63
15Jx4
8
1
7
2
6
3
5
4
DDR3CHIP_2GBIT(X16)
IC101
DQU5
A3
DQU7
A4
DQU4
A8
VSS
A10
VSSQ
B2
VSS
B4
DQSU#
B8
DQU6
B9
VSSQ
B10
DQU3
C3
DQU1
C4
DQSU
C8
DQU2
C9
VSSQ
D2
DMU
D4
DQU0
D8
VSSQ
D9
VSS
E2
VSSQ
E3
DQL0
E4
DML
E8
VSSQ
E9
DQL2
F3
DQSL
F4
DQL1
F8
DQL3
F9
VSSQ
F10
VSSQ
G2
DQL6
G3
DQSL#
G4
VSS
G9
VSSQ
G10
VREFDQ
H2
DQL4
H4
DQL7
H8
DQL5
H9
NC
J2
VSS
J3
VSS
J9
NC
J10
NC
L2
NC
L10
VSS
M2
VREFCA
M9
VSS
M10
VSS
P2
VSS
P10
VSS
T2
NC(A14)
T8
VSS
T10
VDDQ
A2
VDDQ
A9
VDD
B3
VDDQ
C2
VDDQ
C10
VDDQ
D3
VDD
D10
VDDQ
E10
VDDQ
F2
VDD
G8
VDDQ
H3
VDDQ
H10
RAS#
J4
CK
J8
ODT
K2
VDD
K3
CAS#
K4
CK#
K8
VDD
K9
CKE
K10
CS#
L3
WE#
L4
A10/AP
L8
ZQ
L9
BA0
M3
BA2
M4
NC(A15)
M8
VDD
N2
A3
N3
A0
N4
A12/BC#
N8
BA1
N9
VDD
N10
A5
P3
A2
P4
A1
P8
A4
P9
VDD
R2
A7
R3
A9
R4
A11
R8
A6
R9
VDD
R10
RESET#
T3
A13
T4
A8
T9
C1679
10UF(2012:F
C1683
4PF(CH:50V)
4PF(CH:50V)
BR74
15Jx4
8
1
7
2
6
3
5
4
CP1261
R1440
240F
R1461
15J
DP29
R1457
82F
R1481
15J
C1650
0.1UF(B:10V)
C1653
0.1UF(B:10V)
R1477
15J
CP1265
C1623
0.1UF(B:10V)
0.1UF(B:10V)
CP1268
BR70
15Jx4
8
1
7
2
6
3
5
4
C1671
R1468
15J
DP31
R1471
15J
DP9
C1639
R1472
15J
C1678
10UF(2012:F:10V)
R1478
15J
BR61
15Jx4
8
1
7
2
6
3
5
4
C1659
0.1UF(B:10V)
C1654
0.1UF(B:10V)
R1474
15J
C1630
0.1UF(B:10V)
C1684
0.1UF(B:10V)
DDR3CHIP_2GBIT(X16)
IC102
DQU5
A3
DQU7
A4
DQU4
A8
VSS
A10
VSSQ
B2
VSS
B4
DQSU#
B8
DQU6
B9
VSSQ
B10
DQU3
C3
DQU1
C4
DQSU
C8
DQU2
C9
VSSQ
D2
DMU
D4
DQU0
D8
VSSQ
D9
VSS
E2
VSSQ
E3
DQL0
E4
DML
E8
VSSQ
E9
DQL2
F3
DQSL
F4
DQL1
F8
DQL3
F9
VSSQ
F10
VSSQ
G2
DQL6
G3
DQSL#
G4
VSS
G9
VSSQ
G10
VREFDQ
H2
DQL4
H4
DQL7
H8
DQL5
H9
NC
J2
VSS
J3
VSS
J9
NC
J10
NC
L2
NC
L10
VSS
M2
VREFCA
M9
VSS
M10
VSS
P2
VSS
P10
VSS
T2
NC(A14)
T8
VSS
T10
VDDQ
A2
VDDQ
A9
VDD
B3
VDDQ
C2
VDDQ
C10
VDDQ
D3
VDD
D10
VDDQ
E10
VDDQ
F2
VDD
G8
VDDQ
H3
VDDQ
H10
RAS#
J4
CK
J8
ODT
K2
VDD
K3
CAS#
K4
CK#
K8
VDD
K9
CKE
K10
CS#
L3
WE#
L4
A10/AP
L8
ZQ
L9
BA0
M3
BA2
M4
NC(A15)
M8
VDD
N2
A3
N3
A0
N4
A12/BC#
N8
BA1
N9
VDD
N10
A5
P3
A2
P4
A1
P8
A4
P9
VDD
R2
A7
R3
A9
R4
A11
R8
A6
R9
VDD
R10
RESET#
T3
A13
T4
A8
T9
R1445
82F
C1667
0.1UF(B:10V)
DP15
R1466
15J
R1476
15J
CP1269
C1675
R1455
82F
BR69
15Jx4
8
1
7
2
6
3
5
4
C1666
0.1uF(B:10V)
BR75
15Jx4
8
1
7
2
6
3
5
4
R1480
15J
CP1264
BR62
15Jx4
8
1
7
2
6
3
5
4
R1448
82F
R1469
15J
C1638
0.1UF(B:10V)
BR65
15Jx4
8
1
7
2
6
3
5
4
R1460
15J
C1647
R1452
82F
Click on the first or last page to see other MX-M1055 / MX-M1205 (serv.man3) service manuals if exist.