Sharp MX-5500N / MX-6200N / MX-7000N (serv.man41) Service Manual ▷ View online
MX7000N CIRCUIT DIAGRAM / 回路図 2 – 3
X1
32.875MHz(SMT)
R23
X_1MJ
IC3
ASM3P2780AF-06OR
Xin/CLKIN
3
VSS 6
PD
1
MODOUT 5
VDD 4
Xout
2
R56
X_22J
R722
100KJ
CP
X6
SG8002JF(14.5MHz/ST MODE)
ST
1
GND
2
OUT 3
VDD 4
CP53
X20
X_SG8002JF(16.500MHz/ST MODE)
ST
1
GND
2
OUT 3
VDD 4
CP81
C25
0.1uF(B)
IC101
X_CY23S05SXC1T
IN
1
GND
4
OUT1
3
OUT2
2
OUT4 7
VDD 6
OUT3 5
CLKOUT 8
CP1116
R24
33J
C50
0.1uF(B)
C878
7pF(CH)
CP1111
CP149
X10
X_SG8002JF(33.560MHz/ST MODE)
ST
1
GND
2
OUT
3
VDD
4
R28
33J
CP1109
CP56
CP1113
R97
22J
CP
CP54
CP150
R729
X_22J
CP
R26
33J
R29
X_0J
CP115
CP
CP
R36
X_33J
L2
BLM15A
G121SN1(1005)
1
2
CP57
R37
33J
CP148
C26
10pF(CH)
R40
33J
R22
220J
CP151
C384
150pF
R38
33J
C869 X_0.1uF(B)
CP88
CP1110
C27
10pF(CH)
CP52
IC14
ASM3P2274AF-06OR
Xin/CLKIN
3
VSS 6
PD
1
MODOUT 5
VDD 4
Xout
2
C31
X_0.1uF(B)
C51
0.1uF(B)
CP1114
IC6
X_ASM3P2780AF-06OR
Xin/CLKIN
3
VSS 6
PD
1
MODOUT 5
VDD 4
Xout
2
C39
X_0.1uF(B)
CP78
C877 X_0.1uF(B)
R122
1KJ
C879 X_0.1uF(B)
IC100
X_ASM3P2274AF-06OR
Xin/CLKIN
3
VSS 6
PD
1
MODOUT 5
VDD 4
Xout
2
R44
X_22J
R47
X_33J
CP1112
CP69
CP
R96
22J
CP55
CP111
CLK66BASE
CLK25SOSBASE
GPO_n
CLK33BASE
IMGICUCLK_BASE
ICUSYSCLK33_2BASE
PCI2_CLK66_2
PCI2_CLK66_4
PCI2_CLK66_3
PCI2_CLK66_1
+3.3V
+3.3V
+3
+3.3V
+3.3V
DGND
DGND
DGND
DGND
DGND
DGND
+3.3V
DGND
+3.3V
+3.3V
DGND
DGND
+3.3V
DGND
+3.3V
+3.3V
DGND
+3.3V
DGND
DGND
+3.3V
DGND
GPO_nICUIMGCLKENB
{43}
GPO_nBCCLKSTOP
{43}
GPO_nBCCLKSTOP
{43}
5
5
4
4
3
3
D
C
B
A
MFPC PWB (GLOBAL CLOCK)
MX7000N CIRCUIT DIAGRAM / 回路図 2 – 4
C32
0.1uF(B)
CP84
CP87
CP83
BP32
CP74
C28
0.1uF(B)
X14
X_SG8002JF(16.450MHz/ST MODE)
ST
1
GND
2
OUT 3
VDD 4
CP1099
R33
47J
CP96
C35
7pF(CH)
CP93
R50
33J
CP109
C872
X_0.1uF(B)
CP288
CP92
R731
X_22J
R43
33J
CP103
CP64
CP75
CP1100
C40
X_150pF
CP110
CP62
CP91
R730
X_33J
IC98
X_ASM3P2274AF-06OR
Xin/CLKIN
3
VSS 6
PD
1
MODOUT 5
VDD 4
Xout
2
IC9
SN74LVC244APWR
1A1
2
1A2
4
1A3
6
1A4
8
2A1
11
2A2
13
2A3
15
2A4
17
1G
1
2G
19
1Y1
18
1Y2
16
1Y3
14
1Y4
12
2Y1
9
2Y2
7
2Y3
5
2Y4
3
VCC
20
GND
10
CP104
CP1115
CP60
CP58
CP80
CP289
CP59
CP63
CP70
R68
33J
IC4
SN74LVC244APWR
1A1
2
1A2
4
1A3
6
1A4
8
2A1
11
2A2
13
2A3
15
2A4
17
1G
1
2G
19
1Y1 18
1Y2 16
1Y3 14
1Y4 12
2Y1 9
2Y2 7
2Y3 5
2Y4 3
VCC
20
GND
10
CP90
R66
33J
R49
33J
L2
BLM15A
G121SN1(1005)
1
2
BR1
47KJx4
8
1
7
2
6
3
5
4
R39
220J
CP61
CP89
IC5
CY23S09SXC1T
REFIN
1
VDD
4
OUTA2
3
OUTA1
2
OUTB2
7
OUTB1
6
GND
5
S2
8
S1 9
OUTB3 10
OUTB4 11
GND 12
VDD 13
OUTA3 14
OUTA4 15
CLKOUT 16
CP102
R52
X_68J
CP95
CP71
CP107
CP68
CP287
R48
47J
R54
X_33J
CP67
CP94
C873
X_0.1uF(B)
CP100
R35
220J
CP1101
CP73
R51
33J
R727
X_33J
BP1
R46
47J
CP282
CP114
R41
47J
CP113
L3
BLM15A
G121SN1(1005)
1
2
R732
X_22J
R30
47J
C29
0.1uF(B)
CP98
R53
33J
CP105
CP97
C41
0.1uF(B)
BR2
47KJx4
8
1
7
2
6
3
5
4
CP79
CP86
R55
33J
R728
X_33J
CP72
R31
47J
CP66
CP99
CP65
R67
33J
PO_nICUIMGCLKENB
ICUSYSCLK33_2BASE
PCICLK_BASE2
E
BASE
CLK3265
PCI2_CLK66_1
PCI2_CLK66_4
PCI2_CLK66_3
PCI2_CLK66_2
+3.3V
+3.3V
DGND
DGND
DGND
+3.3V
DGND
DGND
DGND
DGND
+3.3V
+3.3V
DGND
DGND
+3.3V
DGND
+3.3V
DGND
DGND DGND
DGND
SA_MST_CLK {13}
ICUSYSCLK33_1 {38}
IMGSYSCLK33 {40}
IMG_OBCLKI {41}
IMG_OCCLKI {41}
ICU_SOCLK {36}
SA_PCI1_CLK {12}
MAC_PCI1_CLK {17}
IF_PCI1_CLK {23}
PCI1_EXTCLK {33}
CLOCK3333 {43}
IDE_PCI2_CLK {16}
PCI2_EXTCLK {33}
SA_PCI2_CLK {12}
ICU_PCI2_CLK {36}
Down-1.5%
3
3
2
2
1
1
D
C
B
A
2/42
MX7000N CIRCUIT DIAGRAM / 回路図 2 – 5
CP147
C785
0.1uF(B)
Q4
DTC114YUA
E
B
C
10K
47K
CP116
R88
X_1MJ
X_1MJ
R91
22J
L4
BLM15AG121SN1(1005)
1
2
X5
IC91
ASM3P2474AF-06OR
Xin/CLKIN
3
VSS
6
x1/x2
1
MODOUT
5
VDD
4
Xout
2
CP144
CP117
C97
0.1uF(B)
CP145
R69
220J
C42
15pF(CH)
CP118
C46
27pF(CH)
CP135
X4
25.0000MHz(SMT)
R85
10KJ
C47
27pF(CH)
C43
15pF(CH)
IC11
SN74LVC244APWR
1A1
2
1A2
4
1A3
6
1A4
8
2A1
11
2A2
13
2A3
15
2A4
17
1G
1
2G
19
1Y1 18
1Y2 16
1Y3 14
1Y4
12
2Y1 9
2Y2 7
2Y3 5
2Y4 3
VCC
20
GND 10
CP120
CP146
CP137
CP
IC13
ASM3P2779AF-06OR
Xin/CLKIN
3
VSS 6
PD
1
MODOUT 5
VDD 4
Xout
2
C45
0.1uF(B)
CP
R70
X_1MJ
R87
220J
CP133
CP
CLK50
CLKUARTBASE
+3.3V
DGND
DGND
DGND
DGND
+3.3V
DGND
DGND
+3.3V
+3.3V
DGND
+3.3V
DGND
DGND
DGND
GPO_nSMICCLKENB
{43}
GPO_nIFCLKENB
{43}
{3
5
5
4
4
3
3
D
C
B
A
MFPC PWB (GLOBAL CLOCK 2)
14.7456MHz(SMT)
MX7000N CIRCUIT DIAGRAM / 回路図 2 – 6
R84
56J
IC12
SN74LVC74APWR
D1
2
CK1
3
Q1
5
QB1
6
VCC
14
GND
7
S1
4
R1
1
D2
12
CK2
11
S2
10
R2
13
Q2
9
QB2
8
CP126
BP13
R86
47J
CP128
R543
X_22J
R79
33J
CP121
CP130
CP139
C49
0.1uF(B)
CP134
CP142
R73
47J
R80
100J
CP124
CP290
CP141
CP129
CP291
R71
47KJ
R76
33J
CP136
CP1090
CP138
L5
BLM15AG121SN1(1005)
1
2
R75
33J
CP140
CP292
+3.3V
+3.3V
DGND
DGND
+3.3V
SMIC_CLK {13}
SA_UART_CLK {13}
IF_SYSCLK {20}
IF_UART_CLK0 {20}
IF_UART_CLK1 {20}
IBVSYNCB {41}
SEGOVSYNC_N_P
{37}
VSYNC_RESET
{40}
VSYNC_SET
{40}
3
3
2
2
1
1
D
C
B
A
3/42
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