DOWNLOAD Sharp MX-5500N / MX-6200N / MX-7000N (serv.man41) Service Manual ↓ Size: 21.31 MB | Pages: 127 in PDF or view online for FREE

Model
MX-5500N MX-6200N MX-7000N (serv.man41)
Pages
127
Size
21.31 MB
Type
PDF
Document
Service Manual
Brand
Device
Copying Equipment / Circuit Diagram
File
mx-5500n-mx-6200n-mx-7000n-sm41.pdf
Date
PREV: Sharp MX-5500N / MX-6200N / MX-7000N (serv.man40) Service Manual / Specification

Sharp MX-5500N / MX-6200N / MX-7000N (serv.man41) Service Manual ▷ View online

MX7000N  CIRCUIT DIAGRAM / 回路図  2 – 34
49
33J
R615
10KJ
50
33J
CP1094
R774
0J
33J
R616
2.2KJ
CP1096
CP1103
CP1102
SIN_JTAG_TDO
AG_TCK
DGND
DGND
LINGT_SCN {38,41}
nSSYNC_SCN {38,41}
nHSYNC_SCN {38,41}
DOTGT_SCN {38,41}
TEST_JTCK3 {38,40,44}
SIN_JTAG_TDO {44}
3
3
2
2
1
1
D
C
B
A
17/42
MX7000N  CIRCUIT DIAGRAM / 回路図  2 – 35
CP531
CP592
CP530
CP528
D7
HZM6.2Z4MWA
A
K1
K2
R335 X_10J
C399
0.01uF
C3
R451
nanoSMDC110F(3216)
D5
1SS355
AK
R304
10KJ
R477
1KJ
R342
X_2.2KJ
R321
10J
R312
10KJ
CP591
CP732
R341
4.7KJ
R325 X_10J
R332 27F
L51
BLM18PG121SN1(1608)
L27
BLM18PG121SN1(1608)
R373
2.2KJ
R337
10KJ
R326
10KJ
R691
47KJ
CP536
CP533
D4
HZM6.2Z4MWA
A
K1
K2
R322
6.81KF
CN9
UAR27-4K5J00
VBUS 1
D-
2
D+ 3
GND 4
FG
FG1
FG
FG2
CP537
CN8
UBR23-4K2200
VBUS 1
D-
2
D+ 3
GND 4
FG
FG1
FG
FG2
FA-365
CP522
C739
0.1uF(B)
L26
ACM2012-900-2P
1
1
2
2
3
3
4
4
C390
0.01uF
R305
X_1KJ
C392
X_10pF(CH)
L24
BLM15AG121SN1(1005)
CP737
R308
X_0J
R333
15KJ
C391
10uF(2012)
R562
47KJ
BP53
R307
X_0J
R313
10KJ
R334
15KJ
C386
0.1uF(B)
CP541
CP525
R319
X_10KJ
X9
SG8002JF(48.0000MHz/ST MODE)
CONT
1
GND
2
OUT 3
VDD 4
CP534
R324
2.2KJ
R331 27F
CP527
IC53
BD6512F-E2
CTRLA 1
FLAGA 2
FLAGB 3
CTRLB 4
OUTB
5
GND
6
VDD
7
OUTA
8
L28
ACM2012-900-2P
1
1
2
2
3
3
4
4
L29
BLM18PG121SN1(1608)
C398
47uF/16V(MVL/F60)
+
-
+
R318
X_10KJ
R336
X_10KJ
CP529
C397
10uF(2012)
CP526
L25
BLM15AG121SN1(1005)
R303
10KJ
D6
1SS355
AK
HCLK_SEL
CLKSEL
USB_D_DP
USB_D_DM
VBUSPAD
USB_H_DP
USB_H_DM
DGND
DGND
DGND
DGND
DGND
DGND
+3.3V
DGND
+1.8V
DGND
DGND
DGND
DGND
+3.3V
DGND
+3.3V
+3.3V
DGND
DGND
+3.3V
+3.3V
+3.3V
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
+5V_IN
+5V_IN
DGND
CPU_MODECLK_3.3V
{6}
IF_SYSCLK
{5}
nIFASIC_RST
{18}
GPIO_USBHPOWER
GPI_nUSBOVERLOA
GPO_USBHCLK_ENB
{43}
{5}
{5}
LBU
{13}
LBU
{13}
LBU
{13}
LBU
{13}
(USB B TYPE CONNECTOR)
H:PLL
L:External
H:100M
L:50M
SEL0
SEL1
(USB A TYPE CONNECTOR)
5
5
4
4
3
3
D
C
B
A
MFPC PWB (IF ASIC : BTMC, I2C, RTC, SYSTEM, USB, UART)
MX7000N  CIRCUIT DIAGRAM / 回路図  2 – 36
CP521
CP1154
CP552
R755
33J
R329
33J
C932
18pF(CH)
R756
33J
C387
0.1uF(B)
C396
X_0.1uF(B)
R343
X_33J
CP611
CP547
CP548
CP751
IC51A
IF ASIC
IF ASIC
MODECLK
C22
MODESEL[0]
B24
MODESEL[1]
A24
MODESEL[2](PD)
B23
I2C_SDA
B22
LSI_IDDT
B05 LSI_SCAN_ENABLE
A05
LSI_TCK(PD)
C04
LSI_TDI(PU)
B04
LSI_TMS(PU)
A04
LSI_TN(PU)
D07
LSI_TRSTN(PU)
C06
RTC_DATA/I2C_SDA2(OD)
W26
CLKSEL
C25
SYSCLK
B26
XRESET
D24
TEST_MODE
C05
USB_H_CLK
G03
USB_H_DM
F01
USB_H_DP
E01
USB_D_CLK
M04
USB_D_DM
J01
USB_D_DP
K01
USB_REXT
J04
VBUSPAD
H02
CTS[1]
AD02
CTS[2]
AE01
CTS[3]
AC03
CTS[4]
AF02
CTS[5]
AE03
CTS[6]
AD04
CTS[7]
AF03
CTS[8]
AE04
RXD[1]
AD07
RXD[2]
AE07
RXD[3]
AF07
RXD[4]
AC08
RXD[5]
AD08
RXD[6]
AE08
RXD[7]
AF08
RXD[8]
AC09
UART_CLK0
AC02
UART_CLK1
AD01
XLBUS_DMA_ACK[0]
AE11
XLBUS_DMA_ACK[1]
AF11
XLBUS_DMA_TC[0]
AC01
XLBUS_DMA_TC[1]
AB03
MODEIN
A23
SCL
A22
LSI_PROCMON
A03
LSI_TDO
B06
PWM_OUT
B03
RTC_CE/I2C_SCL2
W24
RTC_CLK
W25
RTC_IO
V23
RTS[1]
AF04
RTS[2]
AD05
RTS[3]
AE05
RTS[4]
AF05
RTS[5]
AD06
RTS[6]
AE06
RTS[7]
AF06
RTS[8]
AC07
TXD[1]
AD09
TXD[2]
AE09
TXD[3]
AF09
TXD[4]
AD10
TXD[5]
AE10
TXD[6]
AF10
TXD[7]
AD11
TXD[8]
AC11
XLBUS_DMA_REQ[0]
AD12
XLBUS_DMA_REQ[1]
AC12
USB11_AVSS
F03
USB11_AVDD
G04
HCLK_SEL
Y26
VDDA
L03
VDDABIAS33
J03
VDDPLL18
M03
VDDSQUELCH18
L02
VDDXOSC18
N03
VSSXOSC
M02
VSSSQUELCH
L04
VSSPLL
L01
VSSABIAS
H01
VSSA
J02
XOUTPAD
M01
SYS_PLLVDD
A25
SYS_PLLVSS
C23
IF ASIC 1/5
BTMC
I2C
LSI
PWM
RTC
SYSTEM
TEST PIN
USB1.1 HOST
USB2.0 DEVICE
UART
C823
0.1uF(B)
C822
0.01uF
R327
33J
C820
0.01uF
C388
220pF
C934
18pF(CH)
C783
0.1uF(B)
C781
0.1uF(B)
C389
0.01uF
CP991
CP1150
L53
BLM15AG121SN1(1005)
CP752
C779
0.1uF(B)
R316
4.7KJ
R339
2.2KJ
C780
0.1uF(B)
R328
33J
CP987
R330
33J
CP553
R320
1KJ
C782
0.1uF(B)
R311
2.2KJ
X13
A-365(12.000MHz/12pF/50ppm)
CP542
CP992
L56
BLM15AG121SN1(1005)
CP516
CP543
CP549
C964
1uF(1608:B)
05
KJ
C385
470pF
CP589
RJ3
X_0J
R306
33J
R340
2.2KJ
C765
0.1uF(B)
C933
X_22pF(CH)
R360
X_33J
L52
BLM15AG121SN1(1005)
CP523
CP518
C821
10uF(2012)
CP1003
CP517
C761
0.1uF(B)
CN10
BM08B-SRSS-TB
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
R338
X_2.2KJ
CP1151
CP590
R344
X_33J
CP551
IC52
X_CAT24WC02(SOP8)
A0
1
A1
2
A2
3
VSS
4
SDA 5
SCL 6
WP 7
VCC 8
CP550
R754
0J
RTC_DATA
I2C_SDA
I2C_CLK
USB_H_DM
USB_H_DP
VBUSPAD
USB_D_DP
USB_D_DM
EEPROMWP
I2C_SDA
I2C_CLK
I2C_SDA
I2C_CLK
EEPROMWP
RTC_DATA
DGND
DGND
DGND
+3.3V
DGND
DGND
DGND
+3.3V
+3.3V
+3.3V
DGND
+1.8V
DGND
+3.3V
+3.3V
DGND
+1.8V_IFCORE
+1.8V_IFCORE
DGND
DGND
+3.3V
DGND
MODEDAT_3.3V {7}
TEST_JTRST1 {7,13,44}
TEST_JTMS2 {18,44}
RTC_CE
{18}
RTC_CLK {27}
RTC_DATA {27}
OWERON {43}
RLOAD {43}
CTS1
{32}
CTS2
{32}
CTS3
{32}
CTS4
{32}
RXD1
{32}
RXD2
{32}
RXD3
{32}
RXD4
{32}
RTS1
{32}
RTS2
{32}
RTS3
{32}
RTS4
{32}
TXD1
{32}
TXD2
{32}
TXD3
{32}
TXD4
{32}
LBUS_DMA_REQ0 {13}
LBUS_DMA_REQ1 {13}
IF_UART_CLK0
{5}
IF_UART_CLK1
{5}
LBUS_DMA_ACK0
3}
LBUS_DMA_ACK1
3}
LBUS_DMA_TC0
3}
LBUS_DMA_TC1
3}
RS232C_TXD {28}
RS232C_RTS {28}
RS232C_RXD
{28}
RS232C_CTS
{28}
FAX2D_RXD
{29}
FAX2CS_RXD
{29}
FAX2D_CTS
{29}
FAX2CS_CTS
{29}
FAX2D_TXD {29}
FAX2CS_TXD {29}
FAX2D_RTS {29}
FAX2CS_RTS {29}
CTS_EF
{30}
RTS_EF
{30}
TXD_EF
{30}
RXD_EF
{30}
PWM
{31}
RESET_GOOD {6,17}
V33_RTN_JIG1 {6,17}
IF_JTAG_TDO {44}
TEST_JTCK2 {18,44}
IF_JTAG_TDI {44}
GPO_I2CBTMC_WP {43}
MAX_SCL {18}
MAX_SDA {18}
BLM15AG121SN1(1005)
3
3
2
2
1
1
D
C
B
A
18/42
MX7000N  CIRCUIT DIAGRAM / 回路図  2 – 37
IC51B
IF ASIC
<Implementation Path>
LBUS_ADDR[1]
R01
LBUS_ADDR[2]
R02
LBUS_ADDR[3]
R04
LBUS_ADDR[4]
R03
LBUS_ADDR[5]
T01
LBUS_ADDR[6]
T02
LBUS_ADDR[7]
T04
LBUS_ADDR[8]
T03
LBUS_ADDR[9]
U01
LBUS_ADDR[10]
U02
LBUS_ADDR[11]
U03
LBUS_DATA[0]
V01
LBUS_DATA[1]
V02
LBUS_DATA[2]
V04
LBUS_DATA[3]
V03
LBUS_DATA[4]
W01
LBUS_DATA[5]
W02
LBUS_DATA[6]
W04
LBUS_DATA[7]
W03
LBUS_DATA[8]
Y01
LBUS_DATA[9]
Y02
LBUS_DATA[10]
Y04
LBUS_DATA[11]
Y03
LBUS_DATA[12]
AA01
LBUS_DATA[13]
AA02
LBUS_DATA[14]
AA04
LBUS_DATA[15]
AA03
XLBUS_DMA_CS0_IN
P02
XLBUS_DMA_CS1_IN
P03
XLBUS_OE
N01
XLBUS_WE
P01
LBUS_ADDR20
D02
LBUS_ADDR21
C01
LBUS_ADDR24
D03
LBUS_ADDR25
C02
LBUS_ADDR26
B01
XLBUS_ROM_CS_IN
D01
XLBU
XLBU
XLBU
XLBU
XLBU
XLBU
XLB
XLB
XLB
XLB
XLB
XLB
XLB
IF ASIC 2/5
CPU I/F
CS DECORDER
A1
A2
A3
A4
A7
A8
A5
A6
A11
A9
A10
A20
A21
A24
A25
A26
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
A20
A21
A25
A26
A24
A[26:0]
{18,27,37,42,43}
AD[31:0]
{13,18,25}
LBUS_DMA_CS0
{13}
LBUS_DMA_CS1
{13}
LBUS_GEN_CS3
{13,18}
LBUS_ASIC_OE
{18,37,42}
LBUS_ASIC_WE
{18,37,42}
5
5
4
4
3
3
D
C
B
A
MFPC PWB (IF ASIC : Address Decoder)
Page of 127
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