Sharp MX-4110N / MX-4111N / MX-4112N / MX-4110FN / MX-4111FN / MX-5110N / MX-5111N / MX-5112N / MX-5110FN / MX-5111FN (serv.man13) Service Manual ▷ View online
MX-5111 BLOCK DIAGRAM / ブ ロ ッ ク 図
1 – 7
6. LSU CNT PWB
LSU_ASIC
CHIP-1
LSU_ASIC
CHIP-2
MFP
Horizontal Scan/
Vertical Scan
Timing Control
Motor Control
PCU
S/S
ECLK
HSYNC
L
V
DS/Driver
ECLK
HSYNC
VSYNC_M/Y
VIDEO I/F CK
HSYNC
8
ECLK
HSYNC
VSYNC
8
ASIC
CHIP-2
ASIC
CHIP-2
SYSCLK
PCU I/F
Register
etc...
ASIC
CHIP-2
SCK
RSV_DAT
TRANS_RST
TRANS_DAT
JOBEND_INT
IRQ1
Synchronous Serial
communication
Thermistor Output
OSC
(System CK)
MicroWire BUS
AMP
Reset IC
Reset Input
Reset
35 : 5
35 : 5
ID[0:1]
Channel A : K1
Horizontal Scan/
Vertical Scan
Timing Control
Channel B : K2
Channel C : C1
Channel D : C2
PCU I/F
Register
etc...
ID[0:0]
ASIC
CHIP-2
Reset
ASIC
CHIP-2
SCK
RSV_DAT
TRANS_RST
TRANS_DAT
Synchronous Serial
communication
communication
IRQ2
System CK
ECLK
HSYNC
8
8
35 : 5
35 : 5
FPD-LINK/Receiver
Trigger Chain
LD
Polygon
Motor
Control
Polygon
Motor
LSU
FAN
FAN
FAN
Control
O.C.
O.C.
Serial
D/A I/F
LD Control
LD Control
(APC
/ENB)
P4_K(ENB)
P3_K(WAIT)
P4_C(ENB)
P3_C(WAIT)
P3_K(WAIT)
P4_C(ENB)
P3_C(WAIT)
P2(SH)
P1(CH)
P0(SEL)
P1(CH)
P0(SEL)
O.C.
LDERR K/C/M/Y
DT_M1+-
3
3
4
3
2
VIDEO IF_ACT
DT_M2+-
2
DT_Y1+-
2
DT_Y2+-
2
FPD-LINK/Receiver
DT_K1+-
2
DT_K2+-
2
DT_C1+-
2
DT_C2+-
2
Motor Control
ASIC
CHIP-2
BD
BD
OSC
(Color CK)
OSC
(B/W CK)
OSC
(Heavy PP
CK)
OSCCLK_C
OSCCLK_M
OSCCLK_A
CLK_C_EN
CLK_M_EN
CLK_A_EN
CLK_C_EN
CLK_M_EN
CLK_A_EN
Thermistor
Channel A : M1
Channel B : M2
Channel C : Y1
Channel D : Y2
ASIC
CHIP-2
VSYNC_K/C
VSYNC_K/C
4
ASIC
CHIP-2
BD
TH
COM_FIFO
I2C BUS
SCL
SDA
SDA
WP
COM_FIFO
I2C BUS
SCL
SDA
SDA
WP
3
3
GAIN FIX
SD CLK
4
INT ST K/C/M/Y
4
MSET_K/C/M/Y
4
Chip select (EEP-ROM)
4
Chip select (LDD)
4
P4_M(ENB)
P3_M(WAIT)
P4_Y(ENB)
P3_Y(WAIT)
P3_M(WAIT)
P4_Y(ENB)
P3_Y(WAIT)
4
3
PGM_CK
PGM_START
(PGM_BRAKE)
PGM_START
(PGM_BRAKE)
PGM_LOCK
FAN_PWM
FANSTABLE
Polygon
Motor
Control
FAN
Control
Serial
D/A I/F
LD Control
LD Control
(APC/ENB)
SCLK/TXD/RXD
CS EEP-ROM K/C/M/Y
CS K/C/M/Y
MX-5111 BLOCK DIAGRAM / ブ ロ ッ ク 図
1 – 8
7. SERIAL COMMUNICATION / シ リ アル通信
O.
C
RB_TxD_SCN
UA
R
T
B
_
T
X
D
6
Schmit
In
v.
RB_RxD_SCN
U
A
R
T
B_RXD6
O.
C
RB_R
TS_SCN
U
A
R
T
B_R
TS_N6
Schmit
In
v.
RB_CTS_SCN
U
A
R
T
B_CTS_N6
Schmit
In
v.
O.
C
Schmit
In
v.
O.
C
I/O
ASIC
µPD658
92GC
RxD
TxD
A[4:0]
D[15:8]
CPU
R
T
S_DSPF
CTS_DSPF
H8S/2373
RxD
RxD_DSPF
Schmit
In
v.
TxD
TxD_DSPF
O.
C
O.
C
SCN
Cnt
Schmit
In
v.
Schmit
In
v.
O.
C
RxD
TxD
I/O
I/O
CPU
H8S/2373
DSPF
Cnt
(f
o
r
D
SPF
model)
CPU
H8S/2373
D[15:8]
A[9
:0]
Schmit
In
v.
RB_RXD_PCU
UA
R
T
B
_
R
X
D
7
O.
C
O.
C
O.
C
O.
C
TxD2
RxD2
O.
C
O.
C
O.
C
O.
C
O.
C
O.
C
O.
C
O.
C
TxD3
RxD3
TxD4
RxD4
O.
C
O.
C
/PCU_RxD
O.
C
TxD0
TRANS_D
A
T
Schmit
In
v.
TxD1
RSV_D
A
T
Schmit
In
v.
RxD1
SCK
O.
C
SCL1
Mother
RxD
TxD
I/O
I/O
Schmit
In
v.
Schmit
In
v.
O.
C
O.
C
RxD
TxD
I/O
I/O
O.
C
O.
C
O.
C
O.
C
CPU
M30843
RxD
TxD
I/O
I/O
O.
C
O.
C
O.
C
O.
C
I/O
O.
C
I/O
O.
C
H8S/3684
CPU
H8S/3687
CPU
DESK
FINISHER
(Optional)
(Optional)
(Optional)
LCC
PCU
UPD65
9
46GN-178
PMC
A
SIC
IO
ASIC
LZ
9
A82805GN
/TXD_INS
/RxD_INS
DTR_INS
DSR_INS
/TxD_LCC
/RxD_LCC
/DTR_LCC
/DSR_LCC
/TxD_DSK
/RxD_DSK
/DTR_DSK
/DSR_DSK
TRC_DSK
TRC_LCC
Buff
er
Buff
er
O.
C
Schmit
In
v.
Schmit
In
v.
O.
C
RB_TXD_PCU
UA
R
T
B
_
T
X
D
7
Schmit
In
v.
RB_CTS_PCU
U
A
R
T
B_CTS_N7
O.
C
RB_R
TS_PCU
U
A
R
T
B_R
TS_N7
/PCU_TxD
Schmit
In
v.
RxD0
/PCU_DSR
O.
C
I/O
por
t
/PCU_DTR
Schmit
In
v.
I/O
por
t
O.
C
RC_TxD_PIC
U
A
R
T
C_TXD
Schmit
In
v.
PIC
O.
C
Schmit
In
v.
RC_RxD_PIC
U
A
R
T
C_RXD
O.
C
RC_CLR_PIC
POR
T
C15
O.
C
O.
C
Schmit
In
v.
RC_REQ_PIC
POR
T
C16
LVDS
RB_TXD_F
AX1D
RB_RXD_F
AX1D
RB_TXD_F
A
X1CS
RB_RXD_F
AX1CS
UA
R
T
B
_
T
X
D
0
U
A
R
T
B_RXD0
UA
R
T
B
_
T
X
D
3
UA
R
T
B
_
R
X
D
3
244
244
244
244
ASIC
Ne
w
CPU
SH7706
PIC
TxD
RxD
1st
F
A
X
(f
or
F
Model)
RB_R
TS_F
AX1D
RB_CTS_F
AX1D
RB_R
TS_F
AX1CS
RB_CTS_F
AX1CS
U
A
R
T
B_R
T
S0
UA
R
T
B
_
C
T
S
0
U
A
R
T
B_R
T
S3
UA
R
T
B
_
C
T
S
3
Schmit
In
v.
O.
C
244
Schmit
In
v.
O.
C
244
O.
C
O.
C
Schmit
In
v.
Schmit
In
v.
O.
C
O.
C
Schmit
In
v.
Schmit
In
v.
TxD_F
AX(D)-
TxD_F
AX(D)+
RxD_F
AX(D)+
RxD_F
AX(D)-
TxD_F
AX(CS)-
TxD_F
AX(CS)+
RxD_F
AX(CS)-
RxD_F
AX(CS)+
RB_TXD_F
AX2D
U
A
R
TB_TXD1
RB_RXD_F
AX2D
U
A
R
T
B_RXD1
RB_TXD_F
A
X2CS
U
A
R
TB_TXD4
RB_RXD_F
AX2CS
U
A
R
TB_RXD4
LV
D
S
Schmit
In
v.
O.
C
Schmit
In
v.
O.
C
RB_R
TS_F
AX2D
RB_CTS_F
AX2D
RB_R
TS_F
AX2CS
RB_CTS_F
AX2CS
U
A
R
T
B_R
TS1
U
A
R
T
B_CTS1
U
A
R
T
B_R
TS4
U
A
R
T
B_CTS4
RB_TXD_F
AX3D
LV
D
S
U
A
R
TB_TXD2
RB_RXD_F
AX3D
U
A
R
TB_RXD2
RB_TXD_F
A
X3CS
U
A
R
TB_TXD5
RB_RXD_F
AX3CS
U
A
R
TB_RXD5
Schmit
In
v.
O.
C
Schmit
In
v.
O.
C
RB_R
TS_F
AX3D
RB_CTS_F
AX3D
RB_R
TS_F
AX3CS
RB_CTS_F
AX3CS
U
A
R
T
B_R
TS2
U
A
R
T
B_CTS2
U
A
R
T
B_R
TS5
UA
R
T
B
_
C
T
S
5
Optional
2nd
F
A
X
(Same
as
1st
F
AX)
Optional
(Same
as
1st
F
AX)
3rd
F
A
X
POR
T
B11
RB_GPI_CTS_PCI
POR
T
B12
RB_GPO_R
TS_PCI
UA
R
T
B
_
T
X
D
8
RB_TXD_PCI
UA
R
T
B
_
R
X
D
8
RB_RXD_PCI
UA
R
T
B
_
T
X
D
8
UA
R
T
B
_
R
X
D
8
Optional
PCI
SUB
RB_DTR_PCI
RB_DSR_PCI
RB_CTS_RIC
RB_R
TS_RIC
RB_TXD_RIC
RB_RXD_RIC
RB_DTR_RIC
RB_DSR_RIC
U
A
R
T
_CTS_N10
U
A
R
T
_R
TS_N10
UA
R
T
B
_
T
X
D
1
0
U
A
R
T
B_RXD10
POR
T
B3
POR
T
B4
RS232C
Dr
iv
er
RS232C
Dr
iv
er
Optional
Coin
V
ender/PCI
REUS
ASIC
MPFC
Mother
MFPC
RxD
Schmit
In
v.
TxD
Schmit
In
v.
SCK
Schmit
In
v.
LSU
A
SIC
×2(KC/MY)
LSU
Schmit
In
v.
Schmit
In
v.
Schmit
In
v.
Schmit
In
v.
Schmit
In
v.
Schmit
In
v.
Schmit
In
v.
Schmit
In
v.
MX-5111 BLOCK DIAGRAM / ブ ロ ッ ク 図
1 – 9
8. FAX SECTION / FAX セ ク シ ョ ン
A.
Except Japan
(1)
MX-FX11
TEL/L
IU
Conn
ecto
r
FA
X
IM
A
G
E
MEMORY
(Not
mou
n
t)
FLASH
R
O
M
16Mb
it
LIU
E
X
P
WB
FA
X
M
A
IN
P
W
B
MJ1
(LINE)
MJ2
(TEL)
OFF
foc
k
detection
Sr
e
la
y
Si3
0
1
9
Si3056
Sili
con
D
A
A
Si3
056
CH
IP
SE
T
CI
Dete
ction
P
o
lar
it
y
in
vers
ion
Dete
ction
(Not
m
o
unt)
Speaker
F
A
X
ASIC
MB
87
F
4
9
30
MODEM
MMD
5020
PIC
microcomputer
PIC16F6
9
0
CPU
SH
7706
MFP
IF
Connector
With
secure
loc
king
de
vice
BM30B-
SHLDS
JTAG
Con
nector
1
4pin
(Not
mount)
Lo
g
Con
nector
(Not
mount)
Oper
ation
in
1W/7W
energy-sa
v
e
mode
Crystal
R
esonator
24.5
76MHz
Crystal
R
esonator
1
4.7456MHz
Spe
ak
e
r
Co
nn
e
c
to
r
S0
2
B
-
PA
S
K
STATUS
LED_
0
STATUS
LED_
1
(Not
moun
t)
v
oltage
le
v
e
l
Voltage
Re
gulator
NJU7772F
18
Po
wer
Amplifier
LM481
9
Vo
lu
m
e
C
hange
BU
4
0
6
6
NJM3414
vo
lt
a
g
e
le
v
e
l
Filter
+2
4V
D
etec
tio
n
+24V
+12V
CI
Fi
ter
CI
Fi
te
r
Filter
v
oltage
le
v
e
l
RH
S-
+5
V2
ECON
MRON
EX
H
S
-
SON2
SON1
AFE_
CL
K
AFE
_RES-
ASP
C
L
K
ABITCL
K
AR
XD
AT
X
D
BSP
C
L
K
BBITCL
K
BR
XD
BTXD
SPK
(a
na
lo
g)
RGDT-
(CI
d
etection)
HD
MUTE
-
SI3
_
RES-
TEL
ID
CI2-
CI-
HS
1-
HS
2-
CIO
N
15
0VO
N
MSGMUT
E
CID-
+5
V2
+1
2
+2
4
+5
VA
+5
V
A
BZ
EN
_
S
PKO
N
-
EN_
B
ZON-
VO
L
A
VO
L
B
VO
L
C
VO
L
D
SPM
U
T
E-
3.
3V
1.
8V
MD
M3.3
V
RESE
T-
3.
3
V
+5
V
+5
VA
MD
M3
.3
V
+3
.3V
+2
4V
MO
N_
24V
-
+2
4V
+5
V
+3
.3
V
+5
V2
RES_F
A
X
-
FA
X
_
R
X
D(
D
)+
FA
X
_
R
X
D
(D
)-
F
A
X
_
TXD(D)
+
FAX_T
X
D(
D)-
FA
X
_
C
T
S
(D
)-
FA
X
_
R
T
S
(D
)-
FAX_RXD(
CS)+
FA
X_
R
X
D
(CS)-
F
A
X_TXD(
C
S)+
F
A
X
_
TXD(C
S
)-
F
A
X
_
CTS(C
S
)-
F
A
X
_
R
TS(
C
S
)-
FL
V
P
P
Ve
rs
io
n
ID
CNCT_FAX-
3.
3V
1.
9
V
PI
CP
G
M
_
E
N
WU
P_
FA
X-
TEL
ID2
16bit
16bit
16bit
16bit
16bit
16bit
JTAG
UA
R
T
UA
R
T
Do
w
n
lo
a
d
Spred
Spectr
um
CY25811SXCT
PR
O
G
RAM
FLASH
R
O
M
16
M
b
VHIM2
9
LV1
6
B-1Q
WO
RK
MEMORY
SDRAM
64Mb
it
A3
64S40ETP-
G6
RESET
IC
BD4
5285G
Voltage
Re
gula
tor
R11
73S001B
MX-5111 BLOCK DIAGRAM / ブ ロ ッ ク 図
1 – 10
B.
Japan
(1)
F model internal FAX
TEL/L
IU
Conn
ecto
r
LI
U
J
PN
PWB
FAX
M
AIN
P
WB
MJ1
(LINE)
MJ2
(TEL)
OFF
foc
k
detection
S
relay
Si3
0
1
9
Si3056
Sili
con
D
A
A
Si3
0
56
CH
IP
SET
VOICE
CODEC
Si3000
H
a
ndset
AMP
NJM2135M
MR
relay
CI
Dete
ction
Polarity
inversion
Detection
(Not
mount)
EC
relay
(Not
mount)
p
ara-
ringer
voice
messag
e
Outpu
t
Speaker
FAX
ASIC
MB
87
F
4
9
30
MODEM
MMD
5020
PIC
microcomputer
PIC16F6
9
0
CP
U
SH
7706
MFP
IF
Connector
With
secure
locking
device
BM30B-
SHLDS
JTAG
Con
n
ector
1
4pin
(Not
mount)
㪈㪮㪃㪎㪮⋭䉣䊈䊝䊷䊄ᤨ
േ
Spred
Spectrum
CY25811SXCT
Crystal
R
e
sonator
24.5
76MHz
Voltage
Regulator
R1173S001B
Crystal
Resonator
14.7456MHz
RESET
IC
BD4
5
285G
Handset
Connector
MD-S6350-
90
Speaker
Connector
S02B-
PASK
STATUS
LED_
0
STATUS
LED_1
(N
ot
moun
t)
voltage
level
DC
DC
-1
50V
Messag
e
Outpu
t
Enabl
e
Voltage
Re
gulator
NJU7772F
18
Po
wer
Ampli
fier
LM481
9
Volum
e
C
h
ange
BU40
6
6
NJM3414
CI
Dete
ction
voltage
level
Filter
+2
4V
D
etectio
n
+24V
+12V
CI
Fi
ter
CI
Fi
te
r
Filter
voltage
level
Speaker
Microphone
OFF
fock
detection
RH
S-
+5
V2
ECON
MRON
EX
H
S
-
SON2
SON1
AFE
_
C
L
K
AFE
_
RES-
AS
P
C
L
K
ABITCL
K
AR
XD
ATX
D
B
S
PC
LK
BBITCL
K
BR
XD
BTX
D
S
P
K(
an
al
og
)
RGDT-
CI
ᬌ
HD
MUTE-
SI3
_
RES-
TEL
ID
CI2-
CI-
HS
1-
HS
2-
CIO
N
15
0VO
N
MS
GMUT
E
MS
G(
Ana
log)
CID-
+5
V2
+1
2
+2
4
+5
VA
+5V
A
BZ
EN_
SPK
O
N
-
EN_
B
ZON-
VOL
A
VOL
B
VO
L
C
VO
L
D
SP
MUTE-
3.
3V
1.
8V
MD
M3.
3
V
RESET-
3.
3
V
+5
V
+5
VA
MD
M3
.3
V
+3
.3V
+2
4V
MO
N_
24
V
-
+2
4V
+5
V
+3
.3
V
+5
V2
RES
_
FAX
-
F
A
X_
RX
D
(D
)+
FAX_
RXD(D
)-
FAX
_
TXD(D)
+
FAX
_
T
X
D(
D)-
FAX
_
CTS
(D)-
FAX
_
RTS
(D)-
FAX
_
RXD(
CS)+
F
A
X_
RX
D(C
S
)-
F
A
X_
TXD
(C
S)+
FAX
_
TXD(C
S
)-
FAX
_
CTS(C
S
)-
FAX
_
RTS(C
S
)-
FLV
P
P
Ve
rs
io
n
ID
CNC
T
_F
AX
-
3.
3V
1.
9
V
PICPGM_E
N
WU
P_
FA
X-
TEL
ID2
16bit
16bit
16bit
16bit
16bit
16bit
JTAG
UART
UART
D
o
wn
lo
ad
Lo
g
Con
n
ector
(Not
mount)
WORK
MEMORY
SDRAM
64Mbit
A3V
64S40ETP-
G6
PROGRAM
FLASH
R
OM
16Mb
VHIM2
9
LV16B-
1Q
FA
X
IMAGE
MEMOR
Y
(Not
mou
n
t)
FLASH
R
OM
16Mb
it
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