DOWNLOAD Sharp MX-4100N / MX-4101N / MX-5000N / MX-5001N (serv.man6) Service Manual ↓ Size: 22.85 MB | Pages: 127 in PDF or view online for FREE

Model
MX-4100N MX-4101N MX-5000N MX-5001N (serv.man6)
Pages
127
Size
22.85 MB
Type
PDF
Document
Service Manual
Brand
Device
Copying Equipment / MX5001N - Circuit Diagrams
File
mx-4100n-mx-4101n-mx-5000n-mx-5001n-sm6.pdf
Date
PREV: Sharp MX-4100N / MX-4101N / MX-5000N / MX-5001N (serv.man5) Service Manual / Specification

Sharp MX-4100N / MX-4101N / MX-5000N / MX-5001N (serv.man6) Service Manual ▷ View online

MX-4101N  BLOCK DIAGRAM / ブロック図  1 – 7
6. SERIAL COMMUNICATION / シリアル通信
CPU
H
8
S/23
7
3
T
xD_DSK
R
xD_DSK
T
xD_FIN
R
xD_FIN
O
.C
.
O
.C
.
O
.C
.
O
.C
.
O
.C
.
O
.C
.
I/O
ASIC
µPD
6
5
8
9
2GC-
103
O
.C
.
O
.C
.
O
.C
.
O
.C
.
O
.C
.
O
.C
.
CPU
M30
8
43FWGP
Sc
hmi
t
In
v.
O
.C
.
O
.C
.
O
.C
.
O
.C
.
O
.C
.
CPU
H
8
/3
6
8
4
CPU
H
8
/3
6
8
7
DTR_FIN
DSR_FIN
DTR_DSK
DSR_DSK
DTR_LCC
T
xD_LCC
R
xD_LCC
DSR_LCC
PCU
FINISHER
(Optional)
DESK
(Optional)
LCC
(Optional)
)
Sc
hmi
t
In
v.
O
.C
.
O
.C
.
O
.C
.
O
.C
.
O
.C
.
A
[4:
0]
D
[15:
8]
Sc
hmi
t
In
v.
Sc
hmi
t
In
v.
Sc
hmi
t
In
v.
SCK_LSU
RSV_DAT
TRANS_DAT
Sc
hmi
t
In
v.
Sc
hmi
t
In
v.
Sc
hmi
t
In
v.
LSU
ASIC
O
.C
.
nPCU_R
xD
Sc
hmi
t
In
v.
nPCU_T
xD
O
.C
.
PCU_DSR
Sc
hmi
t
In
v.
PCU_DTR
Sc
hmi
t
In
v.
O
.C
.
Sc
hmi
t
In
v.
O
.C
.
MFPC
I/F
ASIC
O
.C
O
.C
.
Sc
hmi
t
In
v.
O
.C
.
nT
xD_
SC
N
nR
xD_
SC
N
R
T
S
_S
C
N
CPU
H
8S/23
73
Sc
hmi
t
In
v.
Sc
hmi
t
In
v.
O
.C
Sc
hmi
t
In
v.
CT
S
_S
C
N
Sc
hmi
t
T
xD0
Sc
hmi
t
O
.C
.
O
.C
Sc
hmi
t
In
v.
Sc
hmi
t
In
v.
O
.C
.
O
.C
.
TxD_SCAN
RxD_SCAN
I/O
ASIC
µPD
6
5
8
9
2GC
O
.C
O
.C
.
Sc
hmi
t
In
v.
O
.C
.
DTR_FAX
(D)
DSR_FAX
(D)
DTR_FAX
(CS)
Sc
hmi
t
In
v.
Sc
hmi
t
In
v.
O
.C
Sc
hmi
t
In
v.
DSR_FAX
(CS)
P
.D
.
P
.U
.
P
.D
.
P
.U
.
P
.D
.
P
.U
.
P
.U
.
P
.D
.
P
.D
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.U
.
P
.D
.
P
.D
.
P
.U
.
P
.U
.
P
.D
.
P
.U
.
P
.U
.
P
.U
.
P
.D
.
P
.D
.
P
.U
.
P
.D
.
P.D
.
P.U
.
P.U
.
P.D
.
P.U
.
P.D
.
P.U
.
P.D
.
A
[4:
0]
D
[15:
8]
P
.D
.
P
.U
.
P
.U
.
P
.D
.
P
.D
.
P
.U
.
P
.U
.
P
.D
.
T
xD_FAX
(D)
R
xD_FAX
(D)
T
xD_FAX
(CS)
R
xD_FAX
(CS)
LVD
S
R
xD
0
I/O
port
I/O
port
T
xD1
R
xD1
SC
K1
T
xD2
R
xD2
T
xD3
R
xD3
T
xD4
R
xD4
R
xD
T
xD
SCK
R
xD
T
xD
I/O
I/O
R
xD
T
xD
I/O
I/O
R
xD
T
xD
I/O
I/O
R
xD
[1
]
T
xD
[1
]
CT
S
[1
]
RT
S
[1
]
R
xD
[2
]
T
xD
[2
]
CT
S
[2
]
RT
S
[2
]
R
xD
[3
]
T
xD
[3
]
CT
S
[3
]
RT
S
[3
]
T
xD
[4
]
R
xD
[4
]
CT
S
[4
]
RT
S
[4
]
PI
C
T
xD
[PI
C
]
R
xD
[PI
C
]
O
.C
.
Sc
hmi
t
In
v.
P
.U
.
P
.D
.
nT
xD_
P
IC
O
.C
Sc
hmi
t
In
v.
nR
xD_
P
IC
P
.U
.
CL
R
[PI
C
]
O
.C
.
O
.C
P
.U
.
CL
R
_PI
C
RE
Q[
PI
C
]
Sc
hmi
t
In
v.
RE
Q
_P
IC
O
.C
P
.U
.
LSU
DSPF
Cnt(
for
DSPF
mod
e
l)
SC
N
C
nt
Mo
the
r
MF
P
C
1st
F
AX
(f
or
FG
Mod
e
l)
RxD
TxD
DS
R
_SC
A
N
DT
R
_S
C
A
N
I/O
I/O
N
ew
AS
IC
T
xD_
FA
X(
D)
+
T
xD_
FA
X(
D)
-
R
xD_
FA
X
(D)
+
R
xD_
FA
X
(D)
-
T
xD_
FA
X
(C
S
)+
T
xD_
FA
X
(C
S
)-
R
xD_
F
A
X(
C
S
)+
R
xD_
F
A
X(
C
S
)-
CP
U
SH
77
06
PI
C
T
xD
R
xD
2nd
F
AX
(sam
e
as
1st)
(Optional)
P
.U
.
.
In
v.
In
v.
CPU
H
8
S/23
7
3
TxD
RxD
R
xD
T
xD
MX-4101N  BLOCK DIAGRAM / ブロック図  1 – 8
7. FAX (MX-FXX2, MX-3600FN/4100FN/4101FN/5000FN/5001FN)
A. MX-FXX2 (Except Japan)
1
RGDT-(CI
de
te
ction)
Op
e
ration
in
1
W/
7
W
e
n
e
rg
y-sa
ve
mod
e
: Oct. 24 2008
1
MX-4101N  BLOCK DIAGRAM / ブロック図  1 – 9
B. MX-3600FN/4100FN/4101FN/5000FN/5001FN (Japan)
1
ǹȔȸǫȸ
1((ȕȃǯ౨Ј
ȞǤǯ
99ႾǨȍȢȸȉ଺
ѣ˺
ǷȪdzȳ
DAA
dzȍǯǿ
ȏȳȉǻȃȈ
dzȍǯǿ
ȏȳȉǻȃȈ
1((ȕȃǯ
౨Ј
5ȪȬȸ
MR
ȪȬȸ
EC
ȪȬȸ
சܱᘺ
சܱᘺ
CI
࠿੄ٝႹ
CI
࠿੄ٝႹ
ಊӒ౨Ј
ׅែ
சܱᘺ
લ˩ȪȳǬ
᪦٣ᴪᴇᴖᴈᴔᴶ Јщׅែ
ǹȔȸǫȸ
ǹȔȸǫ
dzȍǯǿ
᪦᣽
Џஆ
൦୒ਰѣ܇
൦୒ਰѣ܇
΋Υ·Η
΋Υ·Η
ȞǤdzȳ
ᩓןȬșȫ
ȀǦȳȭȸȉ
ȕǣȫǿȸ
dzȍǯǿ
ȭȃǭȳǰ
ȇȐǤǹ
ǻȳǵȸ
ᩓן
ȬǮȥȬȸǿ
ᩓן
ȬǮȥȬȸǿ
ǹȚǯȈȩȠ
ਘ૝
: Oct. 24 2008
1
MX-4101N  CIRCUIT DIAGRAM AND PARTS LAYOUT / 回路図と部品配置図  2 – 1
MX-4101N
Circuit Diagram
 
[2] CIRCUIT DIAGRAM AND PARTS LAYOUT / 回路図と部品配置図
1. MFP CONTROLLER PWB / MFP コントローラ PWB
A. CIRCUIT DIAGRAM / 回路図
5V_IN
5V_IN
5V_IN
5V_IN
3R3V
5V_IN
5V_IN
5V_IN
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
RES_MFP_MT
{30}
COREPWR_OE {4}
nHARDRESET {6}
IOPWR_OE
{4}
PWROFF_BK2
{4,8,42,43}
Force Reset by Another PWB
3.8V DETECT
4.0V DETECT
4.2V DETECT
CB412
0.01uF(B)
RB110
X_0J
CP339
CB402
0.1uF(B)
ICB4
BU4240F
GND
1
VDD
2
CT
3
VOUT
4
CP255
CB394
0.01uF(B)
CB406
1000pF(B)
RB113
10KJ
OPEN-DRAIN BUFFER
ICB1
TC7SZ07FU(TE85L_F)
Y
4
VCC
5
NC
1
A
2
GND
3
CP342
RB166
X_0J
CB395
0.01uF(B)
RB168
4.7KJ
CP327
CB341
1uF(1608:B)
CB323
0.01uF(B)
CP257
CP256
10K
47K
QB2
DTC114YUB
E
B
C
CP340
CP249
CB325
1000pF(B)
OPEN-DRAIN BUFFER
ICB3
TC7SZ07FU(TE85L_F)
Y
4
VCC
5
NC
1
A
2
GND
3
CB396
1uF(1608:B)
CB337
0.1uF(1608:B)
CB330
0.1uF(B)
ICB5
BU4242F
GND
1
VDD
2
CT
3
VOUT
4
RB109
4.7KJ
ICB2
BU4238F
GND
1
VDD
2
CT
3
VOUT
4
R113
D_1KJ
SW1
D_SKQMBAE010
CB408
1uF(1608:B)
5
5
4
4
3
3
D
C
B
A
MFPC PWB (ReSet Tree)
Page of 127
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