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AR-122E/152E/153E/157E  ELECTRICAL SECTION  13 - 9

1) Since the thermistor terminal voltage is higher than the set level,

the HL signal from the CPU becomes HIGH.

2) The HL signal is turned to be the HLOUT signal through IC124 pro-

tect circuit, and inputted to the photo triac coupler on the power
PWB.

3) When the internal triac turns on, a pulse is applied to the gate of the

external triac. Consequently a current flow from the power source
through the heater lamp to the triac, lighting the heater lamp.

1) Since the thermistor terminal voltage becomes lower than the set

value, the HL signal from the CPU becomes LOW.

2) The HL turns LOW, the photo triac coupler on the power PWB turns

OFF, the external triac turns OFF, and the heater lamp turns OFF.

The voltage at IC120 6pin over the voltage at 5pin to drive the output
THOPEN at 7pin to LOW. This is passed to the CPU and the trouble
code "H2" is displayed.

Since the load signal from the CPU or the ASIC cannot drive the load
directly, it is passed through the driver IC to drive the load.

The driver circuit forms a Darlington circuit with transistors. Therefore a
large drive current is obtained from a small current (ASIC output cur-
rent). When the driver input voltage (base resistance input) is HIGH
(+3.3V), the transistor turns ON to flow a current in the arrow direction,
operating the load. When the driver is ON, the driver output terminal
voltage is 0V.

The IC129 is the motor control IC, which generates the pseudo AC
waveform with the pulse signals (TM, TM-) outputted from ASIC, driv-
ing the toner supply motor.

The main motor is driven by the MMD signal from ASIC. While the
main motor is rotating, the MMD signal is driven to HIGH and passed
through IC125 to the control circuit in the main motor to rotate the main
motor. When the main motor speed reaches the specified rpm, the
MMLD signal is turned LOW and passed through IC115 to the CPU.

LOAD

+24V

ASIC/CPU

OUT PUT

LOAD

24V

PGND

PGND

PGND

(TM)

(TM_)

TMB_O
TMA_O

(4-D3)
(4-D3)

(9-A1)
(9-A1)

R205
47kJ

R204
47kJ

+

C212
10u/35V

R187
1kJ

R188
1kJ

IC129

BA6920FP

Vcc

17

GND

8

Rin

20

Fin

18

OUT1

9

OUT2

5

VM

16

VREF

21

RNF

6

PSAVE

19

NC

1

NC

2

NC

3

NC

4

NC

7

NC

10

NC

11

NC

12

NC

13

NC

14

NC

15

NC

22

NC

23

NC

24

NC

25

FIN

FIN

C213

0.1u/50V

MMLD

 

ASIC

Main Motor

Control

Circuit

( Main Motor)

IC201

TD62503F

 

I1

1

 

O1

 

16

 

I2

2

 

O2

 

15

 

I3

3

 

I4

4

 

O3

 

14

 

I5

5

 

O4

 

13

 

I6

6

 

O5

 

12

 

I7

7

 

COM

8

 

O6

 

11

 

O7

 

10

 

NC

9

MMD

 

MMD

 

/MMD

 

CPU 

AR-122E/152E/153E/157E  ELECTRICAL SECTION  13 - 10

Stepping motors are employed for the mirror motor, the SPF motor,
and the duplex motor. The driver for IC127 (for mirror motor) is the
bipolar drive L6219DS, and the driver for IC128 (for SPF) is the uni-
polar drive IC MTD1361F. For control, the SPF outputs the drive signal
from the CPU to the IC, and the mirror outputs the drive signal to the IC
with the ASIC. They drive each motor in 1-2 phase excitement or 2-
phase excitement.

Each motor switches the motor current value in each magnification
ratio.

• SPF motor drive circuit

• Mirror motor drive circuit

PGND

PGND

PGND

PGND

PGND

PGND

24VM

5V

PGND

SPMT_2

(SPMT2)

SPMT_0
SPMT_3
SPMT_1

MRPS_1
MRPS_2
MRPS_3

(SPMT0)
(SPMT3)
(SPMT1)

(5-C2)
(5-C2)
(5-C2)

(4-D2)
(4-D2)
(4-D2)
(4-D2)

(9-D1)
(9-D1)

(9-E1)

(9-E1)

¢ U T

R199
300J

C211

2200p

R191

7.5kJ

C214

2200p

R194

7.5kJ

C218

2200p

C227

OPEN

C216

OPEN

C215

OPEN

C232

OPEN

C222

2200p

R198

2.4kJ

R203

2.4kJ

R195
1kJ

R207
1kJ

C220

0.1u

R200
620J

R201
1.2kJ

R202
100J

R196
750J

+

C219

47u/16V

R197

1J

2W

IC128

MTD1361/F

CrA

23

CrB

20

VsA

25

RsA

3

VrefA

24

VrefB

19

RsB

12

VsB

18

In /A

26

In A

27

In /B

17

In B

16

Vmm

22

OUT /A

1

OUT A

4

OUT /B

14

OUT B

11

PG

15

PG

28

D112

OPEN

D113

OPEN

D114

OPEN

D115

OPEN

R206

1J

2W

+

C217
47u/16V

5V

24VM

24V

5V

5V

24VM

PGND

PGND

PGND

PGND

24Vdup

PGND

PGND

PGND

PGND

PGND

PGND

MM_PH_A

OUT_A-

MM_AI0

MM_PH_B

MM_BI0
MM_BI1

MM_AI1

OUT_A+

OUT_B-

MMref0
MMref1
MMref2

OUT_B+

(8-C3)
(8-C3)
(8-C3)
(8-C3)

(2-A3)
(2-A3)
(2-A3)

(2-A3)

(2-A3)
(2-A3)

(5-C1)
(5-C1)
(5-C1)

CP101
ICP-N38

C202
820p

C203
820p

C204
820p

C207
0.1u

C201
820p

C205
0.1u

+

C206
1u/16V

+

C208
47u/35V

D105

OPEN

R180
1.5kJ

R178

0.68J
1W

R182
30kJ

R183
30kJ

R179
1.5kJ

R177

0.68J
1W

R186
510J

R185
1kJ

R184
2kJ

R181
1kJ

IC127

L6219DS

OUT 2A

2

SENSE 2

3

COMP 2

4

OUT 2B

5

GND

6

GND

7

I02

8

I12

9

PHASE 2

10

VREF 2

11

RC 2

12

VSS

13

RC 1

14

VREF 1

15

PHASE 1

16

I11

17

GND

18

GND

19

I01

20

OUT 1B

21

COMP 1

22

SENSE 1

23

VS

24

OUT 1A

1

D106

OPEN

D107

OPEN

D108

OPEN

CP102
ICP-N38

C209

0.1u/50V

C210

0.1u/50V

CP201
0603FA1.5A

CP202
0603FA1.5A

AR-122E/152E/153E/157E  ELECTRICAL SECTION  13 - 11

The operation circuit is composed of the key matrix circuit and the dis-
play matrix circuit.

Select signals SELIN 1 –  3 are sent from the CPU of the MCU to the
selector in the operation circuit.

The signals detecting OFF/ON of the key are sent to the CPU as KIN 1
–  2.

The display is controlled by sending the data signal from the CPU of
the MCU, the clock signals, and the latch signals from the ASIC to the
LED driver in the operation circuit.

∗

The basic circuitry is the same as that of Puma.

The I/F circuit is composed of the USB driver and the IEEE1284 driver,
and performs hard interface with the ASIC (MCU PWB).

With the USB driver, the differential signals (analog) of USB are con-
verted into digital signal, which are sent to the ASIC. In the reverse
procedure, interface between the ASIC (engine) and the host is per-
formed.

The IEEE1284 driver is used to perform interface between the ASIC
(engine) and the host.

The carriage unit is provided with the CCD PWB, the inverter PWB,
and the lamps. It scans documents and transfers AD-converted image
data to the ASIC.

The CCD on the CCD PWB employs the color image sensor uPD8861
of 5400 pixels x 3 lines, and scans documents in the main scanning
direction in the resolution of 600dpi/US letter size.

Image data scanned by the CCD are inputted to the AFE (AD9826),
and subject to CDS, amplification, and AD-conversion. Then digital
data are outputted to the MCU PWB and to the ASIC, which performs
image process of the digital data.

The transformer is controlled by the lamp control signal from the MCU
PWB. The transformer output controls lighting of the cool cathode ray
tube.

The DC power circuit directly rectifies the AC power and performs
switching-conversion with the DC/DC converter circuit, and rectifies
and smoothes again to generate a DC voltage. 

The constant voltage control circuit is of +5VEN. +24V and +12V are of
the non-control system by winding from the +5VEN winding.  As shown
in fig (1), +24V, +12V, and +5V are provided with the ON/OFF function
by external signals. +3.3V is outputted from +5VEN to the regulator IC. 

Refer to the block diagram, fig (1). 

fig (1) Block diagram

USB driver
IC401

USB  

connector

 

D -

D+

OE, RCV, VP, VM
Suspend, VMO
VPO

 

 

 

ASIC

Centronics 

connector 

IEEE1284  

driver  

 

IC403  

ASIC

Noise filter

circuit

Rush current

prevention circuit

Rectifying/
smoothing

circuit

Inverter circuit

(Flyback converter system)

Rectifying/

smoothing circuit

(Semiconductor switch)

Rectifying/

smoothing circuit

Rectifying/

smoothing circuit

+12V regulator IC

(with ON/OFF function)

Overcurrent
protection circuit

Control
circuit

Constant-voltage
detection circuit

(Semiconductor switch)

+3.3V

regulator IC

AR-122E/152E/153E/157E  ELECTRICAL SECTION  13 - 12

The filter circuit is composed of L and C. It reduces common noises
and normal mode noises generated from the AC line.

The common noise means that generated in each line for GND. Its
noise component is delivered through C001, C003, and C007 to GND. 

The normal noise means that overlapped in the AC line or the output
line. It is attenuated by C002, L001, C006, and L002. Refer to fig (2).

fig (2) Noise filter circuit

fig (3) Rush current prevention, rectifying/smoothing circuit

Since the AC power is directly rectified, if there were not this rush cur-
rent prevention resistor (TH001), an extremely large rush current
would flow due to a charging current flowing through the smoothing
capacitor C010 when turning on the power. 

To prevent against this, the rush current prevention resistor TH001 is
provided between the rectifying diode D002 and the smoothing diode
C010, suppressing a rush current.

The rectifying/smoothing circuit rectifies a 50/60Hz AC voltage with the
rectifying circuit, and smoothes it with the smoothing capacitor C010.

 fig (4) Inverter and control circuit

This circuit is one-stone separate excitation DC-DC converter called
flyback converter, as shown in fig (4).

When an electromotive voltage of IC is applied through D012, R005,
and R006 to IC002, IC002 oscillates to conduct Q001. 

As a result, a voltage is applied to the primary winding of the converter
transformer (T001) and at the same time a voltage is generated in the
driving winding of IC002 to operate IC002. Then IC002 turns ON/OFF
Q001 at the frequency of about 70KHz determined by R016. 

Under the ON state, the voltage in the secondary winding is reversed
to the diode D103 and no current flows through the secondary winding
of T001.

Under the OFF state, the current flowing through the primary winding is
in the same direction as the primary winding, conducting D103 and
transmitting energy to the secondary winding. Refer to fig (4).

fig (5) Operation waveform of the flyback converter

T001

D103

R109

R111

PC002

IC102

Q001

R012

R006

R005

R013

C013

R012

AC

8

7

6

IC002

R016

5

1

2

3 4

PC002

C010

secondary
winding
voltage