DOWNLOAD Sharp AL-1566 (serv.man15) Service Manual ↓ Size: 2.21 MB | Pages: 61 in PDF or view online for FREE

Model
AL-1566 (serv.man15)
Pages
61
Size
2.21 MB
Type
PDF
Document
Service Manual
Brand
Device
Copying Equipment / Electrical section
File
al-1566-sm15.pdf
Date

Sharp AL-1566 (serv.man15) Service Manual ▷ View online

AL-1556/1566  ELECTRICAL SECTION  12 - 13
When Q001 turns off, energy accumulated in the transformer (T001)
flows a current of waveform C in the path indicated with dotted line as
shown in the figure above through D101 and D113 and dissipates to
the secondary output side. When this energy is exhausted, the current
flowing through D101 and D113 turns off. However, the N
S
 winding has
a slight remaining energy, which generates a voltage in the base wind-
ing N
C
 and turns on Q001 again to repeat switching operation, supply-
ing a high frequency power to the secondary side.
(4) Overcurrent protection circuit (Primary side)
The ON period extension due to an increased output load is detected,
and the OFF period of Q001 is extended by the control circuit, and
energy accumulated in the primary winding of the transformer T001 is
reduced, providing protection against an overcurrent. Refer to Fig. (4).
(5) Rectifying/smoothing circuit (+5V)
fig (6) Rectifying/smoothing circuit
The high frequency pulse generated by the inverter circuit is
decreased by the converter transformer, rectified by the high frequency
diode D113, and smoothed by C107 and C108. 
fig (7) +5V rectifying/smoothing circuit voltage waveform
Voltage waveform
Voltage waveform
AL-1556/1566  CIRCUIT DIAGRAM  13 - 1
[13] CIRCUIT DIAGRAM
1. MCU PWB
MCU PWB (CPU section)
C24
0.1u
C4
12p
R1
1
10kJ
R5
0J
BR20
33J
1 2 3 4
8 7 6 5
R18
11kF
C25
47p
R20
10kF
BR21
33J
1 2 3 4
8 7 6 5
R19
3.3kJ
IC2
HD6412321VF25(H8S/2321)
P3
P34
P3
P32
P3
P3
PD
PD
PD
PD
P
PD
P
P
P
P
P
P
P
P
P
AVcc
103
Vref
104
P40/AN0
105
P41/AN1
106
P42/AN2
107
P43/AN3
108
P44/AN4
109
P45/AN5
110
P46/AN6/DA0
111
P47/AN7/DA1
112
AVss
113
Vss
114
P17/PO15/TIOCB2/TCLKD
115
P16/PO14/TIOCA2
116
P15/PO13/TIOCB1/TCLKC
117
P14/PO12/TIOCA1
118
P13/PO11/TIOCD0/TCLKB
119
P12/PO10/TIOCC0/TCLKA
120
P11/PO9/TIOCB0/DACK1
121
P10/PO8/TIOCA0/DACK0
122
MD0
123
MD1
124
MD2
125
PG0/CAS
126
PG1/CS3
127
PG2/CS2
128
PG3/CS1
1
PG4/CS0
2
Vss
3
NC
4
VCC
5
PC0/A0
6
PC1/A1
7
PC2/A2
8
PC3/A3
9
Vss
10
PC4/A4
11
PC5/A5
12
PC6/A6
13
PC7/A7
14
PB0/A8
15
PB1/A9
16
PB2/A10
17
PB3/A1
1
18
Vss
19
PB4/A12
20
PB5/A13
21
PB6/A14
22
PB7/A15
23
P
A
0/A16
24
P
A
1/A17
25
P
A
2/A18
26
P
A
3/A19
27
Vss
28
P
A
4/A20/IRQ4
29
P
A
5/A21/IRQ5
30
P
A
6/A22/IRQ6
31
P
A
7/A23/IRQ7
32
P67/
/
CS7
IRQ3
33
P66/
/
CS6
IRQ2
34
Vss
35
Vss
36
P65/IRQ1
37
P64/IRQ0
38
P53/ADTRG
102
P52/SCK2
101
Vss
100
Vss
99
P51/RxD2
98
P50/TxD2
97
PF0/BREQ
96
PF1/BACK
95
PF2/
/W
AIT/BREQO
LCAS
94
PF3/L
WR
93
PF4/HWR
92
PF5/RD
91
PF6/AS
90
VCC
89
PF7/0
88
Vss
87
EXT
AL
86
XT
AL
85
VCC
84
STBY
83
NMI
82
RES
81
WDT
OVF
80
P20/PO0/TIOCA3
79
P21/PO1/YICOB3
78
P22/PO2/TIOCC3
77
P23/PO3/TIOCD3
76
P24/PO4/TIOCA4
75
P25/PO5/TIOCB4
74
P26/PO6/TIOCA5
73
P27/PO7/TIOCB5
72
P63/TEND1
71
P62/DREQ1
70
P61/
/
TEND0
CS5
69
Vss
68
Vss
67
P60/
/
DREQ0
CS4
66
Vss
65
R4
*3
BR22
33J
1 2 3 4
8 7 6 5
C1
*6
R13
10kJ
R2
*2
BR23
33J
1 2 3 4
8 7 6 5
IC4
M51957BFP
NC
8
GND
4
VCC
7
NC
1
IN
2
NC
3
Cd 5
OUT
6
BR24
33J
1 2 3 4
8 7 6 5
R7
*4
C381 22pF
R1
OPEN
C382 OPEN
C383 OPEN
C384 OPEN
X1
HC-49U/S
19.6608MHz
R22
10kJ
R21
33J
C22
0.1u
R8
33J
BR110
33J
1
2
3
4
8
7
6
5
IC1
P2010/PLL701-01
Xin
1
Xout 2
FS0 3
Vss 4
SSon
5 MODOUT
6 SR0
7 VDD
8
R12
10kJ
C3
*5
R3
*1
R6
0J
R10
100J
R337
33J
C23
OPEN
C2
0.1u
R9
33J
C386
OPEN
A0
A5
A2
A4
A1
1
A19
A13
A3
A8
A10
A7
A12
A16
A14
A18
A1
A15
A17
A6
A9
CPUCLK(NC)
/TRANSST
SPFMT0
/SCANSP
SPFMT1
SPFMT2
/SCANST
SPFMT3
/STBY
ES_CMD
RD
/ESS_RDY
/ESC_RDY
HWR
/PRINTST
LWR
ESS_TS
RESETOUT1
NMI
/WDT
OVF
/CS0#
/CS1#
/CS2#
/CS3#
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
/PRINTST
/RESET0
/ASIC_RST
/ES_PAGE
MSU_ST1
SPFMT0
SPFMT2/MIRCNT
(SIN2)
SPFMT1
/TRANSST
(KEYIN)
PMCLK
RTH
SPFMT3
/SCANSP
PSL
/SCANST
(SIN3)
(SIN1)
ESS_TS
/ESC_RDY
ES_CMD
/HWR
/LWR
/ESS_RDY
/RD
SELIN3
SELIN2
SELIN1
/RESET1
/CS3
/CS2
/CS1
/CS0
Spreading Range :
+/- 1.25%
R4(*3)
When IC1 is,
mounted
NOT mounted
OPEN
0J
R3(*1)
OPEN
680J
R7(*4)
22J
OPEN
R2(*2)
0J
OPEN
C3(*5)
C1(*6)
22pF
22pF
15pF
15pF
*R2,R3,C1, and C3 are tentative
(2-D2)
(2-E3)
(2-E3)
(2-E3)
(4-C3)
(4-C2)
(4-C3)
(4-C3)
(2-D1)
(5-B2)
(2-C4)
(8-A2)
(13-B2)
(4-D4)
(4-D4)
(4-C3)
(4-D4)
(5-E3)
(4-D4)
(8-A1)
Reset IC
(4-C2)
(8-A3)
(13-B2)
(2-C1)
(4-C2)
(3-A2)
(4-A2)
(2-C1)
(4-C2)
(3-A2)
(8-A3)
(8-A2)
(8-A2)
(9-B2)
A
A
B
B
C
C
4
3
2
1
AL-1556/1566  CIRCUIT DIAGRAM  13 - 2
C9
0.1u
C14
0.1u
BR8
10kJ
1
2
3
4
8
7
6
5
BR10
10kJ
1
2
3
4
8
7
6
5
BR5
10kJ
1
2
3
4
8
7
6
5
H8S/2321
P35/SCK1
64
P34/SCK0
63
P33/RxD1
62
P32/RxD0
61
P31/TxD1
60
P30/TxD0
59
VCC
58
PD7/D15
57
PD6/D14
56
PD5/D13
55
PD4/D12
54
Vss
53
PD3/D11
52
PD2/D10
51
PD1/D9
50
PD0/D8
49
PE7/D7
48
PE6/D6
47
PE5/D5
46
PE4/D4
45
Vss
44
PE3/D3
43
PE2/D2
42
PE1/D1
41
PE0/D0
40
VCC
39
P64/IRQ0
38
V
ss
65
BR7
10kJ
1
2
3
4
8
7
6
5
BR9
10kJ
1
2
3
4
8
7
6
5
C6
100p
BR11
10kJ
1
2
3
4
8
7
6
5
R15
1kJ
BR14
33J
1
2
3
4
8
7
6
5
BR12
10kJ
1
2
3
4
8
7
6
5
BR94
10kJ
1
2
3
4
8
7
6
5
BR16
33J
1
2
3
4
8
7
6
5
BR13
10kJ
1
2
3
4
8
7
6
5
C7
0.1u
BR18
10kJ
1
2
3
4
8
7
6
5
BR17
33J
1
2
3
4
8
7
6
5
BR15
10kJ
1
2
3
4
8
7
6
5
C10
0.1u
BR19
33J
1
2
3
4
8
7
6
5
C1
1
0.1u
IC3
24WC02
E0 1
E1 2
E2 3
VSS 4
SDA
5 SCL
6 WC
7 VCC
8
C12
0.1u
C385 OPEN
C13
0.1u
C8
10u/16V
+
C5
100p
BR1
10kJ
1
2
3
4
8
7
6
5
R331
33J
BR2
10kJ
1
2
3
4
8
7
6
5
L1
ZJSR5101-223
BR3
10kJ
1
2
3
4
8
7
6
5
R14
10kJ
BR4
10kJ
1
2
3
4
8
7
6
5
R17
OPEN
R16
1kJ
BR6
10kJ
1
2
3
4
8
7
6
5
CPUCLK(NC)
SPFMT1
(FW)
mt_at_home
LWR
/CS0#
/CS2#
CPU_SYNC
/CS1#
SCL
TxD1
SPFMT0
/SCANSP
(SPPD)
/TRANSST
CCD_TG
SDA
(PSW)
SPFMT3
ARB_INT
/SCANST
SPFMT2
HWR
RD
A20
(SPPD)
MT_HOME
CPU_SYNC
(PSW)
CCD_TG
(FW)
ARB_INT
POFF
SCL
/CS3#
TXD1
A20
(SIN3)
(SIN2)
(SIN1)
(KEYIN)
SDA
SCL
SDA
DMT3
/WDTOVF
D14
/CS4#
POFF
D8
D5
RY/BY
D1
D0
DMT0
D1
D15
D7
D11
D3
D0
D12
D11
RESETOUT1
D13
D8
D3
/CS4#
D10
D4
D7
D5
DMT1
RY/BY
D9
DMT2
D6
D2
D9
D14
D6
D4
D10
/STBY
/PRINTST
D12
D15
D2
D13
/ESC_RDY
/ESS_RDY
ES_CMD
ESS_TS
DMT3
DMT0
DMT2
DMT1
NMI
CPU3.3
CPU3.3
VCC3
VCC3
VCC3
VCC3
VCC3
A[19..0]
mt_at_home
RY/BY
(PSW)
CCD_TG
CPU_SYNC
ARB_INT
D[15..0]
(SPPD)
(FW)
SDA1
SCL
POFF
DMT2
LCDDB7
LCDDB6
DMT1
DMT0
TxD1
LCDRS
LCDE
LCDDB5
LCDDB4
DMT3
/CS4
BZR
(2-A1) (3-A3)
(2-B1)
(4-D4)
(14-C3)
(7-E1)
(2-B1)
(2-A4)
(7-E1)
(2-A1)
(6-D4)
(6-D4)
(6-D4)
(6-D4)
(5-B1)
(3-B2)
(14-D3)
(13-C2)
(3-A1) (4-A2)
(4-A1)
(4-B1)
(11-B2)
(4-C3)
(4-C1)
(4-C1)
Serial EE-PROM
(4-C1)
(4-C1)
(4-C1)
(4-C1)
(13-B2)
(8-A2)
C
C
D
D
E
E
4
3
2
1
1/14
AL-1556/1566  CIRCUIT DIAGRAM  13 - 3
A
A
B
B
C
C
4
3
2
1
(14-D3)
(1-D2),(14-D3)
(14-A3)
(14-A4)
(14-D3)
(14-A2)
(14-A2)
(14-D3)
(14-D3)
(14-A2)
(14-A2)
(14-A2)
(14-A2)
(5-B1)
(5-B1)
(6-B3)
(6-B3)
(6-B3)
(6-B3)
(6-B3)
(6-B3)
(5-B1)
(3-E2)
(3-E3)
(3-D2)
(3-D2)
(3-D2)
(3-D2)
(3-D2)
(3-D2)
(3-D2)
(3-E1)
(3-E2)
(3-E2)
(1-D2)
(1-C1)
(5-B1)
(1-A2)
(4-C3
)
(1-D2
)
(1-D2
)
(1-B
3)
(1-B
3)
(1-B
1)
(5
B
1)
(3-A1)
(4-A2)
(13-C2)
(3-A3)
(3-A
2)
(13-B
2)
(8-A
1)
(4-C1
)
(1-B
1)
(9-B
2)
(3-B
2)
MCU PWB (ASIC section)
RAMDB0
RAMDB1
RAMDB2
RAMDB3
RAMDB4
RAMDB5
RAMDB6
RAMDB7
RAMDB15
RAMDB14
RAMDB13
RAMDB12
RAMDB11
RAMDB10
RAMDB9
RAMDB8
SFCLK48
PFCLKIN
PFCLKOUT
MM_BI2
MM_AI0
MM_BI1
MM_AI2
MM_BI0
MM_AI1
/INREQ
/OUTACK
/FAXPRO
/PCLPRO
/OUTCS
A8
D9
/OU
TCS
/PCLP
RO
MM_BI2
RAMDB13
D7
RAM_CL
K_OUT
AFE_SDI
D4
D2
MEM_
INT
MM_AI0
RAMDB14
D8
PFC
LKIN
/FA
XPRO
D15
PFCL
KOUT
D3
D0
A7 A6
A5
CL
KSW
RAMDB9
/IN
REQ
MM_BI1
MM_BI0
MM_AI2
MM_AI1
D1
D13
D5
JTG_
TDI
D12 D11
RAMDB12
A4
A2 A1
/OU
TACK
A9
A3
RAMDB1
D6
SFCL
K48
RAMDB15
D10
PFC
LK
SYNC
#
D14
JTG
_TDO
RAMDB2
/ES
PRD
RAMDB7
RAMDB6
RAMDB5
RAMDB4
RAMDB3
RAMDB0
RAMDB11
RAMDB10
RAMDB8
AFE_DB2
AFE_DB7
AFE_DB0
AFE_DB6
AFE_DB3
AFE_DB4
AFE_DB1
AFE_DB5
AFE_DB7
AFE_DB6
AFE_DB5
AFE_DB4
AFE_DB3
AFE_DB2
AFE_DB1
AFE_DB0
AFE_SDI
JTG
_TMS
JTG_TCK
JTG_TDI
JTG_TMS
JTG_TCK
JTG_TDO
MAD11
MAD8
MAD4
MAD1
MAD2
MAD5
MAD6
MAD9
MAD3
MAD0
MAD7
MAD12
MAD10
RAM_CLK_OUT
AFE_SEN
ADCLK
CCD_CP
CCD_PHI1
CCD_PHI2
CCD_TG
AFE_DB[7..0]
CL
CCD_RS
VSAMP
AFE_SCK
AFE_SDI
BSAMP
MM_Y1
MM_PH_A
MM_AI0
MM_AI1
MM_PH_B
MM_BI0
MM_BI1
MM_Y2
MM_Y3
BANK1
BANK0
/SDCAS
/SDRAS
/SDCS
DQM0
MAD[12..0]
/SDWDE
SDCKE
DQM1
SDCLK
D[15..0]
A[19..0]
/CS2
MIRCN
T
CPU_S
YNC
/LWR /RD
RAMDB[15..0]
ARB_I
NT
MMD
(/ASI
C_RST)
/LEND
VIDEO#
/RESET0
VCC3
VCC3
VCC3
VCC3
C397
0.1u
R351
33J
C69 12p
IC5
HG73C138HFV
ASIC
1 2 3 4
8
6 7
5
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49
192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174
256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
217
231
230
225
221
226
220 219
223
218
216 215
229
228
227
224
222
214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197
195
196
193
194
33
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
CPU_DATA7 CPU_DATA6 CPU_DATA5 CPU_DATA4
CPU_DATA1
CPU_DATA3 CPU_DATA2
VCC(AC)
CPU_DATA0 GND(AC) MIRCNT /CPUSYNC MEM_INT ARB_INT VCC(CORE) CPU_AD8 CPU_AD7 CPU_AD6 CPU_AD5 GND(CORE) RAM_CLK_IN CPU_AD4 CPU_AD3 CPU_AD2 CPU_AD1 CPU_AD0 /CPUCS SFCLK48 GND(CORE) /CPUWR /CPURD /RESET
PFCLK CLKSW GND(CORE) PFCLKOUT PFCLKIN GND(PLL) VCC(PLL) GND(PLL) VCC(PLL) TM2_15M /SYNC GND(AC) /VIDEO /LEND VCC(AC) OUTP00
VCC(CORE)
/INREQ /OUTCS
/OUTACK
/ESPRD
/FAXPRD /PCLPRD GND(AC) MDAT15 MDAT14 MDAT13
VCC(CORE)
MDAT12 MDAT11 MDAT10 VCC(AC) MDAT09 MDAT08 MD
T0
RAM_DATA4
RAM_DATA5
RAM_DATA6
RAM_DATA7
GND(AC)
RAM_DQM0
RAM_WDE
VCC(AC)
RAM_CAS
RAM_RAS
RAM_CS
RAM_BANKS0
RAM_BANKS1
VCC(CORE)
RAM_MAD10
RAM_MAD0
RAM_MAD1
GND(CORE)
RAM_MAD2
RAM_MAD3
GND(AC)
MM_AI2
MM_AI1
MM_AI0
MM_PH_A
AFE_DB3
MM_BI2
MM_BI1
MM_Y2
VCC(AC)
MM_Y1
AFE_DB0 AFE_DB1
GND(CORE)
AFE_DB2
AFE_DB4 AFE_DB5
MM_BI0
MM_PH_B
VCC(CORE)
MM_Y3
CLPWM
AFE_DB6 AFE_DB7 GND(AC) AFESCK
VCC(CORE)
ADCLK
GND(CORE)
AFE_SEN CCD_PH1 CCD_PH2 AFE_SDI
CCD_CP BSAMP CCD_RS CCD_TG VSAMP
GND(CORE)
TD0
TRSK
TDI
TCK
TMS
VCC(CORE)
GND(CORE)
RAM_DATA3
RAM_DATA2
RAM_DATA1
RAM_DATA0
GND(AC)
RAM_DATA15
RAM_DATA14
VCC(CORE)
RAM_DATA13
RAM_DATA12
RAM_DATA11
RAM_DATA10
RAM_DATA9
RAM_DATA8
VCC(CORE)
RAM_DQM1
RAM_CKE
GND(AC)
RAM_CLK_OUT
GND(CORE)
RAM_MAD12
RAM_MAD11
RAM_MAD9
VCC(CORE)
RAM_MAD8
RAM_MAD7
VCC(AC)
RAM_MAD6
RAM_MAD5
RAM_MAD4
GND(AC)
CPUDATA15
CPUDATA14
CPUDATA13
CPUDATA12
CPUDATA11
CPUDATA10
CPUDATA9
CPUDATA8
C67
0.1u
BR60
82J
1
2
3
4
8
7
6
5
BR9
1
2
3
4
R45
0J
R24
33J
BR43
33J
1
2
3
4
8
7
6
5
L3
ZJSR5101-223
BR48
10kJ
1
2
3
4
8
7
6
5
BR2
1
2
3
4
BR27
33J
1
2
3
4
8
7
6
5
BR30
33J
1
2
3
4
8
7
6
5
C70 12p
R23
33J
BR61
10kJ
1
2
3
4
8
7
6
5
C47
47p
R34
10kJ
X2
OSC-31
48MHz
1
8
5
4
N.C.
VCC
OUTPUT
GND
R25
33J
R32
10kJ
BR29
10kJ
1
2
3
4
8
7
6
5
BR39
33J
1
2
3
4
8
7
6
5
C49
47p
BR31
10kJ
1
2
3
4
8
7
6
5
BR57
10kJ
1
2
3
4
8
7
6
5
R27
33J
C68
12p
C51
47p
BR53
10kJ
1
2
3
4
8
7
6
5
BR62
33J
1
2
3
4
8
7
6
5
R26
33J
BR63
33J
1
2
3
4
8
7
6
5
C50
47p
R29
33J
C52
47p
C48
47p
C66 2200
0p
R30
33J
BR41
33J
1
2
3
4
8
7
6
5
C53
47p
BR45
33J
1
2
3
4
8
7
6
5
BR33
10kJ
1
2
3
4
8
7
6
5
R31
33J
X3
HC-49U/S (16.1511MHz)
BR49
33J
1
2
3
4
8
7
6
5
C54
47p
BR52
33J
1
2
3
4
8
7
6
5
R44
0J
R43
33J
BR56
33J
1
2
3
4
8
7
6
5
R33
10kJ
Page of 61
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