Sharp DV-SV86H Service Manual ▷ View online
6
4. SYSTEM BLOCK DIAGRAM AND MT1379 PIN DESCRIPTION
4.1. MT1379 PIN DESCRIPTION
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8
4.2. SYSTEM BLOCK DIAGRAM
A sample system block diagram for the MT1379 DVD player board design is shown in the
following figure:
following figure:
9
5. AUDIO OUTPUT
The MT1379 supports two-channel and six-channel analog audio output. In a system configuration with six analog outputs,
the front left and right channels can be configured to provide the stereo (2 channel) outputs and Dolby Surround, or the left and
right front channels for a 5.1 channel surround system.
The MT1379 also provides digital output in S/PDIF format. The board supports both optical and coaxial SPDIF outputs.
The MT1379 also provides digital output in S/PDIF format. The board supports both optical and coaxial SPDIF outputs.
6. AUDIO DACS
The MT1379 supports several variations of an I
2
S type bus, varying the order of the data bits (leading or no leading zero bit,
left or right alignment within frame, and MSB or LSB first) is possible using the MT1379 internal configuration registers. The
I
2
S format uses four stereo data lines and three clock lines. The I
2
S data and clock lines can be connected directly to one or
more audio DAC to generate analog audio output.
The two-channel DAC is an AKM AK4382A. The DACs support up to 192kHz sampling rate.
The outputs of the DACs are differential, not single ended so a buffering circuit is required. The buffer circuits use National
LM833 op-amps to perform the low-pass filtering and the buffering.
7. VIDEO INTERFACE
7.1. VIDEO DISPLAY OUTPUT
The video output section controls the transfer of video frames stored in memory to the internal TV encoder of the MT1379. The
output section consists of a programmable CRT controller capable of operating either in Master or Slave mode.
The video output section features internal line buffers which allow the outgoing luminance and chrominance data to match
the internal clock rates with external pixel clock rates, easily facilitating YUV4: 2:2 to YUV4: 2:0 component and sample
conversion. A polyphase filter achieves arbitrary horizontal decimation and interpolation.
Video Bus
The video bus has 8 YUV data pins that transfer luminance and chrominance (YUV) pixels in CCIR601 pixel format (4:2:2).
The video bus has 8 YUV data pins that transfer luminance and chrominance (YUV) pixels in CCIR601 pixel format (4:2:2).
In this format, there are half as many chrominance (U or V) pixels per line as luminance (Y) pixels; there are as many
chrominance lines as luminance.
Video Post-Processing
The MT1379 video post-processing circuitry provides support for the color conversion, scaling, and filtering functions through
The MT1379 video post-processing circuitry provides support for the color conversion, scaling, and filtering functions through
a combination of special hardware and software. Horizontal up-sampling and filtering is done with a programmable, 7-tap
polyphase filter bank for accurate
non-integer interpolations. Vertical scaling is achieved by repeating and dropping lines in accordance with the applicable
non-integer interpolations. Vertical scaling is achieved by repeating and dropping lines in accordance with the applicable
scaling ratio.
Video Timing
The video bus can be clocked either by double pixel clock and clock qualifier or by a single pixel clock. The double clock typically
The video bus can be clocked either by double pixel clock and clock qualifier or by a single pixel clock. The double clock typically
is used for TV displays, the single for computer displays.
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