DOWNLOAD Sharp XL-UR5H (serv.man2) Service Manual ↓ Size: 9.47 MB | Pages: 88 in PDF or view online for FREE

Model
XL-UR5H (serv.man2)
Pages
88
Size
9.47 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio / System / Temporary Data
File
xl-ur5h-sm2.pdf
Date
PREV: Sharp XL-UR5H User Manual / Operation Manual

Sharp XL-UR5H (serv.man2) Service Manual ▷ View online

XL-UR5H
6 – 10
HOME_SW
SCLK IN
CD_RESET
CD_SCK
CD_STB
CD_SDA
MUTE
RESET
WCLK IN
DATA IN
MCLK IN
I2S_LRCK
I2S_DATA
I2S_BCK
P_CD
CD+8V
CD-GND
AVCC(+5V)
AVCC
DVCC(+5V
+5V
DVCC(+5V)
DVCC(+5V)
AVCC(+5V)
+5V
S_VCC
VDDP
VDDP
RFVC
+5V
+8V
CN901(2PX2.5)
R924
1k
R997
N
C
R913
100
R905
2R2
C916
104
C976
100n
C976
R914
open
R999
100
+
C949
100U
+
C924
22p
R944
150k
+
C940
100U
+
Q916
S8050
C942
104
R927
1
k
R910
NC
R998
N
C
C937
50p
C933
104
C920
104
R911
330
C943
104
C925
22p
R916
1K
D912
1N4148
R923
1k
C9
22
D902
1N4001
R992
2R2
C922
104
C934
223
+
C921
47U
+
R909
NC
C944
102P
R900
100
R945
1
2
3
4
5
6
7
8
9
10
11
12
13
14
CN906
2.0MM X 14PIN
+
C980
470uF
+
R996
N
C
R943
4.7K
R907
NC
R993
2R2
X901
16.9344MHZ
R901
100
R920
22k
L901
10uH(0R)
R908
NC
R994
100
+
C917
47U
+
VSSA1
1
VDDA1
2
B
3
A
4
C
5
D
6
F
7
E
8
VCOM
9
Vadc
10
Idata
11
RFIN
12
RFREF
13
Ir
14
VSSA2
15
VDDA2
16
CRIN
17
CROUT
18
MODE
19
MU
T
E
20
WC
LK
_O
U
T
21
S
C
LK
_O
U
T
22
DAT
A
_
O
UT
23
ERR
24
WC
LK
_I
N
25
S
C
LK
_I
N
26
DAT
A
_
IN
27
NC/ACK
28
MC
L
K
29
CL
1
6
30
DATA/W
R
31
STB/RD
32
ACK
33
DATA7
34
DATA6
35
DATA5
36
DATA4
37
DATA3
38
DATA2
39
DATA1
40
DATA0
41
TEST
42
RESET
43
VDDA
44
VSSO
45
VDDO
46
VREF
47
R
48
CR
49
CL
50
L
51
RAD
52
FO
C
53
SL
ED
54
VSSP
55
O
VER_
F
L
O
W
56
BCL
K
57
MOT
O
58
VDDP
59
VDD
60
GND
61
TRAY_
S
W
62
SL
ED_
S
W
63
LD
O
N
64
IC901
SC9641
C966
C948
102
C932
104
R915
+
C923
47U
+
R903
100k
+
C945
10U
+
R995
100
C941
102
Figure 6-9: CD SCHEMATIC DIAGRAM (1/2)
XL-UR5H
6 – 11
SL-
SL+
GND
FOC-
RAD-
FOC+
RAD+
VR
C
A
F
E
VCOM
SL+
MOTO-
MOTO+
A
C
B
D
VREF
D
A
B
C
D
RF_AVCC
MON
B
LD
MUTE
LDON
VCOM
MON
SL-
SL-
SL+
MOTO-
MOTO+
AVCC(+5V)
VDDP
DVCC(+5V)
+8V
+5V
+8V
RF VCC(+5V)
RFVCC(+5V)
DA11
KSM213
L902
10uH
R932
10K
R931
10K
R934
13K
R951
33K
R933
13K
C931
102P
C931
102P
C939
104
R944
50k
C960
104
C927
104
Q922
9015
D913
1N4148
Q901
B764
R937
10K
R954
33K
C978
104
C978
104
C965
102
R917
12K
C961
220P
C972
104
C936
102P
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CN903
FFC1.0-16PINS
R930
68k
R922
10k
+
C929
47U
+
D912
1N4148
R923
1k
C950
220P
C905
103P
C958
220P
C938
102P
C953
220P
+
C974
100U
+
R902
0
R904
22k
C921
47U
OUT1A
1
OUT1B
2
IN1A
3
IN1B
4
REG
5
REO
6
MUTE
7
GND
8
IN5A
9
IN2A
10
OUT2B
11
OUT2A
12
GND
13
IN5B
14
OUT5B
15
OUT5A
16
OUT3A
17
OUT3B
18
IN3A
19
LDCTL
20
VCC
21
VCC
22
VREF
23
IN4B
24
IN4A
25
OUT4B
26
OUT4A
27
GND
28
IC902
SA9259
C944
102P
VTH
1
LD
2
MON
3
PD1
4
PD2
5
GND
6
VREF
7
NC
8
NC
9
RFM
10
RFO
11
RFI
12
RFTC
13
AGC
14
LDON
15
VDD
16
IC903 SA9618
R950
33K
R945
1M
C928
102P
R929
10K
C967
104
R919
3k
R952
33K
C951
220P
+ C918
100U
+
C959
104
C955
220P
R939
13K
+ C926
47u
+
C952
220P
R946
3.3k
C971
104
R936
13K
C963
104
C917
47U
C969
104
+
C966
100uF
+
R935
10K
R925
10
R921
10k
C919
104
R926
82
R918
12K
R915
15k
C957
220P
C923
47U
R947
10
R947
10
C954
220P
R938
68K
C964
220P
C956
220P
C935
104
R912
22k
R928
10K
+
C930
100UF
+
C962
220P
R906
12K
Figure 6-10: CD SCHEMATIC DIAGRAM (2/2)
XL-UR5H
6 – 12
XA19
XA[21:0]
XA20
XD15
XD[15:0]
XD13
XD14
XD4
XD5
XD3
XD7
XD8
XA21
XD6
XD9
XD11
XD12
XD2
XA3
XA4
XA15
XA16
XA17
XA18
XD0
XD1
XA5
XA6
XA1
XA2
XA7
XA8
XD10
XA12
XA13
XA0
XA14
XA10
XA11
XA9
VDD33D
VDD18D
VDD33D
VDD33D
VDD33D
SD_CKE
XOUT
AD2
B7
XD[15:0]
XTOUT
XFILT
NOR_CS
B4
OE
WE
SD_CLK
SD_CS
B3
XA[21:0]
XFILT
XOUT
XIN
XTIN
XIN
AD0
AD2
AD4
AD0
AD4
RESET
A12
A13
A14
A15
B2
SD_CKE
TS2501
C27
104
C27
104
R25
10K
R25
10K
C25
104
C25
104
R23
10K
R23
10K
C26
104
C26
104
C41
22P
C41
22P
C80
10P
C80
10P
TD
I
99
TM
S
100
TC
K
101
TD
O
102
nT
R
S
T
103
SD_
C
KE/G
P
IO
_B
[0
]
56
SD_
C
LK
44
S
D
_nC
S
/G
P
IO
_B
[1
]
46
XA[0]
17
XA[1]
18
XA[2]
19
XA[3]
20
XA[4]
21
XA[5]
22
XA[6]
23
XA[7]
26
XA[8]
27
XA[9]
28
XA[10]
29
XA[11]
30
XA[12]
31
XA[13]/SD_BA[0]
34
XA[14]/SD_BA[1]
35
XA[15]/SD_nCAS
36
XA[16]/ND_ALE/SD_nRAS
37
XA[17]/ND_CLE
38
XA[18]
39
XA[19]
40
XA[20]/DQM[1]
42
XA[21]/DQM[0]
43
XD[0]
125
XD[1]
126
XD[2]
127
XD[3]
128
XD[4]
2
XD[5]
3
XD[6]
4
XD[7]
5
XD[8]
6
XD[9]
9
XD[10]
10
XD[11]
11
XD[12]
12
XD[13]
13
XD[14]
14
XD[15]
15
nC
S[0
]/ND_
nO
E[0
]/G
PIO
_B[2
]
47
nC
S[1
]/ND_
nO
E[1
]/G
PIO
_B[3
]
48
nC
S[2
]/ND_
nO
E[2
]/G
PIO
_B[4
]
49
nC
S[3
]/ND_
nO
E[3
]/G
PIO
_B[5
]
50
N
D
_nWE
/G
P
IO
_B
[7
]
57
nWE
58
nO
E
59
GPIO
GPIO_
GP
BW[0
BW[
U
U
BM
BM
BM
XIN
74
XOUT
75
XFIL
T
78
XTIN
69
XTO
U
T
70
EXINT[0
]/G
PIO
_A
[1
2]
121
EXINT[1
]/G
PIO
_A
[1
3]
122
EXINT[2
]/G
PIO
_A
[1
4]
123
EXINT[3
]/G
PIO
_A
[1
5]
124
ADIN[0
]
82
ADIN[2
]
83
ADIN[4
]
84
nR
ESET
72 73
VDDIO_
0
112
VDDIO_
1
76
VDD3
_U
SB
64
VDDIO_
2
33
VDDIO_
3
16
VDD_
COR_
0
119
VDD_
COR_
1
109
VDD_
COR_
2
87
VDD_
OSC
71
VDD_
COR_
3
41
VDD_
COR_
4
24
VDD_
COR_
5
7
PKG
1
89
VDDA_
A
DC
81
V
D
D
A
_P
LL
77
VSS3
D_
0
97
VSS3
D_
1
65
VSS3
D_
2
45
VSS3
D_
3
32
VSS3
D_
4
1
VSS2
D_
0
120
VSS2
D_
1
110
VSS2
D_
2
88
VSS2
D_
3
55
VSS2
D_
4
25
VSS2
D_
5
8
V
S
S
_A
D
C
_0
86
V
S
S
_A
D
C
_1
85
V
S
S
_P
LL_0
80
V
S
S
_P
LL_1
79
ADDRESS BUS
DATA BUS
JTAG
CLOCK
MEMORY
CONTROL
EXTERNAL
INTERRUPT
AD
CONVERTER
CODEC
INTERFACE
UART
INTERFACE
USB
INTERFACE
GSIO &
SYSTEM
CONFIG
+2.7V
+1.8V
GND
+1.8V
+3.3V
U5
ADDRESS BUS
DATA BUS
JTAG
CLOCK
MEMORY
CONTROL
EXTERNAL
INTERRUPT
AD
CONVERTER
CODEC
INTERFACE
UART
INTERFACE
USB
INTERFACE
GSIO &
SYSTEM
CONFIG
+2.7V
+1.8V
GND
+1.8V
+3.3V
U5
C67
100P
C67
100P
C38
350P
C38
350P
C33
102
C33
102
C61
102
C61
102
C54
102
C54
102
R34
10K
R34
10K
C40
22P
C40
22P
C65
102
C65
102
C24
104
C24
104
C56
102
C56
102
C42
104
C42
104
L13
100R
L13
100R
MAX809
MAX809
R62
100K
R62
100K
C34
102
C34
102
C68
102
C68
102
C13
104
C13
104
C7
104
C7
104
C62
102
C62
102
C35
102
C35
102
C23
104
C23
104
+
C36
100uF
+
C36
100uF
Y1
12MHz
Y1
12MHz
C64
102
C64
102
C53
102
C53
102
Figure 6-11: MCU SCHEMATIC DIAGRAM (1/2)
XL-UR5H
6 – 13
MODE0
MODE1
VDD33D
VDD33D
USB_5V
VDD33D
VDD18D
AD2
B28
B29
DAI
B27
B26
B9
B8
A1
A0
A3
A2
MCLK
DAO
LRCK
BCLK
A5
A4
A7
A6
B29
B28
A9
A8
A11
A10
AD2
AD4
AD0
AD4
RESET
D16
D15
D18
D17
D20
D19
D21
LRCK
DAO
BCLK
B26
A10
A11
D17
DAI
D16
B27
A9
A8
D17_I2C_SCL
D16_I2C_SDA
D17
D16
RESET
D16_I2C_SDA
D17_I2C_SCL
D15
D18
D19
A8
A9
A10
A11
A13
A14
A15
A12
D20
B27
B7
B3
B4
B26
B2
D21
TS2501
R27
100R
R27
100R
L9
CB_1608_451A
L9
CB_1608_451A
C77
100P
C77
100P
R49
47K
R49
47K
C48
100P
C48
100P
C29
104
C29
104
C45
47P
C45
47P
GPIO_A[0]/SDO_[0]
104
GPIO_A[1]/SCK_[0]/CBCLK
105
GPIO_A[2]/FRM_[0]/CLRCK
106
GPIO_A[3]/SDI_[0]/CDAI
107
GPIO_A[4]/SDO_[1]
108
GPIO_A[5]/SCK_[1]
111
GPIO_A[6]/FRM_[1]
113
GPIO_A[7]/SDI_[1]
114
BW[0]/GPIO_A[8]/SDO_[2]
115
BW[1]/GPIO_A[9]/SCK_[2]
116
GPIO_A[10]/FRM_[2]
117
GPIO_A[11]/SDI_[2]
118
USB D+/GPIO_B[26]
51
USB D-/GPIO_B[27]
52
USB HD+/GPIO_B[28]
53
USB HD-/GPIO_B[29]
54
UART_TXD/GPIO_B[8]
60
UART_RXD/GPIO_B[9]
61
BM[0]/GPIO_B[21]/BCLK
62
BM[1]/GPIO_B[22]/LRCK
63
GPIO_B[23]/MCLK
66
BM[2]/GPIO_B[24]/DAO
67
GPIO_B[25]/DAI
68
GPIO_D19
94
GPIO_D17
92
GPIO_D18
93
GPIO_D15
90
GPIO_D16
91
GPIO_D20
95
ADIN[2
]
ADIN[4
]
84
nR
ESET
72
READY/M
O
DE[0
]
73
MODE
[1
]
98
GPIO_D21
96
V
S
S
_P
LL_0
80
V
S
S
_P
LL_1
79
ERTER
SYSTEM
CONFIG
CODEC
INTERFACE
UART
INTERFACE
USB
INTERFACE
GSIO &
SYSTEM
CONFIG
ERTER
SYSTEM
CONFIG
CODEC
INTERFACE
UART
INTERFACE
USB
INTERFACE
GSIO &
SYSTEM
CONFIG
C74
100P
C74
100P
C49
100P
C49
100P
R64
10K
R64
10K
C31
104
C31
104
C73
100P
C73
100P
R69
47K
R69
47K
C37
104
C37
104
C30
104
C30
104
R52
47K
R52
47K
C71
100P
C71
100P
C79
100P
C79
100P
C14
104
C14
104
R28
100R
R28
100R
C66
100P
C66
100P
C61
102
C61
102
C70
100P
C70
100P
C50
100P
C50
100P
C39
104
C39
104
C11
104
C11
104
R8
47K
R8
47K
GND
1
RESET
2
VDD
3
MAX809
U7
MAX809-2.6
MAX809
U7
MAX809-2.6
R10
47K
R10
47K
R11
47K
R11
47K
R55
4.7K
R55
4.7K
C46
100P
C46
100P
C76
100P
C76
100P
R65
47K
R65
47K
C51
100P
C51
100P
R45
10K(NOP)
R45
10K(NOP)
R39
47K
R39
47K
C75
100P
C75
100P
R12
15K
R12
15K
R19
100K
R19
100K
L10
CB_1608_451A
L10
CB_1608_451A
C69
100P
C69
100P
R68
47K
R68
47K
C47
100P
C47
100P
1
2
3
4
CN1
CN1
C32
104
C32
104
R13
15K
R13
15K
C72
102
C72
102
R67
47K
R67
47K
C52
100P
C52
100P
C78
100P
C78
100P
C28
104
C28
104
R60
10K
R60
10K
R56
4.7K
R56
4.7K
C62
102
C62
102
C63
102
C63
102
R50
47K
R50
47K
C16
104
C16
104
Figure 6-12: MCU SCHEMATIC DIAGRAM (2/2)
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