Sharp XL-MP10H (serv.man3) Service Manual ▷ View online
XL-MP10H
7 – 3
IC801 VHiLC78690/-1: Servo/Signal (LC78690)
Pin No.
Terminal Name
Input/Output
Setting in Reset
Function
1
EFMIN
Input
Input
RF signal input.
2
RFOUT
Output
Unfix
RF signal output.
3
LPF
Output
Unfix
To LPF capacitor for detecting DC level of RF signal.
4
PHLPF
Output
Unfix
To LPF capacitor for detecting scratch.
5
AIN
Input
Input
A signal input.
6
CIN
Input
Input
C signal input.
7
BIN
Input
Input
B signal input.
8
DIN
Input
Input
D signal input.
9
FEC
Output
Unfix
To LPF capacitor for FE signal.
10*
RFMON
Output
Unfix
Monitoring for LSI internal analog signal.
11
VREF
Output
AVDD/2
VREF voltage output.
12
JITTC
Output
Unfix
For jitter detection capacitor.
13
EIN
Input
Input
E signal input.
14
FIN
Input
Input
F signal input.
15
TEC
Output
Unfix
To LPF capacitor for TE signal.
16
TE
Output
Unfix
TE signal output.
17
TEIN
Input
Input
TE signal input for TES signal generation.
18
LDD
Output
Unfix
Laser power control signal output.
19
LDS
Input
Input
Laser power detection signal input.
20
AVSS
-
-
Analog GND. Connected to 0V.
21
AVDD
-
-
Analog power supply.
22
FDO
Output
AVDD/2
Focus control signal output. D/A output.
23
TDO
Output
AVDD/2
Tracking control signal output. D/A output.
24
SLDO
Output
AVDD/2
Sled control signal output. D/A output.
25
SPDO
Output
AVDD/2
Spindle control signal output. D/A output.
26
VVSS1
-
-
For EFM
PLL
PLL
GND for built-in VCO. Connected to 0V.
27
PDOUT1
Output
Unfix
Phase comparison output pin 1 for built-in VCO control.
28
PDOUT0
Output
Unfix
Phase comparison output pin 0 for built-in VCO control.
29
PCKIST
Input
Input
To resistance for current setting of PDOUT0, 1 output.
30
VVDD1
-
-
Power supply for built-in VCO
31*
DMUTEB
Output
L
DMUTEB (general-purpose) output
32
PUIN
Input/Output
Input
PUIN (general-purpose) input/output (Built-in Pull-Up resistance)
33*
DEFECT
Output
L
Scratch detection signal output
34*
FSEQ
Output
L
Sync signal output. Switches to "H" when sync signal detected from EFM
signal and sync signal generated internally are the same.
signal and sync signal generated internally are the same.
35*
C2F
Output
L
C2 error signal output.
36
DVDD
-
-
Digital power supply.
37
DVSS
-
-
Digital GND. Connected to 0V.
38
DVDD1.8
Output
H
To power supply capacitor for digital circuit.
39
VVDD3
-
-
Power supply for built-in PLL.
40
VVSS3
-
-
GND for built-in PLL. Connected to 0V.
41
DVDD
-
-
Digital power supply.
42
DVSS
-
-
Digital GND. Connected to 0V.
43
CE
Input
Input
For micro-
processor
interface
processor
interface
Enable signal input.
44
CL
Input
Input
Data transfer clock input.
45
DI
Input
Input
Data input
46
DO
Output
(H)
Data output (Tri-state output: Built-in Pull-Up resistance)
47
RESB
Input
-
Reset input for this LSI. Set as "L" when turning power on.
48*
INTB0
Output
H
Interrupt signal output pin 0 (Servo section)
49*
INTB1
Output
H
Interrupt signal output pin 1 (Decoder section)
50
CONT2
Input/Output
Input
General-purpose input/
output pin 2
output pin 2
Controlled by command from microprocessor.
When not in use, set as input and connect to
0V, or set as output and leave open.
When not in use, set as input and connect to
0V, or set as output and leave open.
51*
CONT1
Input/Output
Input
General-purpose input/
output pin 1
output pin 1
52*
CONT0
Input/Output
Input
General-purpose input/
output pin 0 (Built-in Pull-
Up resistance)
output pin 0 (Built-in Pull-
Up resistance)
53
TEST0
Input
L
Input for testing. Connected to 0V.
54
STREQ
Input/Output
Input
Stream data request signal output.
55
STCK
Input/Output
Input
Bit clock input for stream data.
56
STDATA
Input/Output
Input
Stream data input.
57
TEST1
Input
L
Input for testing. Connected to 0V.
58*
DATA
Output
L
L/R channel data output.
59*
DATACK
Output
L
Bit clock output
XL-MP10H
7 – 4
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
60*
LRSY
Output
L
L/R ch clock output
61
VVDD2
-
-
For EFM
PLL
PLL
Power supply for built-in VCO
62
VPREF2
Input
Input
Input for oscillation range setting of built-in VCO.
63
VCOC2
Input
Input
Input for control voltage setting of built-in VCO.
64
VPDOUT2
Output
Unfix
Output for controlling built-in VCO.
65
VVSS2
-
-
GND for built-in VCO. Connected to 0V.
66
DVDD1.8
Output
H
To power supply capacitor for digital circuit.
67
DVSS
-
-
Digital GND. Connected to 0V.
68
DVDD
-
-
Digital power supply.
69*
DOUT
Output
L
Digital OUT output. EIAJ format.
70*
AMUTEB
Output
L
AMUTEB (general-purpose) output.
71
XVSS
-
-
Digital GND. Connected to 0V.
72
XOUT
Output
Oscillator
For crystal
oscillation
oscillation
To 16.9344 MHz oscillator
73
XIN
Input
Oscillator
74
XVDD
-
-
Digital power supply
75
LCHO
Output
LRVDD/2
D/A con-
verter
verter
L channel output.
76
LRVDD
-
-
Power supply for LR channel.
77
LRVSS
-
-
GND for LR channel. Connected to 0V.
78
RCHO
Output
LRVDD/2
R channel output.
79
AVDD
-
-
Analog power supply.
80
SLCO
Output
Unfix
Slice level control output.
Pin No.
Terminal Name
Input/Output
Setting in Reset
Function
XL-MP10H
7 – 5
CLOCK
GENERATOR
ERROR
CORRECTION
SLICE LEVEL
CONTROL
EFMIN
RFOUT
LPF
PHLPF
AIN
CIN
BIN
DIN
FEC
RFMON
VREF
JITTC
EIN
FIN
TEC
TE
TEIN
LDD
LDS
ATTENUATION CONTROL
SERVO
CONTROL
Synchronization
Detection
EFM
Demodulation
RF
TES, HFL,
DEFECT
DEFECT
DO
DI
CL
CE
Audio FLT MUTE
CPU I/F
&
PORT
CONTROL
FDO
TDO
SLDO
SPDO
PDOUT1
PDOUT0
PCKIST
DMUTEB
PUIN
DEFECT
FSEQ
C2F
DVDD1.8
1bit DAC
8FS DIGITAL FILTER
DEEMPHASIS
INTERPOLATION MUTE
MP3 & WMA
DECODER
Memory I/F
ROM
DECODER
Memory
1M
Stream
I/F
AUDIO
I/F
PLL3
PLL2
DOUT
SLCO
AVDD
RCHO
LRVSS
LRVDD
LCHO
XVDD
XIN
XOUT
XVSS
AMUTEB
DOUT
DVDD
DVSS
DVDD1.8
VVSS2
VPDOUT2
VCOC2
VPREF2
VVDD2
LRSY
DATACK
DATA
TEST1
STDATA
STCK
STREQ
TEST0
CONT0
CONT1
CONT2
INTB1
INTB0
RESB
DVSS
DVDD
VVSS3
VVDD3
DVSS
DVDD
SUBCODE DECODE
VVDD1
VVSS1
AVDD
AVSS
LPF
SIGNAL
PROCESSOR
VREF
MONITOR
JITTER
APC
A/D
D/A
CD PLL
TEXT
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XL-MP10H
7 – 6
[2] LCD DISPLAY
RV-LXA004SJZZ
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