Sharp XL-1500 (serv.man4) Service Manual ▷ View online
– 41 –
XL-1500H
• Sled motor operation failure.
Yes
Yes
Is following sled feed signal output the pin 40 (FMO) of IC801
when FF
when FF
/REW
key is pressed after the CD TEST
MODE "STEP 1" is seted?
Is sled feed signal output the pins 1 and 2 of IC803?
Is sled feed voltage applied between both terminals of sled
motor?
motor?
No
Check the peripheral parts of IC803. If OK, IC803 is faulty.
No
C801 is faulty.
Check the CNW802.
No
Yes
Check the CD mechanism (periphery of sled motor).
If the sled motor does not run when DC2.0V is applied to
both terminals of sled motor, the sled motor is faulty.
If the sled motor does not run when DC2.0V is applied to
both terminals of sled motor, the sled motor is faulty.
• Sled servo failure.
Yes
Is following sled signal output the pin 40 (FMO) of IC801
during playback?
during playback?
Normal.
No
IC801 is faulty.
• Track search failure
Does the sled motor run in FF/REW state when the SERVO
TEST MODE "STEP1" is set?
TEST MODE "STEP1" is set?
Is the following wave output to the pin 34 (TRO) of IC801
during track search in normal playback?
during track search in normal playback?
Is the following wave output to the pins 11 (TEO) of IC802
during track search in normal playback?
during track search in normal playback?
Yes
Yes
No
Check as stated in item "SLED MOTOR OPERATION FAILURE".
No
IC801 failure.
No
Check the PWB pattern between pin 34 (TRO) of IC801 and pin
25 of IC803.
Check the PWB pattern between pins 26 and 27 of IC803 and
Optical pickup.
If OK. Optical pickup failure.
25 of IC803.
Check the PWB pattern between pins 26 and 27 of IC803 and
Optical pickup.
If OK. Optical pickup failure.
Yes
Is the above wave output to the pins 31 (TEI) and 32 (TEZI) of
IC801 during track serch in normal playback?
IC801 during track serch in normal playback?
No
Check the PWB pattern between pin 11 (TEO) of IC802 and pins 31
and 32 of IC801. If OK. IC802 failure.
and 32 of IC801. If OK. IC802 failure.
Normal.
Yes
Yes
Is following sled feed signal output the pins 3 and 4 of IC803
when FF
when FF
/REW
key is pressed after the CD TEST
MODE "STEP 1" is seted?
Check the PWB pattern between pin 40 of IC801 and pins 3 and 4
of IC803.
of IC803.
No
Is the following wave output to the pin 27 (RFZI) and 28
(RFRP) of IC801 during track search in normal playback?
(RFRP) of IC801 during track search in normal playback?
No
Check the PWB pattern between pins 22 (RFO),17 (RFRP), 19
(RFGO) and 20 (RFGC) of IC802 and pins 24,27,28 and 36 of IC801.
If OK. IC802 failure.
(RFGO) and 20 (RFGC) of IC802 and pins 24,27,28 and 36 of IC801.
If OK. IC802 failure.
Yes
TRO
TEO
TEI
TEZI
FF
REW
FMO
FMO
RFZI
RFRP
FF
REW
SL
±
XL-1500H
– 42 –
FUNCTION TABLE OF IC
IC401 VHiLC75342M-1: Function/Volume Equalizer (LC75342M)
1
DI
Serial data and clock input pin for control.
2
CE
Chip enable pin. Data written into an internal latch in a timing of [H] -> [L]. Each analog switch is activated.
Data transfer enabled at [H] level.
Data transfer enabled at [H] level.
3
VSS
Ground pin.
4
TEST
Electronic volume control pin. To be set to the VSS potential.
5
LOUT
Volume + equalizer output pin.
6
LBASS2
Bass-band filter comprising capacitor and resistor connection pin.
7
LBASS1
Bass-band filter comprising capacitor and resistor connection pin.
8
LTRE
Capacitor connection pin comprising treble band filter.
9
LIN
Volume + equalizer input pin.
10
LSEL0
Input selector output pin.
11
L4
Input signal pin.
12*
L3
Input signal pin.
13
L2
Input signal pin.
14
L1
Input signal pin.
15*
NC
No CONNECT pin. To be open or connected to VSS.
16*
NC
No CONNECT pin. To be open or connected to VSS.
17
R1
Input signal pin.
18
R2
Input signal pin.
19*
R3
Input signal pin.
20
R4
Input signal pin.
21
RSEL0
Input selector output pin.
22
RIN
Volume + equalizer input pin.
23
RTRE
Capacitor connection pin comprising treble band filter.
24
RBASS1
Bass-band filter comprising capacitor and resistor connection pin.
25
RBASS2
Bass-band filter comprising capacitor and resistor connection pin.
26
ROUT
Volume + equalizer output pin.
27*
NC
No CONNECT pin. To be open or connected to VSS.
28
Vref
0.5 x VDD voltage generation block for analog ground. Capacitor of several 10
µ
F to be connected between
Vref and AWSS (VSS) as a counter measure against power ripple.
29
VDD
Supply pin.
30
CL
Serial data and clock input pin for control.
Pin No.
Port Name
Function
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
– 43 –
XL-1500H
IC401 VHiLC75342M-1: Function/Volume Equalizer (LC75342M)
6
7
8
9
10
11
12
13
14 15 16 17
18
19
20
21
22
23
24
25
26
5
27
28
30
29
1
2
3
4
LVref
RVref
CCB
INTERFACE
CONTROL
CIRCUIT
LOGIC
CIRCUIT
CONTROL
CIRCUIT
ROUT
RBASS1
RBASS2
RTRE
RIN
RSEL0
L1
L2
L3
L4
R1
R2
R3
R4
LOUT
LBASS2
LBASS1
LTRE
LIN
LSEL0
VSS CE
DI
CL VDD
NC
Vref
NC
NC
TEST
Figure 43 BLOCK DIAGRAM OF IC
XL-1500H
– 44 –
LCD701: RV-LX0015SJZZ LCD Display
Figure 44 LCD SEGMENT
PinNo
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
com1
com1
z1
h1
g1
a1
REC
h2
g2
a2
SLEEP
h3
g3
a3
RANDOM
h4
g4
a4
MEMORY
com2
com2
b1
j1
n1
p1
b2
j2
n2
p2
b3
j3
n3
p3
b4
j4
n4
p4
b5
com3
com3
c1
l1
m1
f1
c2
l2
m2
f2
c3
l3
m3
f3
c4
l4
m4
f4
c5
com4
com4
z2
k1
d1
e1
z3
k2
d2
e2
MHz
k3
d3
e3
kHz
k4
d4
e4
z4
PinNo
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
com1
h5
g5
a5
RDS
h6
g6
a6
r
h7
g7
a7
TP
h8
g8
a8
EON
com1
com2
j5
n5
p5
b6
j6
n6
p6
b7
j7
n7
p7
b8
j8
n8
p8
PTY
com2
com3
l5
m5
f5
c6
l6
m6
f6
c7
l7
m7
f7
c8
l8
m8
f8
TI
com3
com4
k5
d5
e5
ST
k6
d6
e6
q
k7
d7
e7
k8
d8
e8
TA
SRS(0)
com4
z1
z2
z3
r
q
z4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42
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