Sharp SD-NX10 (serv.man10) Service Manual ▷ View online
SD-NX10H
– 96 –
IC1202 RH-iX2474AFZZ: 4Mbit D-RAM (IX2474AF)
Pin No.
Function
Terminal Name
1, 2
DQ0, DQ1
Data input/Data output
3
WE
Write enable
4
RAS
Row address strobe
5
A9
Address input
6-9
A0-A3
Address input
10
VDD
Power (3.3V)
11-15
A4-A8
Address input
16
OE
Output enable
17
CAS
Column address strobe
18, 19
DQ2, DQ3
Data input/Data output
20
VSS
Ground (0V)
IC1301 VHiFTD2005/-1: Head Driver (FTD2005)
IC1302 VHiCPH5608/-1: Head Driver (CPH5608)
IC1402 VHi58X2402T-1: EEPROM (58X2402T)
Pin No.
Function
Terminal Name
1-3
A0-A2
Device address
4
VSS
Ground
5
SDA
Serial data input/output
6
SCL
Serial clock input
7
WP
Write protect
8
VCC
Power supply
Figure 96-1 BLOCK DIAGRAM OF IC
4
RAS
5
17
15
CAS
A0
A9
WE
DQ0-DQ3
20
V
SS
V
BB
17
CAS
Clock Generator
CBR Refresh
Counter
Row Address
Buffer
Memory
Cell
I/O
Selection
Write Clock
Generator
Data Input
Buffer
Data Output
Buffer
Row Address
Buffer
On ChipVBB
Generator
Row Decoder
Column Decoder
Sense Amp.
Word Driver
SELF Refresh
Timer
MN42V4400 only
3
OE
16
2
18
19
1
Figure 96-2 BLOCK DIAGRAM OF IC
Figure 96-3 BLOCK DIAGRAM OF IC
Figure 96-4 BLOCK DIAGRAM OF IC
D2
S2
S2
G2
D1
S1
S1
G1
5
6
7
8
4
3
2
1
G1
S
G2
D1
D2
1
2
3
4
5
1
2
3
4
8
7
6
5
A0
A1
A2
VSS
VCC
WP
SCL
SDA
– 97 –
SD-NX10H
1
4M/16M
Output
4M/16M DRAM selection input
2
64M
Output
64M DRAM selection input
3
LDVAR
Output
LDVAR (laser power adjustment output)
4*
ADJS
Output
ADJS (for automatic adjustment step check)
5
CIN
Input
CIN (track count signal input)
6*
NC
—
Not used
7
UNLOCK
Input
ERR input (UNLOCK of MD LSI monitor PLL)
8
BYTE
Input
GND
9
CNVss
Input
GND
10*
STID OUT
Output
ST-ID output
11*
SEACH OUT
Output
MD search output
12
RESET
Input
RESET input
13*
NC
Output
Clock output
14
Vss
—
GND
15
MCCK
Input
EXTAL (8.4672MHz)
16
Vcc
Input
+3.15V
17
P85
Input
Input output port P85
18
DINT
Input
DINT (Interrupt input from MD-LSI)
19
SFSY
Input
Subcode communication frame synchro Interrupt input
20
ST-ID
Input
ST-ID input (MD-ON)
21
SERCH
Input
CD search input (Synchronous REC interrupt input)
22
MDRSW
Output
MD RSW output
23*
CDB SEL
Output
CD BLK SEL output
24
DSENSE
Input
DSENSE (servo sense input from MD-LSI)
25
P-DOWN
Input
P-DOWN (blackout detection)
26
HD ON
Output
HDON (magnetic head power ON/OFF output)
27
EEPRO
Output
EEPROM protect release output
28
HFON
Output
HFON
29
EEPK
Output
EEPROM serial clock output
30
EEPD
Input/Output
EEPROM data input output
31
MD DATA
Output
MD computer data input output
32
K DATA
Input
System computer data input
33
DSCK
Input
System computer clock input
34
DSTB
Output
DSTB (system computer communication possible and during communication)
35*
NC
Output
Not used
36
SBO
Input
Subcode serial data input
37
SBCK
Output
Subcode communication serial clock output
38
DISC
Output
DISC
39
R/P
Output
R/P output (REC/PLAY selection)
40
FOK
Input
FOK (focus servo condition monitor input)
41
FLASH L
Input
Flash write selection
42
SGAIN
Output
SGAIN
43
SYRS
Output
MD LSI resister select signal output
44
SYRD
Output
SYRD (MD-LSI read signal output)
45
SYWR
Output
SYWR (MD-LSI write signal output)
46
FLASH H
Input
Flash write selection
47
SYS D7
Input/Output
SYS D7 (data bus 7)
48
SYS D6
Input/Output
SYS D6 (data bus 6)
49
SYS D5
Input/Output
SYS D5 (data bus 5)
50
SYS D4
Input/Output
SYS D4 (data bus 4)
51
SYS D3
Input/Output
SYS D3 (data bus 3)
IC1401 RH-iX0410AWZZ: MD System Microcomputer (IX0410AW) (1/2)
Pin No.
Function
Terminal Name Input/Output
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
SD-NX10H
– 98 –
IC1401 RH-iX0410AWZZ: MD System Microcomputer (IX0410AW) (2/2)
Pin No.
Function
Terminal Name Input/Output
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
52
SYS D2
Input/Output
SYS D2 (data bus 2)
53
SYS D1
Input/Output
SYS D1 (data bus 1)
54
SYS D0
Input/Output
SYS D0 (data bus 0)
55*
P37
Output
Input output port P37
56*
P36
Output
Input/output port P36
57*
P35
Output
Input/output port P35
58*
P34
Output
Input/output port P34
59*
P33
Output
Input/output port P33
60*
P32
Output
Input/output port P32
61
P31
Output
Input/output port P31
62
Vcc
Input
+3.15V
63
INNSW
Input
Pick most inner periphery detection input
64
GND
—
GND
65
L3 DATA
Output
L3 DATA (soft serial communication, 2 mode presence, LSB first)
66
L3 MODE
Output
L3 MODE (soft serial communication, 2 mode presence, LSB first)
67
L3 CLK
Output
L3 CLK (soft serial communication, 2 mode presence, LSB first)
68*
P24
Output
Input output port P24
69*
P23
Output
Input output port P23
70
PCNT0
Output
PCNT0 output
71*
LAST
Output
LAST
72
LD ON
Output
LDON output (H : ON)
73
A/B
Output
ANLPTR output. ADC/DAC selection input.
74
SBSY
Output
Subcode communication block synchro input.
75*
DAP ON
Output
DAPON output (for CK)
76*
DFS0
Output
DFS0 output
77*
DFS1
Output
DFS1 output
78
P12
Output
Input/output port P12
79
P11
Output
Input/output port P11
80
XRST
Output
XRST (system reset output)
81*
AD MUTE
Output
ADMUTE output (for CK)
82
LD+
Output
Loading motor + side control output
83
LD-
Output
Loading motor - side control output
84*
MUTE
Output
MUTE output
85*
RAST
Output
RAST
86*
TEST2
Input
TEST 2
87*
TEST1
Input
TEST 1
88*
TEST0
Input
TEST 0
89
AVCK3
Input
AVCK3 (motor driver power monitor input)
90
AVCK2
Input
AVCK2 (AD/DA section 3.1 V monitor input)
91
AVCK1
Input
AVCK1 (head circuit power monitor input)
92
DTEMP
Input
DTEMP (temperature detection input)
93
MINF
Input
MINF (disc type/REC input/mecha position)
94*
TEST K1
Input
TEST K1
95*
TEST K2
Input
TEST K2
96
GND
—
GND
97*
NC
—
Not used
98
VREF
Input
+3.15V
99
AVcc
Input
+3.15V
100
PR
Input
Playback/recording unit setting input
– 99 –
SD-NX10H
1
V
SSA(ADC)
AD converter analog ground
2
V
DDA(ADC)
AD converter analog power
3
VINL
AD converter input (left)
4
Vref(A)
AD converter reference voltage
5
VINR
AD converter input (right)
6
V
ADCN
AD converter reference voltage N
7
V
ADCP
AD converter reference voltage P
8*
MC1
Mode control 1 (Pulled-down)
9*
MP1
Multipurpose pin 1
10
V
DDD
Digital power
11
V
SSD
Digital ground
12
SYSCLK
System clock 256fs, 384fs, 512fs
13
MP2
Multipurpose pin 2
14
MP3
Multipurpose pin 3
15
MP4
Multipurpose pin 4
16
BCK
Bit clock input
17
WS
Word select input
18
DATAO
Data output
19
DATAI
Data input
20*
MP5
Multipurpose pin 5 (Pulled-down)
21*
MC2
Mode control 2 (Pulled-down)
22
VSSA
(DAC)
DA converter analog ground
23
VDDA
(ADC)
DA converter analog power
24
VOUTR
DA converter output (right)
25
V
DDO
Opeamp power
26
VOUTL
DA converter output (left)
27
V
SSO
Opeamp ground
28
Vref(D)
AD converter reference voltage
IC1701 VHiUDA1345/-1: AD/DA Converter (UDA1345)
Pin No.
Function
Terminal Name
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Figure 99 BLOCK DIAGRAM OF IC
VDDA(ADC) VSSA(ADC) VADCP VADCN
Vref(A)
VINR
MC1
MC2
MP5
MP2
MP3
MP4
SYSCLK
VOUTR
Vref(D)
VSSA(DAC)
VDDA(DAC)
VSSO
VDDO
VOUTL
MP1
DATAI
WS
BCK
DATAO
VSSD
VDDD
VINL
ADC
0dB/6dB
switch
ADC
DECMATION FILTER
DC-CANCELLATION FILTER
DIGITAL
INTERFACE
L3-BUS
INTERFACE
DSP FEATURES
INTERPOLATION FILTER
NOISE SHAPER
DAC
DAC
2
3
4
5
1
7
8
9
6
12
13
14
15
11
17
18
19
10
16
22
23
24
25
21
27
28
20
26
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