Sharp HT-M700H (serv.man11) Service Manual ▷ View online
HT-M700H
6 – 9
[2] Schematic diagram
Figure 6-9 SCHEMATIC DIAGRAM (1/27)
SDRAM
SERIAL EEPROM
PLL3
0
CLK SOURCE
1
CRSTAL OSC
DCLK INPUT
SLDC
DEFCT
SVREF21
SLEGN
DB6
DB1
TESTAD
DOE#
MA8
MA1
SCLK
DB11
MA2
MA6
SCSJ
MA5
MA11
MA4
OPEN
AUX1
DB3
SBAD
MA0
SDATA
FOCUS
RFRP
DB9
DB13
DB5
MA7
DIN
DSCK
MA10
SPINDLE
AUX0
RAS2#
MA9
MA0
RAS0#
MA8
FEI
DQM
DB8
DB10
DB14
MA6
MA2
CAS#
RAS1#
MA10
SVREF15
DB12
TRACK
DWE#
MA5
SVREF15
DB15
MA3
DB4
DB0
MA4
DB2
MA9
MIRRA
DA
TEI
CEI
CS0#
MA7
MA3
MA1
DB7
MA11
DIP
RFRP
DMA3
DB15
RESET#
DEFCT
SLDC
SLDC
TR1
TBCK
DB1
DB3
DB0
DMA1
SPDIF
TSD0
DB6
TR2
XSDATA
TR2
SVREF15
DB5
UDAC1
TSD1
TWS
AUX0
TESTAD
DB14
XSCSJ
DB4
SVREF09
SVREF21
DB2
DMA9
SVREF15
XOUT
MCLK
DB7
DMA8
DMA10
XSCLK
TSD2
XIN
DMA4
DMA5
DMA6
DMA7
DMA0
DMA2
CAS#
CS0#
RAS0#
RAS1#
RAS2#
DOE#
DWE#
RFGND
DA
EAUX03
EAUX02
EAUX01
EAUX00
EAUX02
EAUX01
EAUX00
AUX2
AUX3
AUX4
AUX5
AUX6
AUX7
AUX3
AUX4
AUX5
AUX6
AUX7
AUX1
SPDIF_IN
DMA11
SPINDLE
SDEFCT
OPEN
SLDC
FOCUS
SVREF21
SVREF15
TRACK
SLEGN
MIRR
TEI
CEI
DIN
3
FEI
DIP
SBAD
SCSJ
SDATA
SCLK
INSW
HOMESW
OUTSW
DRVSB
RESET#
MOCTL
CLOSE
HFMVSW
BIAS
EAUX03
EAUX02
EAUX01
EAUX00
EAUX02
EAUX01
EAUX00
AUX0
AUX1
AUX2
AUX3
AUX4
AUX5
AUX6
AUX7
AUX1
AUX2
AUX3
AUX4
AUX5
AUX6
AUX7
SPDIF_IN
PLL33V
RF33V
VCC33
GND
GND
GND
GND
RFGND
RFGND
GND
PLLGND
RFGND
VCC20
VCC
GND
GND
VCC33
VCC33
RR14
10K
RR22
6.8K
CC11
0.0047
0.0047
RR12
33K
CC37
33P
CC20
1
CC17
0.0068
0.0068
U1A
ES6698FD
DECODER
DECODER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
VD33
XIN
XOUT
DCLK
DMA0
DMA1
DMA2
DMA3
VS33
VD33
DMA4
DMA5
DMA6
DMA7
DMA8
DMA9
DMA10
VS33
VD33
DMA11
DCAS
DCS0
DCS1
DRAS0
DBANK0/
D
RAS1
VSS
VDD
DBANK1/
D
RAS2
DCKE/DOE/TDMTSC
DWE
DB0
DB1
DB2
VS33
VD33
DB3
DB4
DB5
DB6
DB7
DB15
TWS/SEL
PLL2
TSD0/SEL_PLL0
TSD1/SEL_PLL1
VS33
TSD2
TSD3
MCLK
TBCK
SPDIF/SEL_PLL3
SPDIFIN
VD33
VS33
XSWBLCLK
XSWBL
XSLG
XSIP2
XSIP1
XSFLAG[0]
XSFLAG[1]
XSFLAG[2]
XSFLAG[3]
VSS
VDD
XSTEXI
XSTESTAD
XSSBAD
XSFEI
AVSS_AD
XSCEI
XSTEI
XSRFRP
AVDD3_AD
XSVREF[21]
XSVREF[09]
XSVREF[15]
XSIREF
AVDD3_DS
XSIPIN
XSRFIN
XSRFIP
XSDSSLV
AVSS_DS
AVSS_PL
XSPDOFTR1
XSFDO
XSFTROPI
AVDD3_PL
XSPLLFTR1
XSPLLFTR2
XSVREF0
XSAWRC
AVSS_DA
XSRFRPCTR
XSTRAY
AVDD3_DA
XSSPINDLE
XSFOCUS
XSSLEGP
XSSLEGN
XSTRACK
XSTESTDA
XSFGIN
XSPHOI
SXCSJ
XSDATA
XSCLK
XSDFCT
XSLDC
XSSPDON
VD33
VS33
XGPIO[9]
XGPIO[8]
XGPIO[7]
XGPIO[6]
XGPIO[5]
XGPIO[4]
EAUX03
EAUX02
EAUX01
EAUX00
VSS
VDD
AUX0
AUX1
AUX2/ HSYNC
AUX3/ VSYNC
AUX4
AUX5
AUX6
AUX7
RESET
VS33
AVSS_PL
XSPDOFTR1
XSFDO
XSFTROPI
AVDD3_PL
XSPLLFTR1
XSPLLFTR2
XSVREF0
XSAWRC
AVSS_DA
XSRFRPCTR
XSTRAY
AVDD3_DA
XSSPINDLE
XSFOCUS
XSSLEGP
XSSLEGN
XSTRACK
XSTESTDA
XSFGIN
XSPHOI
SXCSJ
XSDATA
XSCLK
XSDFCT
XSLDC
XSSPDON
VD33
VS33
XGPIO[9]
XGPIO[8]
XGPIO[7]
XGPIO[6]
XGPIO[5]
XGPIO[4]
EAUX03
EAUX02
EAUX01
EAUX00
VSS
VDD
AUX0
AUX1
AUX2/ HSYNC
AUX3/ VSYNC
AUX4
AUX5
AUX6
AUX7
RESET
VS33
CC3
0.001
0.001
RR16
0
CC10
1
CC30
470P
470P
C14A
27P
27P
CC23
68P
68P
RR2
3.3K
R26A
33
RR3
3.3K
RR10
0
CC2
0.001
0.001
CC27
0.1
0.1
CC32
0.015
CC5
0.1
0.1
U3
24C02
1
2
3
4
2
3
4
5
6
7
8
S0
S1
S2
GND
S1
S2
GND
SDA
SCL
WC
VCC
CC24
0.1
RR5
10K
R29A
33
RR15
5.1K
Y1
27 MHz
RR18
6.8K
RR6
68K
CC14
0.1
CC21
0.047
0.047
CC33
470P
470P
C8A
4.7/16
CC4
0.001
0.001
RR17
0
RR8
4.7K
CC28
0.0068
RR27
33
CC25
47P
R21A
0
CC26
0.1
RN4
10x4
1
8
2
7
3
6
4
5
TP2
RR26
33
RN5 10x4
1
8
2
7
3
6
4
5
CC36
33P
R24A
33
CC12
1
R25A
33
CC22
0.1
U5A
S16400B
1
2
4
4
6
5
7
7
3
8
10
10
12
11
13
13
9
15
16
17
18
19
35
22
23
24
25
26
24
25
26
14
28
29
30
31
32
33
34
30
31
32
33
34
36
37
38
39
40
43
42
44
44
46
45
47
47
49
48
50
50
52
51
53
53
41
20
21
21
27
54
VCC
DQ0
DQ1
DQ1
VSSQ
DQ2
DQ3
DQ3
VCCQ
DQ4
DQ5
DQ5
VSSQ
DQ6
DQ7
DQ7
VCCQ
DQML
WE
CAS
RAS
CS
A11
A10
A0
A1
A2
A3
A1
A2
A3
VCC
VSS
A4
A5
A6
A7
A8
A9
A5
A6
A7
A8
A9
NC
CKE
CLK
DQMH
NC
VCCQ
DQ8
DQ9
DQ9
VSSQ
DQ10
DQ11
DQ11
VCCQ
DQ12
DQ13
DQ13
VSSQ
DQ14
DQ15
DQ15
VSS
BA0
BA1
BA1
VCC
VSS
RR25
33
CC35
33P
U6A
V6300C
RESET
RESET
1
2
3
2
3
4
5
NC
GND
NC RES
GND
NC RES
VDD
CC15
0.1
RN3
10x4
1
8
2
7
3
6
4
5
RR4
3.3K
R27A
100K
100K
RR21
0
RR9
4.7K
CC34
0.1
RN2
10x4
1
8
2
7
3
6
4
5
RR1
3.3K
RN1
10x4
1
8
2
7
3
6
4
5
CC1
0.001
0.001
C13A
27P
RR7
20K
RR19
6.8K
TP1
CC13
0.1
CC6
0.0047
0.0047
RR23
0
DECODE PWB-A (1/4)
A
B
C
D
E
F
G
H
1
2
3
4
5
6
NOTES ON SCHEMATIC DIAGRAM can be found on page 5-1.
HT-M700H
6 – 10
Figure 6-10 SCHEMATIC DIAGRAM (2/27)
reserved
5
0
4.25
114.75
121.5
bypass
1
4.25
0
PLL0
108
0
1
162
1
1
1
NA
0
135
S-CHIP
0
NA
3.75
PLL2
1
Frequency
0
4
148.5
4
1
121.5
0
101.25
reserved
1
27
bypass
0
6
DEFAULT
PLL1
5.5
DEFAULT
1
4.75
4.5
0
1
MULTI
0
S-CHIP
114.75
1
1
128.25
108
3.5
4.5
NA
94.5
0
0
E
C
T
Y
G
B
C
CVBS
CVBS
YDAC
B
5DAC
U
S-VIDEO + RGB
Y
CVBS
CDAC
U
VDAC
C
Y
CVBS + S-VIDEO
or CVBS + YUV
or CVBS + YUV
CVBS
CVBS + RGB
VIDEO OUTPUT TABLE
V
G
CVBS
R
R
CVBS + YUV
V
UDAC
LD1
LA12
VCC33V
TWS
LD6
LA4
LA18
LA3
LA17
LA2
LA6
LA7
LA19
WRLL#
LA14
LA1
LA0
LA5
LA11
LD5
LD2
LA10
LD7
RESET#
LA9
TBCK
LD3
LD4
LCE#
LA8
LA13
LA15
LA16
LA13
DSCK
WRLL#
LA4
DB15
LD4
LCS3#
FDAC1
TBCK
LA0
LA3
LA6
LA10
LA11
LA11
LA17
DB1
DB3
DB0
SPDIF
FDAC1
DQM
TSD0
COMP
LD1
LD0
LD0
LCS2#
LA21
DB10
DB6
RBCK
UDAC1
VS33_PL2
RSD
LOE#
LA7
DB8
LD7
LA15
DB12
DB5
UDAC1
LA5
LA12
DB11
TSD1
TWS
GNDV
RSET
VREF
VD33_PL1
RWS
RWS
LD3
VDAC1
LA14
DB14
YDAC1
LA2
LA18
LA19
LA19
DB13
DB4
CDAC1
LD5
LA8
DB2
CDAC1
VDAC1
LA1
DB9
MCLK
VCC33V
LA9
LA16
DB7
TSD2
LD6
LD2
LA20
LA20
LCS3#
YDAC1
RAS2#
DOE#
DWE#
LD0
LOE#
LOE#
SPDIF_IN
FLASHVCC
UDAC
CDAC
YDAC
VDAC
FDAC
SPDIF
TBCK
MCLK
TBCK
MCLK
TSD2
TSD1
TSD0
TWS
TSD1
TSD0
TWS
RWS
RBCK
RSD
RBCK
RSD
LD7
LD6
LD5
LD4
LD3
LD2
LD1
LD0
N
GND
GNDV
GNDV
GNDV
GNDV
GNDV
GNDV
GNDV
GNDV
GNDV
VCC
GND
GNDV
GND
VCC20
VCC33V
VCC33
GND
GNDV
FLASHVCC
GND
GNDV
GNDV
GND
GND
GND
GND
GNDV
GNDV
GNDV
CC33
R10A
4.7K
4.7K
L1A
2.4 µH
C2A
470P
1A
98FD
ODER
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
VDD
DBANK1/
DRAS2
DCKE/DOE/TDMTSC
DWE
DB0
DB1
DB2
VS33
VD33
DB3
DB4
DB5
DB6
DB7
DB15
DB14
VS33
VD33
DB13
DB12
DB11
DB10
DB9
DB8
DSCK
VS33
VD33
DQM
LA21
LA20
LA19
LA18
LA17
LA16
VS33
VD33
LA15
LA14
LA13
LA12
LA11
LA10
LA9
VSS
VDD
LA8
LA7
LA6
LA5
LA4
LA3
VS33
VD33
LA2
LA1
LA0
LCS0
VSS
VDD
LCS3
LOE
LD1
LD2
LD3
VS33
VD33
LD4
LD5
LD6
LD7
RSD/TDMDR
RBCK/TDMCLK
RWS/TDMFS
VD33_PLL
VS33_PL
YUV1/VREF
YUV3/COMP
YUV4/RSET
YUV7/FDAC
YUV6/VDAC
VD33_DA
VS33_DA
YUV5/YDAC
YUV2/CDAC
YUV0/UDAC
TWS/SEL_PLL2
TSD0/SEL_PLL0
TSD1/SEL_PLL1
VS33
TSD2
TSD3
MCLK
TBCK
SPDIF/SEL_PLL3
SPDIFIN
VD33
VS33
XSWBLCLK
XSWBL
XSLG
L3A
2.4 µH
R6A
4.7K
4.7K
C8A
0.1
0.1
R16A
82
C1A
470P
470P
R14A
0
D1A
BAT54SW
R5A
82
C5A
470P
D5A
BAT54SW
R12A
82
C6A
470P
470P
R7A
4.7K
4.7K
R23A
0
RN4
10x4
TP2
RN5 10x4
1
8
2
7
3
6
4
5
D2A
BAT54SW
L4A
2.4 µH
R19A
0
R20A
0
R13A
390
390
L2A
2.4 µH
C9A
470P
470P
R8A
4.7K
4.7K
R15A
82
C10A
470P
470P
FB1
D3A
BAT54SW
C3A
470P
470P
R11A
82
U2A
MX29LV16
1
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
W
RP
VPP
DU/WP
NC
NC
A17
A7
A6
A5
A4
A3
A2
A1
A14
A13
A12
A11
A10
A9
A8
NC
NC
W
RP
VPP
DU/WP
NC
NC
A17
A7
A6
A5
A4
A3
A2
A1
A0
E
G
DQ8
DQ1
DQ9
DQ2
DQ10
DQ3
DQ11
VCC
DQ4
DQ12
DQ5
DQ13
DQ6
DQ14
DQ7
DQ15/A_1
GND
BYTE
A16
C7A
0.1
C4A
470P
470P
TP1
R9A
4.7K
4.7K
L5A
2.4 µH
D4A
BAT54SW
FLASH
LD0
LWRLL
LCS1
LCS2
7
8
9
10
11
12
HT-M700H
6 – 11
Figure 6-11 SCHEMATIC DIAGRAM (3/27)
H1250(H1200S)
RR44
1K(APC=178mv)
H1400(H1200W)
5.1K(APC=150mv)
TRACK-
CDMDI
TRACK+
FOCUS+
RF50V
CDLDO
FOCUS-
DVDMDI
F
DVDLDO
E
SBA
SVREF15
SCLK
CDMDI
SCSJ
PVC
F
CE
RF50V
FE
E
SDATA
DVDMDI
TE
RF50V
CDLD
DVDLD
DVDLDO
RFGND
RF50V
RF50V
LINK
MEVO
OPIN+
OPIN-
LOAD+/DCMO+
LOAD-/DCMO-
RFGND
DCLOAD-
DCLOAD+
DCLOAD+
HOMESW
SLED+
SLED-
LOAD+/DCMO+
LOAD-/DCMO-
HFMVCC
DVDLDO
HFMVCC
SDATA 2
DIN 2
MIRR 2
SCSJ 2
SLDC 2
SCLK 2
SDEFCT 2
DIP 2
RFO 2
TEI 2
FEI 2
CEI 2
SBAD 2
INSW 2
OUTSW 2
HOMESW 2
HFMVSW 2
2
2 C
RF50V
RF33V
RF50V
RF50V
RF50V
RFGND
RFGND
RFGND
RFGND
RFGND
RFGND
RFGND
MGND
MGND
MGND
MGND
MVCC
RFGND
RFGND
RF33V
CC39
0.1
CC59
0.22
0.22
CC50
0.1
0.1
CC47
0.01
C68A
100/16
100/16
QQ1
2SB1132Q
QQ2
2SB1132Q
U9
ES6603S
64M SD-RAM
1
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
DVDFRP
DVDRFN
A2
B2
C2
D2
CP
CN
D
C
B
A
CD_D
CD_C
CD_B
CD_A
DVDRFN
A2
B2
C2
D2
CP
CN
D
C
B
A
CD_D
CD_C
CD_B
CD_A
CD_F
CD_E
VPB
VC
DVDLD
CDLD
DVDPD
CDPD
VNB
LDON
MIRR
MP
MB
MLPF
MIN
MEVO
RFDC
RFSIN
ATOP
ATON
AIN
AIP
VPA
RFAC
BYP
DIN
DIP
FNP
FNN
VNA
MEV
RX
SDEN
SDATA
SCLK
V33
LCP
LCN
LCN
MNTR
CE
FE
TE
TE
PI
V25
V125
TPH
DFT
LINK
CC57
0.1
0.1
RR32
100
CC73
0.1
CC58
0.1
RR29
120
RR44
0
CC45
0.1
TP5
LINK-
LINK-
LL1
RR34
100
CC41
470P
470P
RR40
10
CC49
0.1
0.1
QQ3
2N3906
CC40
0.1
0.1
CC53
0.0022
JP1A
1
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
10
11
11
CC61
150P
150P
JJ1
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
TR-
TR+
FO-
FO+
PD(MONITOR)
VCC
VR
GND
LD(DVD)
LD(CD)
VR
GND(NC)
PD
GND
RFOUT
C
B
A
A
D
F
E
E
VCC
VS(VCC)
GND
CC48
820P
820P
DD2A
1N4148
RR42
10
RR47
1K
CC52
0.0022
0.0022
C67A
100/16
100/16
CC69
0.001
0.001
RR53
1K
CC65
0.01
CC55
0.0022
0.0022
RR65
22K
22K
TP3
MNTR
MNTR
RR52
0
RR49
10
RR63
1.5K
1.5K
CC62
0.033
0.033
RR50
1K
CC51
0.0022
0.0022
C42A
100/16
CC60
0.001
RR62
10K
10K
CC46
0.1
0.1
RR61
22K
22K
RR56
1.5K
1.5K
DD3A
1N4148
RR28
1
CC71
0.001
0.001
RR54
10K
10K
+
C70A
100/16
CC72
0.001
0.001
RR57
1M
CC56
120P
120P
CC54
0.047
0.047
RR48
10
CC43
0.1
0.1
TP6
MIRR
MIRR
CC38
0.1
CC44
470P
470P
TP4
DEFCT
DEFCT
CC75
0.1
A
B
C
D
E
F
G
H
1
2
3
4
5
6
NOTES ON SCHEMATIC DIAGRAM can be found on page 5-1.
HT-M700H
6 – 12
Figure 6-12 SCHEMATIC DIAGRAM (4/27)
MVCC
SLED+
SLED-
OPIN+
OPIN-
OAD+/DCMO+
MVCC
OPIN-
OPIN+
DCLOAD-
LOAD+/DCMO+
MVCC
TRACK-
OPOUT
LOAD-/DCMO-
TRACK+
DCLOAD+
FOCUS-
FOCUS+
OPOUT
2 SLEGN
TRACK 2
2 FOCUS
SDATA 2
2
RR 2
SCSJ 2
DC 2
SCLK 2
SDEFCT 2
2
O 2
TEI 2
FEI 2
CEI 2
SBAD 2
MOCTL
SPINDLE 2
2 DRVSB
HFMVSW 2
2 OPEN
2 CLOSE
2 BIAS
RF50V
RFGND
MGND
MGND
MGND
RFGND
MVCC
MVCC
GND
MGND
MVCC
MGND
MGND
MGND
RR60
150
RR30
0
RR35
56K
RR33
10K
RR41
15K
TP5
LINK-
LINK-
CC66
0.1
RR36
22K
CC63
0.1
+ C64A
100/16
U10A
AM5868S
1
9
10
12
3
2
15
7
14
13
21
19
20
24
27
6
4
5
28
8
11
17
18
16
23
22
25
26
29
30
VINFC
VOTR-
VOTR+
VOSL-
OP2IN+
OP2IN-
VOTK+
REV
VOFC+
VOFC-
VCTL
VCC2
OP1OUT
OP1IN-
BIAS
FWD
VINSL
OP2OUT
MUTE
VCC1
VOSL+
VOLD+
VOLD-
VOTK-
VINLD
GND
OP1IN+
VINTK
GND
GND
QQ4
2N3906
2N3906
RR39
56K
56K
RR59
4.7K
RR65
22K
22K
TP3
MNTR
MNTR
RR45
0
RR63
1.5K
1.5K
RR62
10K
10K
DD1
1N4148
1N4148
RR57
1M
TP4
DEFCT
DEFCT
CC75
0.1
MAIN PWB-A (2/4)
DRIVER IC
7
8
9
10
11
12
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