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– 73 –

1

VSS

Input

GND

2

DATA

Input

Serial data input

3

CLOCK

Input

Serial clock input

4

LCK

Input

Latch clock input

5

Q0

Output

Panel LED

6

Q1

Ourput

> I I LED

7

Q2

Output

<< LED

8

Q3

Output

>> LED

9

Q4

Output

Stop LED

10

Q5

Output

Not used

11

Q6

Output

CD 6 LED

12

Q7

Output

CD 5 LED

13

Q8

Output

CD 4 LED

14

Q9

Output

CD 3 LED

15

Q10

Output

CD 2 LED

16

Q11

Output

CD 1 LED

17

OE

Output

Output enable

18

VDD

Input

Power supply

In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.

1

VSS

Input

GND

2

DATA

Input

Serial data input

3

CLK

Input

Serial clock input

4

LCK

Input

Latch clock input

5

Q0

Output

For CD power control

6*

Q1

Output

Not used

7*

Q2

Output

Not used

8*

Q3

Output

Not used

9

Q4

Output

CD/CD-R input selection

10

Q5

Output

LCD Rest

11*

Q6

Output

Panel control switch

12

Q7

Output

Panel control output close

13

Q8

Output

Panel control output open

14

Q9

Output

Fan motor ON/OFF

15

Q10

Output

AUX analog /OPT digital selection

16

Q11

Output

AUX analog /PHONO input selection

17

OE

Output

Output enable

18

VDD

Input

Power supply

– 74 –

In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
(*): Normaly the output pin. Used as an I/O pin in test mode, which is not available to user applications.

1

VREF

Output

Reference voltage output (Vdda/2)

2

MPXIN

Input

Baseband (multiplexed0 signal input

3

VDDA

—

Analog power supply (+5V)

4

VSSA

—

Analog ground

5

FLOUT

Output

Subcarrier output (fulter output)

6

CIN

Input

Subcarrier input (comparator input)

7

T1

Input

Test input (This pin must always be connected to ground.)

8

T2

Input

Test input (standby control)
0: Normal operation

1: standby state (crystal oscillator stopped)

9*

T3 (RDCL)

Input/Output (*)

Test I/O (RDS clock output)

10*

T4 (RDDA)

Input/Output (*)

Test I/O (RDS data output)

11*

T5 (RSFT)

Input/Output (*)

Test I/O (soft-decision control data output)

12

XOUT

Output

Crystal oscillator output (4.332/8.664 MHz)

13

XIN

Input

Crystal oscillator input (external reference signal input)

14

VDDD

—

Digital power supply (+5V)

15

VSSD

—

Digital ground

16*

T6

Input/Output (*)

Test I/O (error status, regenerated carrier, TP, error block count outputs)

(ERROR/57K/TP/BE1)

17*

T7

Input/Output (*)

Test I/O (error correction status, SK detection, TA, error block count outputs)

(CORREC/ARI-ID/TA/BE0)

18*

SYNC

Input/Output (*)

Block synchronization detection output

19*

RDS-ID

Output

RDS detection output

20

DO

Output

Data output

21

CL

Input

Clock input

22

DI

Input

Data input

    Serial data interface (CCB)

23

CE

Input

Chip enable

24

SYR

Input

Synchronization and RAM address reset (active high)

VREF

FLOUT

CIN

Vddd

Vssd

RDS-ID

SYNC

SYR

XOUT

XIN

DO

CL

DI

CE

T1

T2

T3 to T7

MPXIN

Vssa

Vdda

REFERENCE

VOLTAGE

ANTIALIASING

FILTER

57kHz

BPF

(SCF)

VREF

SMOOTHING

FILTER

+

_

PLL

(57kHz)

CLOCK

RECOVERY

(1187.5Hz)

DATA

DECODER

SYNC/EC CONTROLLER

SYNC

DETECT-2

SYNC

DETECT-1

ERROR CORRECTION

(SOFT DECISION)

CLK(4.332MHz)

OSC/DIVIDER

RAM

(24 BLOCK DATA)

MEMORY CONTROL

CCB

TEST

3

1

5

6

4

2

20

21
22

23

13

12

24

18

19

15

14

7

8

9~11,

16,17

– 75 –

If any one of the bands shown in Fig. 75 is removed some
reason, be sure replace it to the original position and same
appearance as before.

Nylon Band

Rear Panel

Power Supply PWB

Lug Terminal

Bushing

Browm

Blue

– 76 –

LCD (12 characters   3 lines)

with lcons

1~4.7

µ

1~4.7

µ

VLOUT

C1-

C1+

C2-

C2+

VC1

VCC

GND

/RD

/WR

/CS

/RESET

DB4-DB7

RS

3

60

7

4+COMS

7+COMS

1

VLOUT

Booster

capacitance

Potential difference between VCI and GND is boosted twice and then
output. Magnitude of boost is selected by instruction.

O

—

2, 3

C1-, C1+

Booster

capacitance

External capacitance should be connected here.

—

4, 5

C2-, C2+

Booster

capacitance

External capacitance should be connected here.

I

6

VCI

Power supply

Inputs a reference voltage and supplies power to the booster, 
generates the LCD drive voltage from the operating voltage. 
VCI=0~2.2V

—

7

VCC

Power supply

5V

—

8

GND

Power supply

0V

I

9

/RD

MPU

For a 80-system parallel bus interface. Read data at low level.

I

10

/WR

MPU

For a 80-system parallel bus interface. Write data at low level.

I

11

RS

MPU

"L" :Instruction; "H" :Data.

I

12

/CS

MPU

Low :LCD control IC is selected and can be accessed.
High :LCD control IC is not selected and can not be accessed.

I

13

/RESET

MPU or external

R-C circuit

Reset pin. Initializes the LSI when low. Must reset after power-on.

I/O

14

DB4

MPU

Data bit 4. For a bidirection four-bit parallel bus.

I/O

15

DB5

MPU

Data bit 5. For a bidirection four-bit parallel bus

I/O

16

DB6

MPU

Data bit 6. For a bidirection four-bit parallel bus

I/O

17

DB7

MPU

Data bit 7. For a bidirection four-bit parallel bus