Sharp CD-C607H (serv.man4) Service Manual ▷ View online
CD-C607H/611H
– 39 –
• Checking the spin system.
Yes
No
Play operation is performed without disc.
The turntable rotates a little.
The turntable fails to rotate or rotates at high speed.
Yes
The spin driver circuit is normal.
Check the periphery of IC1 pins 23 to 27, pin 39, and pin 40, IC2
pin 12 and pin 13, IC3 to CNP3.
pin 12 and pin 13, IC3 to CNP3.
Yes
• Checking the VCO-PLL system
Figure 39-2
Play operation is performed when disc exits.
Yes
Although HF waveform is normal, TOC data cannot be read.
Yes
Check PDO waveform (Fig. 39-2).
Abnormal
Check the IC1 pins 43 and 44, IC2 pins 3, 5, 7, 10, and 11.
• Although HF waveform is normal and the time
indication is normal, no sound is emitted.
Check IC2 pin 48 (EFLG).
Check IC2 pins 37, 40.
Check IC401 and POWER AMP. IC601.
Abnomal
Yes
Usually, the number of pulses of flawless disc is 100 pulses/sec
or less.
or less.
No
2
3
0.5s
1.00 V
IC2 3 PDO
1.00 V
IC2 3 PDO
0.5s
1.00 V
IC1 16 FD
1.00 V
IC1 16 FD
As VCO frequency
is locked at 4.32 MHz,
voltage of PDO rises and
stabilizes.
is locked at 4.32 MHz,
voltage of PDO rises and
stabilizes.
Stop --> Play
• Check the tracking system.
Check waveform of IC1 pin 7 (TE).
Play is possible in
TEST mode.
TEST mode.
The unit will be initialized
in Normal mode,but it will
not playback..
in Normal mode,but it will
not playback..
Check the periphery
of IC 1 pin 14.
of IC 1 pin 14.
Normal jump is impeded,
and the program top
cannot be reached.
and the program top
cannot be reached.
Check the periphery of IC 1
pin 8 to pin 15, and IC 5 to
CNP2.
pin 8 to pin 15, and IC 5 to
CNP2.
The waveform shown in Fig.
39-1 appears, and no-disc
state appears soon.
39-1 appears, and no-disc
state appears soon.
Tracking servo is
inoperative.
inoperative.
Yes
Yes
Yes
Yes
Yes
Data cannot be read.
Check the VCO-PLL system.
Yes
Figure 39-1
3
4
5ms
1.00 V
IC1 7 TE
1.00 V
IC1 7 TE
5 ms
5.0 V
IC1 54 DRF
5.0 V
IC1 54 DRF
CD-C607H/611H
– 40 –
IC1 VHiLA9241M/-1: Servo Amp. (LA9241M) (1/2)
1
FIN2
Connection pin for photodiode of pickup.
RF signal is generated through addition with FIN pin, and FE signal is generated through subtraction.
RF signal is generated through addition with FIN pin, and FE signal is generated through subtraction.
2
FIN1
Connection pin for photodiode of pickup.
3
E
Connection pin for photodiode of pickup. TE signal is generated through subtraction with F pin.
4
F
Connection pin for photodiode of pickup.
5
TB
Pin for input of DC component of TE signal.
6
TE-
Pin to connect gain setting resistor of TE signal to TE signal.
7
TE
TE signal output pin.
8
TESI
TES (Track error sense) comparator input pin. TE signal is band-passed and input.
9
SCI
Input pin for shock detection.
10
TH
Pin to set time constant of tracking gain.
11*
N.C.
No connect.
12
TD-
Pin to compose tracking phase compensation constant between TD and VR pins.
13
TD
Pin to set tracking phase compensation.
14
JP
Pin to set amplitude of tracking jump signal (kick pulse).
15
TO
Tracking control signal output pin.
16
FD
Focusing control signal output pin.
17
FD-
Pin to compose focusing phase compensation constant between FD and FA pins.
18
FA
Pin to compose focusing phase compensation constant between FD-/FA-pins.
19
FA-
Pin to compose focusing phase compensation constant between FA and FE pins.
20
FE
Output pin of FE signal.
21
FE-
Pin to connect gain setting resistor of FE signal across TE pin.
22
AGND
GND for analog signal.
23
SP
Single end output for CV+ and CV- pin input.
24
SPI
Spindle amplifier input.
25
SPG
Pin to connect gain setting resistor in the 12cm mode of spindle.
26
SP-
Pin to connect spindle phase compensation constant together with SPD pin.
27
SPO
Spindle control signal output pin.
28
SLEO
Pin to connect thread phase compensation constant.
29
SLD
Thread control signal output pin.
30
SL-
Input pin of thread feed signal from microcomputer.
31
SL+
Input pin of thread feed signal from microcomputer.
32
JP-
Input pin of tracking jump signal from DSP.
33
JP+
Input pin of tracking jump signal from DSP.
34
TGL
Input pin of tracking gain control signal from DSP. TGL = Gain low at "H"
35
TOFF
Input pin of tracking off control signal from DSP. TOFF = Off at "H"
36
TES
Output pin of TES signal to DSP.
37
HFL
(HIGH FREQUENCY LEVEL) is used to judge whether main beam is positioned on the bit or on the mirror.
38
SLOF
Thread servo off control input pin.
39
CV-
Pin to input CLV error signal from DSP.
40
CV+
Pin to input CLV error signal from DSP.
41
RFSM
RF output pin.
42
RFS-
Pin to set gain of RF and set 3T compensation constant together with RFSM pin.
43
SLC
(SLICE LEVEL CONTROL) is the output pin to control of the level of the data slice with RF waveform DSP.
44
SLI
Input pin to control the level of data slice with DSP.
45
DGND
GND pin in the digital system.
46
FSC
Output pin for focus search smoothening capacitor.
47
TBC
(Tracking Balance Control) Pin to set EF balance variable range.
48*
NC
No connect.
Pin No.
Port Name
Function
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
FUNCTION TABLE OF IC
CD-C607H/611H
– 41 –
IC1 VHiLA9241M/-1: Servo Amp. (LA9241M) (2/2)
Pin No.
Port Name
Function
49
DEF
Defect detection output pin of disc.
50
CLK
Reference clock input pin. 4.23MHz of DSP is input.
51
CL
Microcomputer command clock input pin.
52
DAT
Microcomputer command data input pin.
53
CE
Microcomputer command chip enable input pin.
54
DRF
(DETECT RF) RF level detection output.
55
FSS
(Focus Serch Select) Pin to switch focus search mode. (
±
search/+ search for reference voltage)
56
VCC2
VCC pin for servo system and digital system.
57
REF1
Pin to connect pass control for reference voltage.
58
VR
Reference voltage output pin.
59
LF2
Pin to set defect detection time constant of disc.
60
PHI
Pin to connect capacitor for peak hold of RF signal.
61
BHI
Pin to connect capacitor for bottom hold of RF signal.
62
LDO
APC circuit output pin.
63
LDS
APC circuit output pin.
64
VCC1
RF system VCC pin.
Figure 41 BLOCK DIAGRAM OF IC
IC3 VHiM63001FP-1: Focus/Tracking/Spin/Slide Driver (M63001FP)
IC401 VHiM62439SP-1: Audio Processor
(M62439SP)
(M62439SP)
1
2
3
4
5
6
7
15
16
17
18
19
20
21
28
36
37
38
39
40
41
42
27
26
25
24
23
22
IN2–
IN1A–
IN1B–
OUT1–
OUT1+
OUT2–
OUT2+
OUT3+
OUT3–
IN3–
VCC1
STANDBY
VREF
MUTE
GND
GND
VCC3
OUT4+
OUT4–
IN4–
VCC2
IN5+
IN5–
IN6+
IN6–
VCC4
OUT6–
OUT6+
OUT5–
OUT5+
8
9
10
11
12
13
34
33
32
31
30
29
TO
FD
FO(GAIN)
FO+
FO–
TR+
TR–
SL–
SL+
SLD
VCC1
STANDBY
Vref
MUTE
LD_M+
LD_M–
VCC4
M–
M+
SOL–
SOL+
VCC3
SP+
SP–
SPO
(SPN)VCC2
SOLD
SOL–
M63001FP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
M62439SP
REC OUT1
INA1
INB1
INC1
IND1
TONE1
TONEL1
OUT1
GND
Vcc
REC OUT2
INA2
INB2
INC2
IND2
TONE2
TONEL2
OUT2
Vss
CONT
(NC)
(NC)
Pin No.
Terminal Name
Function
1
IN2-
CH2 inverted input.
2
IN1A-
CH1 inverted input.
3
IN1B-
CH1 output offset control.
4
OUT1-
CH1 inverted output.
5
OUT1+
CH1 non-inverted output.
6
OUT2-
CH2 inverted output.
7
OUT2+
CH2 non-inverted output.
8-14
GND
GND
15
OUT3+
CH3 non-inverted output.
16
OUT3-
CH3 inverted output.
17
IN3-
CH3 inverted input.
18
VCC1
Power supply 1 (CH1, CH2, CH3)
19
STANDBY
STANDBY signal input.
20
VRFE
CH1-CH4 Reference voltage input.
21
MUTE
Mute signal input (CH6).
22
IN5-
CH5 inverted input.
23
IN5+
CH5 non-inverted input.
24
VCC2
Power supply 2 (CH4).
25
IN4-
CH4 inverted input.
26
OUT4-
CH4 inverted output.
27
OUT4+
CH4 non-inverted output.
28
VCC3
Power supply 3 (CH5).
29-35
GND
GND
36
OUT5+
CH5 non-inverted output.
37
OUT5-
CH5 inverted output.
38
OUT6+
CH6 non-inverted output.
39
OUT6-
CH6 inverted output.
40
VCC4
Power supply 4 (CH6).
41
IN6-
CH6 inverted input.
42
IN6+
CH6 non-inverted input.
CD-C607H/611H
– 42 –
1
DEF1
Input
Input terminal of defect detection signal (DEF). (Connected to OV when not used.)
2
TA1
Input
For PLL
Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
3
PDO
Output
For PLL
Output terminal of phase comparison for external VCO control.
4
VVSS
—
For PLL
Ground terminal for integrated VCO. Surely connected to 0V.
5
ISET
Input
For PLL
Resistance connection terminal for current adjustment of PDO output.
6
VVDD
—
For PLL
Power terminal for integrated VCO.
7
FR
Input
For PLL
VCO frequency range adjustment.
8
VSS
—
Ground terminal of digital system. Surely connected to 0V.
9
EFMO
Output
For slice level control
EFM signal output terminal.
10
EFMIN
Input
For slice level control
EFM signal input terminal.
11
TEST2
Input
Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
12
CLV+
Outout
Output for disc motor control. 3 values can be output with the commands.
13
CLV-
Output
Output for disc motor control. 3 values can be output with the commands.
14
V/P
Output
Monitor output terminal for automatic switch of rough servo/phase control.
"H" for rough servo, and "L" for phase servo.
"H" for rough servo, and "L" for phase servo.
15
HLF
Intput
Input terminal of track detection signal. Schmit input.
16
TES
Input
Input terminal of tracking error signal. Schmit input.
17
TOFF
Output
Tracking OFF output terminal.
18
TGL
Output
Output terminal for switch of tracking gain "L" increases the gain.
19
JP+
Output
Output for track jump control. 3 values can be output with the commands.
20
JP-
Output
Output for track jump control. 3 values can be output with the commands.
21*
PCK (NC)
Output
Clock monitor terminal for EFM data replay. 4,3218MHz as the phase clock.
22*
FSEQ (NC)
Output
Output terminal synchronous signal detection. "H" is output when synchronous signal detected
by EFM signal matches synchronous signal internally generated.
by EFM signal matches synchronous signal internally generated.
23
VDD
—
Power terminal of digital system.
24
CONT1
Input/Output
General purpose input/output terminal 1
25
CONT2
Input/Output
General purpose input/output terminal 2
26
CONT3
Input/Output
General purpose input/output terminal 3
27
CONT4
Input/Output
General purpose input/output terminal 4
28*
CONT5
Input/Output
General purpose input/output terminal 5
29*
EMPH (NC)
Output
Difference monitor terminal At "H", deemphasis disk is being replayed.
30*
C2F (NC)
Output
C2 flag output terminal.
31*
DOUT (NC)
Output
Output terminal of digital OUTPUT. (EIAJ format)
32*
TEST3 (NC)
Input
Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
33
TEST4
Input
Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
34
PCCL
Input
CD general-use port control signal.
35*
MUTEL (NC)
Output
L channel 1 bit DAC
Mute output terminal for L channel.
36
LVDD
—
L channel 1 bit DAC
Power terminal for L channel.
37
LCHO
Output
L channel 1 bit DAC
L channel output terminal.
38
LVSS
—
L channel 1 bit DAC
Ground terminal for L channel. Surely connected to 0V.
39
RVSS
—
R channel 1 bit DAC
Ground terminal for R channel. Surely connected to 0V.
40
RCHO
Output
R channel 1 bit DAC
R channel output terminal.
41
RVDD
—
R channel 1 bit DAC
Power terminal for R channel.
42*
MUTER (NC)
Output
R channel 1 bit DAC
Mute output terminal for R channel.
43
XVDD
—
Power terminal for quartz oscillation.
44
XOUT
Output
Ground terminal of 16.9344 MHz quartz oscillator.
45
XIN
Input
Ground terminal of 16.9344 MHz quartz oscillator.
46
XVSS
—
Ground terminal for quartz oscillation. Surely connected to 0V.
47*
SBSY (NC)
Output
Output terminal of synchronous signal of subcode block.
48*
EFLG (NC)
Output
Correction monitor terminal of C1, C2, single and double.
49*
PW (NC)
Output
Output terminal of subcodes P, A, R, S, T, U and W.
IC2 VHiLC78622N-1: Servo/Signal Control (LC78622N) (1/2)
Pin No.
Function
Terminal Name Input/Output
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Controlled with serial data command
from microcomputer.
When not used, set it as the input terminal and
open it by connecting to 0V, or set it as the output
terminal and open it.
from microcomputer.
When not used, set it as the input terminal and
open it by connecting to 0V, or set it as the output
terminal and open it.
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